Henry Samueli
#108,037
Most Influential Person Now
American businessman
Why Is Henry Samueli Influential?
(Suggest an Edit or Addition)According to Wikipedia, Henry Samueli is an American businessman, engineer, and philanthropist. He is the co-founder of Broadcom Corporation, owner of the National Hockey League's Anaheim Ducks, and a prominent philanthropist in the Orange County, California community. He serves as chairman of the Board of Broadcom Inc. He is also a Professor in the Electrical and Computer Engineering Department at UCLA, and a Distinguished Adjunct Professor in the Electrical Engineering and Computer Science Department at UC Irvine.
Henry Samueli's Published Works
Published Works
- An improved search algorithm for the design of multiplierless FIR filters with powers-of-two coefficients (1989) (491)
- A single-chip 900-MHz spread-spectrum wireless transceiver in 1-μm CMOS. I. Architecture and transmitter design (1998) (301)
- An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of Phase-Accumulator Truncation (1987) (271)
- A 150-MHz Direct Digital Frequency Synthesizer In 1.25/spl mu/m CMOS With -90dBc Spurious Performance (1991) (205)
- The optimization of direct digital frequency synthesizer performance in the presence of finite word length effects (1988) (159)
- Decadal and Shorter Period Variability of Surf Zone Water Quality at Huntington Beach, California (2002) (114)
- A single-chip 900-MHz spread-spectrum wireless transceiver in 1-μm CMOS. II. Receiver design (1998) (107)
- Design techniques for silicon compiler implementations of high-speed FIR digital filters (1996) (106)
- A 200-MHz quadrature digital synthesizer/mixer in 0.8-/spl mu/m CMOS (1994) (102)
- On the design of optimal equiripple FIR digital filters for data transmission applications (1988) (95)
- A 200 MHz CMOS pipelined multiplier-accumulator using a quasi-domino dynamic full-adder cell design (1993) (71)
- Performance Analysis of an All-Digital BPSK Direct-Sequence Spread-Spectrum IF Receiver Architecture (1993) (69)
- A 200-MHz all-digital QAM modulator and demodulator in 1.2- mu m CMOS for digital radio applications (1991) (63)
- The design of multiplierless FIR filters for compensating D/A converter frequency response distortion (1988) (55)
- A Single-Chip 900-MHz Spread-Spectrum Wireless Transceiver in 1m CMOS — Part II : Receiver Design (1998) (55)
- Analysis and design of a frequency-hopped spread-spectrum transceiver for wireless personal communications (2000) (53)
- A 700-MHz 24-b pipelined accumulator in 1.2- mu m CMOS for application as a numerically controlled oscillator (1993) (53)
- A VLSI Architecture for a High-Speed All-Digital Quadrature Modulator and Demodulator for Digital Radio Applications (1990) (50)
- An all-CMOS architecture for a low-power frequency-hopped 900 MHz spread spectrum transceiver (1994) (47)
- An 800 MHz quadrature digital synthesizer with ECL-compatible output drivers in 0.8 /spl mu/m CMOS (1995) (47)
- A low-power baseband receiver IC for frequency-hopped spread spectrum communications (1996) (46)
- A low-power CMOS digitally synthesized 0-13 MHz agile sinewave generator (1994) (46)
- A 70 Mb/s variable-rate 1024-QAM cable receiver IC with integrated 10 b ADC and FEC decoder (1998) (35)
- On the design of FIR digital data transmission filters with arbitrary magnitude specifications (1991) (34)
- The design of two-channel lattice-structure perfect-reconstruction filter banks using powers-of-two coefficients (1993) (32)
- A 64-Tap CMOS Echo Canceller/Decision Feedback Equalizer for 2B1Q HDSL Transceivers (1991) (31)
- A single-chip 12.7 Mchips/s digital IF BPSK direct sequence spread-spectrum transceiver in 1.2 /spl mu/m CMOS (1994) (31)
- A 150-mhz 43-tap Half-band Fir Digital Filter In 1.2-/spl mu/m Cmos Generated By Silicon Compiler (1992) (30)
- The design of multiplierless digital data transmission filters with powers-of-two coefficients (1990) (30)
- A 60-mbaud, 480-mbit/s, 256-qam Decision-feedback equalizer in 1.2μm CMOS (1992) (28)
- A 1.6 Mbps Digital-QAM System for DSL Transmission (2006) (27)
- A single chip universal cable set-top box/modem transceiver (1999) (25)
- Computer-aided design of a BPSK spread-spectrum chip set (1992) (24)
- The design of low-complexity in linear-phase FIR filter banks using powers-of-two coefficients with an application to subband image coding (1991) (21)
- Low power correlation detector for binary FSK direct-conversion receivers (1995) (21)
- A VLSI architecture for a universal high-speed multirate FIR digital filter with selectable power-of-two decimation/interpolation ratios (1991) (18)
- Synchronization techniques for a frequency-hopped wireless transceiver (1996) (18)
- A 900 MHz CMOS frequency-hopped spread-spectrum RF transmitter IC (1996) (18)
- A 8.75-MBaud single-chip digital QAM modulator with frequency-agility and beamforming diversity (2000) (17)
- A 300 MHz digital double-sideband to single-sideband converter in 1 /spl mu/m CMOS (1995) (16)
- A single-chip universal digital satellite receiver with 480 MHz IF input (1999) (16)
- A silicon compiler for high-speed CMOS multirate FIR digital filters (1992) (15)
- Adaptive antenna arrays and equalization techniques for high bit-rate QAM receivers (1996) (15)
- A high-speed CMOS full-adder cell using a new circuit design technique-adaptively-biased pseudo-NMOS logic (1990) (14)
- The Broadband Revolution (2000) (14)
- A low-power baseband receiver IC for frequency-hopped spread spectrum applications (1995) (13)
- A 52 Mb/s universal DSL transceiver IC (1999) (12)
- VLSI architectures for a high-speed tunable digital modulator/ demodulator/bandpass-filter chip set (1992) (12)
- A high speed pipelined CMOS accumulator for implementing numerically controlled oscillators (1990) (12)
- A Low-Power Handheld Frequency-Hopped Spread Spectrum Transceiver Hardware Architecture (1994) (11)
- Linear programming design of digital data transmission filters with arbitrary magnitude specifications (1988) (10)
- A digital adaptive beamforming QAM demodulator IC for high bit-rate wireless communications (1998) (10)
- A 12.7 Mchip/s all-digital BPSK direct sequence spread-spectrum IF transceiver in 1.2 /spl mu/m CMOS (1994) (10)
- Nonperiodic forced overflow oscillations in digital filters (1983) (10)
- Almost period P sequences and the analysis of forced overflow oscillations in digital filters (1982) (10)
- Field trial results for high-speed wireless indoor data communications (2000) (10)
- A VLSI architecture for a single-chip 5-Mbaud QAM receiver (1992) (10)
- A frequency-agile single-chip QAM modulator with beamforming diversity (2001) (9)
- A 4-channel diversity QAM receiver for broadband wireless communications (1999) (9)
- A reconfigurable decision-feedback equalizer chip set architecture for high bit-rate QAM digital modems (1991) (8)
- A 100 MHz, 5MBaud QAM decision-feedback equalizer for digital television applications (1994) (7)
- A 7 MHz 24-bit pipelined accumulator in 1.2- mu m CMOS for application as a numerically controlled oscillator (1991) (7)
- A 200-MHz CMOS x/sin(x) digital filter for compensating D/A converter frequency response distortion in high-speed communication systems (1990) (6)
- A CMOS bit-level pipelined implementation of an FIR x/sin(x) predistortion digital filter (1989) (5)
- Performance analysis of a QAM adaptive receiver for 1.6 Mbps digital subscriber line transmission (1992) (5)
- A low-complexity multiplierless half-band recursive digital filter design (1989) (5)
- DDFSGEN: a silicon compiler for direct digital frequency synthesizers (1992) (5)
- 30 Mbps wireless data transmission using an equalized 5-MBaud M-QAM testbed (1997) (5)
- A 60-Mbaud adaptive transversal equalizer in 1.0-/spl mu/m CMOS for QAM digital modems (1993) (4)
- A VLSI architecture for a frequency-agile single-chip 10-MBaud digital QAM modulator (1999) (4)
- A 140-MHz CMOS bit-level pipelined multiplier-accumulator using a new dynamic full-adder cell design (1990) (4)
- A bit-level pipelined implementation of a CMOS multiplier-accumulator using a new pipelined full-adder cell design (1989) (4)
- Computer-aided design of high data-rate QAM modem circuits (1993) (3)
- A transceiver for 800 kb/s full-duplex transmission over digital subscriber loops using a custom VLSI adaptive filter processor (1991) (3)
- A 200-MHZ double-sideband to single-sideband converter in 1- mu m CMOS generated by silicon compiler (1992) (3)
- A carrier and timing recovery technique for QAM transmission on digital subscriber loops (1993) (3)
- Adaptive beamforming techniques for a frequency-hopped QAM receiver (1996) (3)
- Performance analysis of synchronization errors on digital adaptive beamforming for a high bit-rate QAM receiver (1997) (3)
- FIR filter design using quadratic programming (1991) (3)
- Probing Techniques for Multiuser Channels with Power Control (1991) (3)
- A 60-MHz 64-tap echo canceller/decision-feedback equalizer in 1.2- mu m CMOS for 2B1Q high bit-rate digital subscriber line transceivers (1991) (3)
- A single-chip universal burst receiver for cable modem/digital cable-TV applications (2000) (3)
- A 1 Mb/s digital subscriber line transceiver signal processor (1993) (3)
- Finite wordlength requirements for adaptive signal processing elements in digital QAM ADSL systems (1994) (2)
- A @-Tap CMOS Echo CancellerlDecision Feedback Equalizer for 2B 1 Q HDSL Transceivers (1991) (2)
- Imaging of Turbulent Refractive Interfaces and Optical Wavefronts in Aero-Optics (2005) (2)
- A 42 MB/S multi-channel digital adaptive beamforming QAM demodulator for wireless applications (1997) (2)
- Mobile Device-Centric Exercise Monitoring with an External Sensor Population (2007) (2)
- Last Mile HFC Access (2005) (2)
- BIO -NANO-INFORMATION FUSION (2004) (1)
- Impact of Altering NO/NO2 Splits in NOx Emissions of Diesel Sources (2002) (1)
- OLED (2020) (1)
- FIR filter design for sigma-delta A/D converters using quadratic programming (1991) (1)
- A 200MHz All-digital QAM Modulator In 1.2/spl mu/m CMOS For Digital Radio Applications (1991) (1)
- Detection of DNA hybridyzation with impedance amplifying labels (2004) (1)
- Architecture and floorplan design techniques for video-rate FIR filters (1990) (1)
- A dual-channel QAM/QPSK receiver IC with integrated cable set-top box functionality (1998) (1)
- A direct sequence BPSK spread spectrum transceiver chip set (1991) (1)
- Gigabit ethernet transmitter receiver with analog input circuit (2000) (0)
- Fabrication of nanometer-sized structures by C-NEMS technology (2005) (0)
- Biologically Inspired Software Defenses (2015) (0)
- A universal cable set-top box system on a chip (2001) (0)
- BIT-LEVEL PIPELINED MULTIPLIER- ACCUMULATOR NEW DYNAMIC FULL-ADDER CELL DESIGN (1990) (0)
- Method and system for decision-feedback decoding (1999) (0)
- UCLA UCLA (2010) (0)
- A 200-MHZ CMOS X/SIN(X) DIGITAL FILTER FOR DISTORTION IN HIGH-SPEED COMMUNICATION SYSTEMS COMPENSATING D/A CONVERTER FREQUENCY RESPONSE (1990) (0)
- A 6O-MBAUD, 48O-MBIT/S, 256-QAM DECISIOPJ-FEEDB ACK EQUALIZER IN 1.2-pM CMOS (1992) (0)
- Towards High Data-Rate and Bandwidth-Efficient Integrated Wireless Transceivers (1998) (0)
- Immediately following the Tuesday Morning's Opening Ceremonies, Dr. Program Spotlight Vinton Cerf If16: Executive Forum: Data Infrastructure and Services Mutli-domain Sdn and Network Evolution Krish Prabhu Connected Life: the Future of Global Communications Keynote Session N2women-wice Lunch and Pan (0)
- Vanda: a computer-aided design environment for high performance communication circuits and systems (1993) (0)
- Computer-Aided Design of a BPSK Spread-Spectrum (1991) (0)
- The Nai Fellow Profile: an Interview With Dr. Henry Samueli (2019) (0)
- A 100 Mb/s CMOS 100Base-T4 Fast Ethernet transceiver for category 3, 4 and 5 UTP (1998) (0)
- Analysis and Design of a Frequency-Hopped Spread-Spectrum Transceiver for Wireless Personal (2000) (0)
- DESIGN OF STABILIZING AND LOCALLY-ROBUST NONLINEAR CONTROLLERS FOR A CLASS OF NONLINEAR SYSTEMS (2002) (0)
- Recognizing the Remarkable Achievements of Klaas Bult: Memories of an Analog Magician's Early Days at UCLA and Broadcom (2020) (0)
- 479 TISSUE ENGINEERING OF SMALL-DIAMETER ARTERIES USING HUMAN ADIPOSE STEM CELLS ON AN ELECTROSPUN SCAFFOLD. (2007) (0)
- DDFSGEN (1992) (0)
- Towards High Speed and Bandwidth Efficient CMOS Wireless Transceivers (2003) (0)
- Embedded systems design in the new millennium (panel session) (2000) (0)
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