Boris Murmann
#57,605
Most Influential Person Now
American electrical engineer
Boris Murmann's AcademicInfluence.com Rankings
Boris Murmannengineering Degrees
Engineering
#1532
World Rank
#2242
Historical Rank
Electrical Engineering
#309
World Rank
#350
Historical Rank
Download Badge
Engineering
Boris Murmann's Degrees
- PhD Electrical Engineering University of California, Berkeley
- Masters Electrical Engineering University of California, Berkeley
- Bachelors Electrical Engineering University of California, Berkeley
Why Is Boris Murmann Influential?
(Suggest an Edit or Addition)According to Wikipedia, Boris Murmann is a professor in the Department of Electrical Engineering at University of Hawaii. He is co-director and a founding faculty of the Stanford SystemX Alliance. He is the faculty director of Stanford's System Prototyping Facility .
Boris Murmann's Published Works
Published Works
- Skin electronics from scalable fabrication of an intrinsically stretchable transistor array (2018) (1243)
- A highly stretchable, transparent, and conductive polymer (2017) (764)
- Highly stretchable polymer semiconductor films through the nanoconfinement effect (2017) (728)
- A 12 b 75 MS/s pipelined ADC using open-loop residue amplification (2003) (544)
- Matrix-insensitive protein assays push the limits of biosensors in medicine (2009) (367)
- Convolutional Neural Networks using Logarithmic Data Representation (2016) (340)
- A/D converter trends: Power dissipation, scaling and digitally assisted architectures (2008) (288)
- An Analysis of Latch Comparator Offset Due to Load Capacitor Mismatch (2006) (209)
- Stretchable temperature-sensing circuits with strain suppression based on carbon nanotube transistors (2018) (208)
- HermesE: A 96-Channel Full Data Rate Direct Neural Interface in 0.13 $\mu$ m CMOS (2012) (189)
- An always-on 3.8μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS (2018) (186)
- Multi-scale ordering in highly stretchable polymer semiconducting films (2019) (179)
- A 12-GS/s 81-mW 5-bit time-interleaved flash ADC with background timing skew calibration (2011) (153)
- Digitally Assisted Analog Circuits (2006) (146)
- A 12-GS/s 81-mW 5-bit Time-Interleaved Flash ADC With Background Timing Skew Calibration (2010) (142)
- GMR biosensor arrays: a system perspective. (2010) (139)
- Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters (2009) (137)
- Impact of Scaling on Analog Performance and Associated Modeling Needs (2006) (129)
- LogNet: Energy-efficient neural networks using logarithmic computation (2017) (125)
- A 12-Bit 75-MS/s Pipelined ADC Using Incomplete Settling (2007) (118)
- A 9.4-bit, 50-MS/s, 1.44-mW Pipelined ADC Using Dynamic Source Follower Residue Amplification (2009) (99)
- A 256 Pixel Magnetoresistive Biosensor Microarray in 0.18 µm CMOS (2013) (89)
- The Race for the Extra Decibel: A Brief Review of Current ADC Performance Trajectories (2015) (86)
- A 3V 6b successive-approximation ADC using complementary organic thin-film transistors on glass (2010) (84)
- A 3-V, 6-Bit C-2C Digital-to-Analog Converter Using Complementary Organic Thin-Film Transistors on Glass (2009) (82)
- Thermal Noise in Track-and-Hold Circuits: Analysis and Simulation Techniques (2012) (74)
- Optimal drive condition for nonlinearity reduction in electrostatic microresonators (2006) (68)
- Controlling electric dipoles in nanodielectrics and its applications for enabling air-stable n-channel organic transistors. (2011) (66)
- BinarEye: An always-on energy-accuracy-scalable binary CNN processor with all memory on chip in 28nm CMOS (2018) (62)
- GMR biosensor arrays: correction techniques for reproducibility and enhanced sensitivity. (2010) (62)
- A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI (2017) (60)
- Digital Compensation of Dynamic Acquisition Errors at the Front-End of High-Performance A/D Converters (2009) (60)
- General analysis on the impact of phase-skew in time-interleaved ADCs (2009) (59)
- Digitally enhanced analog circuits: System aspects (2008) (57)
- Scaling of amplitude-frequency-dependence nonlinearities in electrostatically transduced microresonators (2007) (56)
- The Design of Fast-Settling Three-Stage Amplifiers Using the Open-Loop Damping Factor as a Design Parameter (2010) (55)
- A Closed-Loop Reconfigurable Switched-Capacitor DC-DC Converter for Sub-mW Energy Harvesting Applications (2015) (54)
- An 8-bit 450-MS/s single-bit/cycle SAR ADC in 65-nm CMOS (2013) (54)
- A freely-moving monkey treadmill model (2014) (53)
- A 56MΩ CMOS TIA for MEMS applications (2009) (53)
- Digitally Assisted Pipeline ADCs: Theory and Implementation (2004) (53)
- SRAM voltage scaling for energy-efficient convolutional neural networks (2017) (51)
- LIMITS ON ADC POWER DISSIPATION (2006) (51)
- A study of electrostatic force nonlinearities in resonant microstructures (2008) (51)
- A 12-b, 30-MS/s, 2.95-mW Pipelined ADC Using Single-Stage Class-AB Amplifiers and Deterministic Background Calibration (2012) (48)
- Investigating Limiting Factors in Stretchable All-Carbon Transistors for Reliable Stretchable Electronics. (2017) (48)
- A High-Density Magnetoresistive Biosensor Array with Drift-Compensation Mechanism (2007) (46)
- Ink Development and Printing of Conducting Polymers for Intrinsically Stretchable Interconnects and Circuits (2019) (46)
- Energy limits in A/D converters (2013) (46)
- General Analysis on the Impact of Phase-Skew in Time-Interleaved ADCs (2008) (45)
- A ΔΣ interface for MEMS accelerometers using electrostatic spring-constant modulation for cancellation of bondwire capacitance drift (2012) (45)
- Systematic Design of Analog CMOS Circuits: Using Pre-Computed Lookup Tables (2017) (45)
- A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS (2015) (44)
- A 96-channel full data rate direct neural interface in 0.13µm CMOS (2011) (43)
- A 12-bit, 200-MS/s, 11.5-mW pipeline ADC using a pulsed bucket brigade front-end (2013) (41)
- Power-saving design opportunities for wireless intracortical brain–computer interfaces (2020) (40)
- A $\Delta \Sigma$ Interface for MEMS Accelerometers Using Electrostatic Spring Constant Modulation for Cancellation of Bondwire Capacitance Drift (2012) (39)
- Mixed-signal circuits for embedded machine-learning applications (2015) (39)
- Nonlinear Characterization of Electrostatic MEMS Resonators (2006) (39)
- Digitally assisted data converter design (2013) (39)
- Mismatch characterization of small metal fringe capacitors (2013) (38)
- Settling Time and Noise Optimization of a Three-Stage Operational Transconductance Amplifier (2012) (37)
- Going beyond the Debye Length: Overcoming Charge Screening Limitations in Next-Generation Bioelectronic Sensors (2020) (37)
- The successive approximation register ADC: a versatile building block for ultra-low- power to ultra-high-speed applications (2016) (37)
- System embedded ADC calibration for OFDM receivers (2006) (36)
- A 9.4-bit, 50-MS/s, 1.44-mW pipelined ADC using dynamic residue amplification (2008) (34)
- Non-linearity cancellation in MEMS resonators for improved power-handling (2005) (33)
- Effects of Mechanical Vibrations and Bias Voltage Noise on Phase Noise of MEMS Resonator Based Oscillators (2006) (33)
- A background correction technique for timing errors in time-interleaved analog-to-digital converters (2005) (33)
- Temperature Compensation of a MEMS Resonator Using Quality Factor as a Thermometer (2006) (33)
- An 8-bit, 16 input, 3.2 pJ/op switched-capacitor dot product circuit in 28-nm FDSOI CMOS (2016) (32)
- Low‐Voltage, High‐Frequency Organic Transistors and Unipolar and Complementary Ring Oscillators on Paper (2018) (32)
- 15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOS (2015) (30)
- Design Optimization of High-Speed and Low-Power Operational Transconductance Amplifier Using gm/ID Lookup Table Methodology (2011) (30)
- Digital Domain Measurement and Cancellation of Residue Amplifier Nonlinearity in Pipelined ADCs (2007) (29)
- A Mixer Front End for a Four-Channel Modulated Wideband Converter With 62-dB Blocker Rejection (2017) (29)
- Trends in Low-Power, Digitally Assisted A/D Conversion (2010) (27)
- Mismatch of lateral field metal-oxide-metal capacitors in 180 nm CMOS process (2012) (27)
- A 160 MS/s, 11.1 mW, single-channel pipelined SAR ADC with 68.3 dB SNDR (2014) (26)
- Calculation of Total Integrated Noise in Analog Circuits (2008) (26)
- An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS (2019) (26)
- Memory-Optimal Direct Convolutions for Maximizing Classification Accuracy in Embedded Applications (2019) (25)
- Bit Error Tolerance of a CIFAR-10 Binarized Convolutional Neural Network Processor (2018) (25)
- Background Calibration of Time-Interleaved Data Converters (2011) (25)
- Engineering the metal gate electrode for controlling the threshold voltage of organic transistors (2012) (24)
- Systematic Design of Analog CMOS Circuits (2021) (24)
- Low-voltage and short-channel pentacene field-effect transistors with top-contact geometry using parylene-C shadow masks (2010) (24)
- TinyML: Current Progress, Research Challenges, and Future Roadmap (2021) (23)
- Calculation of MOSFET distortion using the transconductance-to-current ratio (gm/ID) (2015) (23)
- Mixed-Signal Computing for Deep Neural Network Inference (2021) (22)
- Mismatch Characterization of Small Metal Fringe Capacitors (2014) (22)
- CHIMERA: A 0.92 TOPS, 2.2 TOPS/W Edge AI Accelerator with 2 MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference (2021) (22)
- Long Short-Term Memory Neural Network Equilibria Computation and Analysis (2018) (22)
- Approximate SRAM for Energy-Efficient, Privacy-Preserving Convolutional Neural Networks (2017) (21)
- Phase Lock Loop based Temperature Compensation for MEMS Oscillators (2009) (19)
- A 14-Bit 30-MS/s 38-mW SAR ADC Using Noise Filter Gear Shifting (2017) (18)
- Exploring the limits and practicality of Q-based temperature compensation for silicon resonators (2008) (18)
- A −131-dBc/Hz, 20-MHz MEMS oscillator with a 6.9-mW, 69-kΩ, gain-tunable CMOS TIA (2012) (18)
- Full-Swing and High-Gain Pentacene Logic Circuits on Plastic Substrate (2010) (18)
- Analysis and Measurement of Signal Distortion due to ESD Protection Circuits (2006) (18)
- A 256 channel magnetoresistive biosensor microarray for quantitative proteomics (2011) (17)
- A 12b, 75MS/s Pipelined ADC Using Incomplete Settling (2006) (17)
- Digitally Assisted Analog Integrated Circuits (2004) (17)
- Toward Always-On Mobile Object Detection: Energy Versus Performance Tradeoffs for Embedded HOG Feature Extraction (2018) (17)
- On the use of redundancy in successive approximation A/D converters (2013) (17)
- A Low-Power, 6-bit Time-Interleaved SAR ADC Using OFDM Pilot Tone Calibration (2007) (16)
- Intrinsically Stretchable Temperature Sensor Based on Organic Thin-Film Transistors (2019) (16)
- Digital Active Gate Drives using sequential optimization (2016) (16)
- 27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI (2017) (16)
- Passive charge redistribution digital-to-analogue multiplier (2015) (16)
- A continuous-time, jitter insensitive ΣΔ modulator using a digitally linearized Gm-C integrator with embedded SC feedback DAC (2011) (15)
- A 12-bit, 30-MS/s, 2.95-mW pipelined ADC using single-stage class-AB amplifiers and deterministic background calibration (2010) (15)
- Settling time and noise optimization of a three-stage operational transconductance amplifier (2013) (15)
- Micro-imprinted prism substrate for self-aligned short channel organic transistors on a flexible substrate (2012) (14)
- Analog IC Design Using Precomputed Lookup Tables: Challenges and Solutions (2020) (14)
- Acceleration sensitivity in beam-type electrostatic microresonators (2007) (14)
- A/D converter circuit and architecture design for high-speed data communication (2013) (13)
- A 7-bit 2 GS/s Time-Interleaved SAR ADC With Timing Skew Calibration Based on Current Integrating Sampler (2021) (13)
- A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording (2019) (13)
- An Inverter-Based Analog Front-End for a 56-Gb/s PAM-4 Wireline Transceiver in 16-nm CMOS (2018) (13)
- An 8-bit 1.25GS/s CMOS IF-sampling ADC with background calibration for dynamic distortion (2016) (13)
- An 800 nW Switched-Capacitor Feature Extraction Filterbank for Sound Classification (2021) (13)
- A 12-bit 800-MS/s switched-capacitor DAC with open-loop output driver and digital predistortion (2010) (13)
- A Data-Compressive 1.5/2.75-bit Log-Gradient QVGA Image Sensor With Multi-Scale Readout for Always-On Object Detection (2019) (13)
- A four-channel, ±36 V, 780 kHz piezo driver chip for structural health monitoring (2013) (12)
- Metastablility in SAR ADCs (2017) (12)
- A mixer frontend for a four-channel Modulated Wideband Converter with 62 dB blocker rejection (2016) (12)
- Portable biomarker detection with magnetic nanotags (2010) (12)
- IMPACT — A common building block to enable next generation radar arrays (2016) (12)
- A 56 Gb/s 6 mW 300 um2 inverter-based CTLE for short-reach PAM2 applications in 16 nm CMOS (2018) (11)
- Design of analog circuits using organic field-effect transistors (2010) (11)
- Some Local Stability Properties of an Autonomous Long Short-Term Memory Neural Network Model (2018) (11)
- Hybrid Integration of Bandgap Reference Circuits Using Silicon ICs and Germanium Devices (2008) (11)
- Digital correction of dynamic track-and-hold errors providing SFDR ≫ 83 dB up to fin = 470 MHz (2008) (11)
- A Spectrum-Sensing DPD Feedback Receiver With $30\times$ Reduction in ADC Acquisition Bandwidth and Sample Rate (2019) (10)
- Analysis and design of elementary MOS amplifier stages (2013) (10)
- A 0.003 mm2 5.2 mW/tap 20 GBd inductor-less 5-tap analog RX-FFE (2016) (10)
- A New Figure of Merit Equation for Analog-to-Digital Converters in CMOS Image Sensors (2018) (10)
- Fair and Comprehensive Benchmarking of Machine Learning Processing Chips (2022) (10)
- A low-power distributed wide-band LNA in 0.18 /spl mu/m CMOS (2005) (10)
- AMPLITUDE NOISE INDUCED PHASE NOISE IN ELECTROSTATIC MEMS RESONATORS (2006) (10)
- Area scaling analysis of CMOS ADCs (2012) (9)
- Dynamic Calibration of Undersampled Pipelined ADCs by Frequency Domain Filtering (2013) (9)
- An Inverter-Based Analog Front End for a 56 GB/S PAM4 Wireline Transceiver in 16NMCMOS (2018) (8)
- Electrochemical quantum tunneling for electronic detection and characterization of biological toxins (2012) (8)
- Impact: a low cost, reconfigurable, digital beamforming common module building block for next generation phased arrays (2015) (8)
- Static Integral Nonlinearity Modeling and Calibration of Measured and Synthetic Pipeline Analog-to-Digital Converters (2014) (8)
- Understanding Metastability in SAR ADCs: Part II: Asynchronous (2019) (7)
- Stability of Gated Recurrent Unit Neural Networks: Convex Combination Formulation Approach (2020) (7)
- TRIG: Hardware Accelerator for Inference-Based Applications and Experimental Demonstration Using Carbon Nanotube FETs (2018) (7)
- 5.3 A Data-Compressive 1.5b/2.75b Log-Gradient QVGA Image Sensor with Multi-Scale Readout for Always-On Object Detection (2019) (7)
- BACKGROUND CALIBRATION OF TIMING SKEW IN TIME-INTERLEAVED A/D CONVERTERS (2011) (7)
- Separating the Effects of Batch Normalization on CNN Training Speed and Stability Using Classical Adaptive Filter Theory (2020) (7)
- Impact of miniaturization on the current handling of electrostatic MEMS resonators (2007) (7)
- Time-Interleaved ADCs (2012) (6)
- A 0.6 V–2.4 V input, fully integrated reconfigurable switched-capacitor DC-DC converter for energy harvesting sensor tags (2015) (6)
- Analog and Mixed-Signal Layout Automation Using Digital Place-and-Route Tools (2021) (6)
- Global Asymptotic Stability and Stabilization of Long Short-Term Memory Neural Networks with Constant Weights and Biases (2018) (6)
- Measured performance of the IMPACT common module — a building block for next generation phase arrays (2016) (6)
- A 0.11mm2, 5.7-to-6.7GHz, parametrically pumped quadrature LC-VCO with digital outputs (2013) (6)
- Cognitive computation and communication: A complement solution to cloud for IoT (2016) (6)
- Low-rate identification of memory polynomials (2014) (6)
- A 2✖ Time-Interleaved 28-GS/s 8-Bit 0.03-mm2 Switched-Capacitor DAC in 16-nm FinFET CMOS (2021) (6)
- Feedforward Interference Cancellation Architecture for Short-Range Wireless Communication (2011) (6)
- Internet of Everything ( IoE ) focus area (2015) (5)
- A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording (2019) (5)
- Analog-Digital Interfaces (2011) (5)
- An Energy Harvester Using Image Sensor Pixels With Cold Start and Over 96% MPPT Efficiency (2019) (5)
- Towards an integrated circuit design of a compresssed sampling wireless receiver (2012) (5)
- Long-Short Term Memory Neural Network Stability and Stabilization using Linear Matrix Inequalities (2019) (5)
- Digitally Assisted Analog Circuits; Fifth IEEE Dallas Circuits and Systems Workshop (2006) (5)
- A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler (2018) (4)
- Design considerations of a wearable electronic-skin for mental health and wellness: balancing biosignals and human factors (2021) (4)
- Low-Noise Integrated Potentiostat for Affinity-Free Protein Detection With 12 nV/rt-Hz at 30 Hz and 1.8 pArms Resolution (2019) (4)
- A sub-nyquist analog front-end with subarray beamforming for ultrasound imaging (2015) (4)
- A 6.7-ENOB, 500-MS/s, 5.1-mW dynamic pipeline ADC in 65-nm SOI CMOS (2011) (4)
- The Race for the Extra Decibel (2015) (4)
- Sound Classification using Summary Statistics and N-Path Filtering (2019) (4)
- Low-voltage organic transistors for flexible electronics (2014) (4)
- A 32 Gb/s PAM-4 Optical Transceiver with Active Back Termination in 40 nm CMOS Technology (2020) (4)
- Digitally assisted analog and RF circuits: Potentials and issues (2008) (4)
- Low-Rank Training of Deep Neural Networks for Emerging Memory Technology (2020) (3)
- Design and optimization of continuous-time filters using geometric programming (2014) (3)
- Low-Power Pipelined A/D Conversion (2012) (3)
- RRAM-Based In-Memory Computing for Embedded Deep Neural Networks (2019) (3)
- A Compact 14 GS/s 8-Bit Switched-Capacitor DAC in 16 nm FinFET CMOS (2020) (3)
- Improving the Energy Efficiency and Robustness of tinyML Computer Vision using Log-Gradient Input Images (2022) (3)
- Machine Learning at the Edge (2020) (3)
- 80 GS/s 5.5 ENOB time‐interleaved inverter‐based CMOS track‐and‐hold (2020) (3)
- Quantum Tunneling Currents in a Nanoengineered Electrochemical System (2017) (3)
- Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs (2008) (3)
- Custom Sub-Systems and Circuits for Deep Learning: Guest Editorial Overview (2019) (3)
- Data converter reflections: 19 papers from the last ten years that deserve a second look (2016) (2)
- Design Considerations for External Compensation Approaches to OLED Display Degradation (2020) (2)
- Active Control of Probability Amplitudes in a Mesoscale System via Feedback-Induced Suppression of Dissipation and Noise (2016) (2)
- High-Performance Pipelined ADCs for Wireless Infrastructure Systems (2013) (2)
- ANALYSIS AND DESIGN OF CMOS WIDE-BAND LOW NOISE AMPLIFIERS (2004) (2)
- A 10-Gbps Continuous-Time Linear Equalizer for mm-Wave Dielectric Waveguide Communication (2020) (2)
- Mixer-based subarray beamforming for sub-Nyquist sampling ultrasound architectures (2015) (2)
- Inkjet-printed, intrinsically stretchable conductors and interconnects (2017) (2)
- Analog-Digital Interfaces—Review and Current Trends (2016) (2)
- IEEE SSCS Creates Solid-State Circuits Directions Committee to Imagine the Future [Society News] (2020) (2)
- S-Parameter-Based Defect Localization for Ultrasonic Guided Wave SHM (2020) (2)
- CHIMERA: A 0.92-TOPS, 2.2-TOPS/W Edge AI Accelerator With 2-MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference (2022) (2)
- Towards On-Chip Measurement of S-Parameters for Ultrasonic Guided-Wave SHM: Damage Localization in Aluminum Using S-Parameter Measurements (2019) (1)
- A Four-Channel, ${\pm} $36 V, 780 kHz Piezo Driver Chip for Structural Health Monitoring (2014) (1)
- Best Practices to Quantify Linearity Performance of GaN HEMTs for Power Amplifier Applications (2021) (1)
- Eliminating complex conjugate poles in two-stage operational amplifiers with current buffer Miller compensation (2014) (1)
- Understanding Metastability in SAR ADCs: Part I: Synchronous (2019) (1)
- Sensory Particles with Optical Telemetry (2020) (1)
- The IMPACT Common Module - A Low Cost, Reconfigurable Building Block for Next Generation Phased Arrays (2016) (1)
- Single-chip mixer-based subarray beamformer for sub-Nyquist sampling in ultrasound imaging (2021) (1)
- Low-power analog signal processing (2012) (1)
- Digitally assisted analog circuits (2005) (1)
- The New Era of Nano-chips: Green and Intelligent (2020) (1)
- Wearable System Design using Intrinsically Stretchable Temperature Sensor (2020) (1)
- Low-voltage organic field-effect transistors for flexible electronics (2014) (1)
- A 4-bit Mixed-Signal MAC Array with Swing Enhancement and Local Kernel Memory (2021) (1)
- Basic Sizing Using the gm/ID Methodology (2017) (0)
- F4: Electronics for a Quantum World (2021) (0)
- Low-voltage polymer transistors on hydrophobic dielectrics and surfaces (2023) (0)
- Systems on Nanoscale Information fabriCs Outcomes and Future Prospects (2018) (0)
- Implications of Finite Clock Transition Time for LPTV Circuit Analysis (2020) (0)
- Session 1 overview: Plenary Session (2010) (0)
- Teaching an old dog new tricks: Views on the future of mixed-signal IC design (2014) (0)
- Edge Computing for Smart Buildings (2019) (0)
- A Single-Transistor Amplifier With Back-Gate Feedback in 22-nm FD-SOI (2022) (0)
- F6: Mixed-signal/RF design and modeling in next-generation CMOS (2013) (0)
- TRIG (2018) (0)
- Analog-to-Information Conversion (2020) (0)
- The Thirties (2020) (0)
- Lookup Table Generation and Usage (2017) (0)
- Enhancing the Energy Efficiency and Robustness of tinyML Computer Vision Using Coarsely-Quantized Log-Gradient Input Images (2023) (0)
- 4.25Gb/sLaserDriver: DesignChallenges andEDAToolLimitations (2006) (0)
- A 32 Gb/s PAM-4 Optical Transceiver With Active Back Termination in 40 nm CMOS Technology (2021) (0)
- Noise, Distortion and Mismatch (2017) (0)
- One Chip Mixer-Based Subarray Beamformer for Ultrasound Imaging with Sub-Nyquist Rate ADC (2020) (0)
- Foreword: Intelligent Chips for a Smart World (2017) (0)
- Predictive control algorithm for phase-locked loops (2008) (0)
- A 56 GS/s 8-bit 0.011 mm2 4x Delta-Interleaved Switched-Capacitor DAC in 16nm FinFET CMOS (2022) (0)
- A 0.6–1.8-mW 3.4-dB NF Mixer-First Receiver With an N-Path Harmonic-Rejection Transformer-Mixer (2022) (0)
- Introduction to the Special Issue on the 2010 IEEE International Solid-State Circuits Conference (2010) (0)
- Session 26 overview: High-speed data converters (2013) (0)
- 4.25 Gb/s laser driver: design challenges and EDA tool limitations (2006) (0)
- Clock Synchronous Reset and Skew Calibration of 65GS/s ADCs in A Multi-Lane Coherent Receiver (2018) (0)
- Distortion Analysis of $RC$ Integrators With Wideband Input Signals (2020) (0)
- Linearity Performance of Derivative Superposition in GaN HEMTs: A Device-to-Circuit Perspective (2023) (0)
- Practical Circuit Examples I (2017) (0)
- Eliminating complex conjugate poles in two-stage operational amplifiers with current buffer Miller compensation (2014) (0)
- Bridging the Physical and Digital Worlds in Data-Driven Systems (2022) (0)
- Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables (2023) (0)
- Assessing circuit design parameters for lower-power clinically-viable intracortical brain-computer interfaces (2018) (0)
- High Speed DACs for Millimeter Wave Digital Arrays in FinFET CMOS (2019) (0)
- Data converter breakthroughs in retrospect (2011) (0)
- SSCD Runs Inaugural Workshop on Hardware Security [Society News] (2021) (0)
- Basic Transistor Modeling (2017) (0)
- The Fourth Terminal: A Comprehensive Guide to Making Your Transistors More Agile: Book Review [Society News] (2020) (0)
- Unusual Data-Converter Techniques (2008) (0)
- Data Compression versus Signal Fidelity Trade-off in Wired-OR ADC Arrays for Neural Recording (2022) (0)
- Adaptive Beamforming for Wireless Powering of a Network of Ultrasonic Implants (2022) (0)
- Calibrated time-interleaved high-speed ADCs (2014) (0)
- The EKV Parameter Extraction Algorithm (2017) (0)
- Mitigation of Timing Skew (2012) (0)
- An Energy Harvester Using Image Sensor Pixels With Cold Start and Over 96% MPPT Efficiency (2019) (0)
- Mixed-signal circuits for the data-driven world (2016) (0)
- Tailoring electrode surface charge to achieve discrimination and quantification of chemically similar small molecules with electrochemical aptamers (2022) (0)
- Innovating at Speed and at Scale: A Next Generation Infrastructure for Accelerating Semiconductor Technologies (2022) (0)
This paper list is powered by the following services:
Other Resources About Boris Murmann
What Schools Are Affiliated With Boris Murmann?
Boris Murmann is affiliated with the following schools: