Catherine Gebotys

Catherine Gebotys's AcademicInfluence.com Rankings

Catherine Gebotys

Computer Science

#11155

World Rank

#11787

Historical Rank

Computer Engineering

#170

World Rank

#172

Historical Rank

computer-science Degrees

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Computer Science

Why Is Catherine Gebotys Influential?

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According to Wikipedia, Catherine H. Gebotys is a Canadian computer engineer specializing in the security of embedded systems and in cryptographic algorithms more She is a professor of electrical and computer engineering at the

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Catherine Gebotys's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Faster Explicit Formulas for Computing Pairings over Ordinary Curves (2011) (203)
A global optimization approach for architectural synthesis (1990) (149)
EM Analysis of Rijndael and ECC on a Wireless Java-Based PDA (2005) (129)
Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines (2009) (92)
Simultaneous scheduling and allocation for cost constrained optimal architectural synthesis (1991) (76)
Low Energy Memory And Register Allocation Using Network Flow (1997) (73)
Optimal VLSI Architectural Synthesis (1992) (69)
A framework for security on NoC technologies (2003) (68)
PUFs Deep Attacks: Enhanced modeling attacks using deep learning techniques to break the security of double arbiter PUFs (2019) (61)
Optimal synthesis of high-performance architectures (1992) (59)
Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor (2002) (57)
DSP address optimization using a minimum cost circulation technique (1997) (53)
Efficient Techniques for High-Speed Elliptic Curve Cryptography (2010) (52)
VLSI design synthesis with testability (1988) (52)
A table masking countermeasure for low-energy secure embedded systems (2006) (44)
Fast Multibase Methods and Other Several Optimizations for Elliptic Curve Scalar Multiplication (2009) (43)
Optimal VLSI Architectural Synthesis: Area, Performance and Testability (1991) (42)
Optimal scheduling and allocation of embedded VLSI chips (1992) (36)
An empirical comparison of algorithmic, instruction, and architectural power prediction models for high performance embedded DSP processors (1998) (35)
Security in Embedded Devices (2009) (34)
A new correlation frequency analysis of the side channel (2010) (34)
Security wrappers and power analysis for SoC technology (2003) (33)
Changing Interaction of Compiler and Architecture (1997) (33)
An optimization approach to the synthesis of multichip architectures (1994) (33)
An efficient model for DSP code generation: performance, code size, estimated energy (1997) (31)
FPGA Implementation of an HMAC Processor based on the SHA-2 Family of Hash Functions (2011) (30)
Optimal synthesis of multichip architectures (1992) (29)
Current flattening in software and hardware for security applications (2004) (27)
Design of secure cryptography against the threat of power-attacks in DSP-embedded processors (2004) (26)
Throughput optimized architectural synthesis (1993) (26)
Power minimization derived from architectural-usage of VLIW processors (2000) (26)
A countermeasure for EM attack of a wireless PDA (2005) (25)
Statistically based prediction of power dissipation for complex embedded DSP processors (1999) (24)
Low energy security optimization in embedded cryptographic systems (2004) (23)
Novel Precomputation Schemes for Elliptic Curve Cryptosystems (2009) (22)
Setting Speed Records with the (Fractional) Multibase Non-Adjacent Form Method for Efficient Elliptic Curve Scalar Multiplication (2008) (20)
Adaptive Restart and CEGAR-Based Solver for Inverting Cryptographic Hash Functions (2016) (20)
Efficient fault tolerant SHA-2 hash functions for space applications (2009) (20)
Synthesizing Embedded Speed-optimized Architectures (1992) (19)
EM Fault Injection on ARM and RISC-V (2020) (18)
Integration of algorithmic VLSI synthesis with testability incorporation (1988) (18)
EM analysis of a wireless Java-based PDA (2008) (17)
A Quantitative Analysis of a Novel SEU-Resistant SHA-2 and HMAC Architecture for Space Missions Security (2013) (17)
A split-mask countermeasure for low-energy secure embedded systems (2006) (17)
Current Flattening in Software and Hardware for Security Applications (2004) (15)
Locking it down (2017) (14)
Current consumption dynamics at instruction and program level for a VLIW DSP processor (2001) (14)
Efficient Technique for the FPGA Implementation of the AES MixColumns Transformation (2009) (14)
Side Channel Analysis using giant magneto-resistive (GMR) sensors (2011) (14)
An efficient fault-tolerance technique for the Keyed-Hash Message Authentication Code (2010) (13)
An Approach for Recovering Satellites and their Cryptographic Capabilities in the Presence of SEUs and Attacks (2008) (13)
Methodology for EM Fault Injection: Charge-based Fault Model (2019) (13)
Tailoring a Reconfigurable Platform to SHA-256 and HMAC through Custom Instructions and Peripherals (2009) (12)
A Propagation Rate Based Splitting Heuristic for Divide-and-Conquer Solvers (2017) (12)
SEU-resistant SHA-256 design for security in satellites (2008) (11)
Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis (2008) (11)
A minimum-cost circulation approach to DSP address-code generation (1999) (11)
A Phase Substitution Technique for DEMA of Embedded Cryptographic Systems (2007) (11)
An optimal methodology for synthesis of DSP multichip architectures (1995) (11)
Methodology for attack on a Java-based PDA (2006) (10)
SARFUM: Security Architecture for Remote FPGA Update and Monitoring (2010) (10)
Preaveraging and Carry Propagate Approaches to Side-Channel Analysis of HMAC-SHA256 (2016) (10)
Algebraic Fault Attack on SHA Hash Functions Using Programmatic SAT Solvers (2018) (10)
Complexities in DSP software compilation: performance, code size, power, retargetability (1998) (9)
Power minimization in heterogeneous processing (1996) (8)
A SEU-resistant, FPGA-based implementation of the substitution transformation in AES for security on satellites (2008) (8)
Optimal mapping of DSP application to architectures (1993) (7)
Optimal design of cathodic protection schemes: a power engineering applications (1993) (7)
EM alignment using phase for secure embedded systems (2008) (7)
Synthesis of throughput-optimized multichip architectures (1993) (7)
Analysis of Efficient Techniques for Fast Elliptic Curve Cryptography on x86-64 based Processors (2010) (6)
Forward-Secure Content Distribution to Reconfigurable Hardware (2008) (6)
A Sliding Window Phase-Only Correlation Method for Side-Channel Alignment in a Smartphone (2015) (6)
Going Deep: Using deep learning techniques with simplified mathematical models against XOR BR and TBR PUFs (Attacks and Countermeasures) (2020) (5)
Network Flow Approach to Data Regeneration for Low Energy Embedded System Synthesis (1998) (5)
Low energy memory component design for cost-sensitive high performance embedded systems (1996) (5)
Instantaneous current modeling in a complex VLIW processor core (2005) (5)
Synthesizing optimal registerfile architectures for FPGA technology (1994) (5)
Side channel aware leakage management in nanoscale Cryptosystem-on-Chip (CoC) (2009) (5)
Circumventing Uniqueness of XOR Arbiter PUFs (2019) (5)
Quiescent photonics side channel analysis: Low cost SRAM readout attack (2021) (5)
Current dynamics-based macro-model for power simulation in a complex VLIW DSP processor (2002) (5)
Analysis of Dynamic Laser Injection and Quiescent Photon Emissions on an Embedded Processor (2020) (4)
Performance-power optimization of memory components for complex embedded systems (1997) (4)
Enhanced Current-Balanced Logic (ECBL): An Area Efficient Solution to Secure Smart Cards against Differential Power Attack (2007) (4)
A dynamic programming approach to complex allocation in a DSP pipelined processor (2001) (4)
Designing for low power in complex embedded DSP systems (1999) (4)
On the specification of symmetric key management parameters for secure space missions (2012) (4)
EM Analysis of Rijndael and ECC on a PDA (2005) (4)
Methodology for minimizing power with DSP code (2000) (4)
A network flow approach to memory bandwidth utilization in embedded DSP core processors (2002) (4)
Utilizing memory bandwidth in DSP embedded processors (2001) (3)
Elliptic Curve Protocols (2010) (3)
Application-specific architectures for field-programmable VLSI technologies (1994) (3)
Cost constrained optimal architectural synthesis (1991) (2)
Introduction to Integer Programming (1992) (2)
Secure and safety-critical vs. insecure, non safety-critical embedded systems: do they require completely different design approaches? (2004) (2)
Summary and Future Research (1991) (2)
Optimal synthesis of high performance architectures (1991) (2)
Leakage Power and Side Channel Security of Nanoscale Cryptosystem-on-Chip (CoC) (2009) (2)
Security-driven exploration of cryptography in DSP cores (2002) (2)
Integrated design and test synthesis (1988) (2)
Synthesizing Optimal Application-Specific DSP Architectures (1994) (2)
Symmetric Key Protocols Including Ciphers (2010) (1)
Modeling and applications of current dynamics in a complex processor core (2003) (1)
State of the Art Synthesis (1992) (1)
Secure and Safety-Critical vs. Insecure, Non Safety-Critical Embedded Systems: Do They Require Completely Different Design Approaches? (2004) (1)
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008 (2008) (1)
TPM-supported key agreement protocols for increased autonomy in constellation of spacecrafts (2016) (1)
Counteracting power analysis attack using Static Single-ended Logic (2011) (1)
Data Integrity and Message Authentication (2010) (1)
SCA Countermeasures for ECC over Binary Fields on a VLIW DSP Core (2003) (0)
Testability In Architectural Synthesis (1991) (0)
Third Order Differential Analysis and A Split Mask Countermeasure For Low Energy Embedded Processors (2004) (0)
Low-Power Software Techniques (2005) (0)
Power M inimization in Heterogeneous Processing (1996) (0)
Optimizing Energy During Systems Synthesis of Computer Intensive Realtime Applications (1998) (0)
Support for Algorithmic Constructs (1992) (0)
The Influence of DSP Processor Architectures on Code Compilation Difficulties (2000) (0)
Session details: Embedded systems (2007) (0)
DEPUTYEDITOR-IN-CHIEF (2014) (0)
Simultaneous Scheduling, and Selection and Allocation of Functional Units (1992) (0)
Summary, Standards, and Ongoing Efforts (2010) (0)
Editorial Introduction of New Associate Editors (2013) (0)
Analysis of Dynamic Laser Injection and Quiescent Photon Emissions on an Embedded Processor (2020) (0)
A methodology for secure recovery of spacecrafts based on a trusted hardware platform (2017) (0)
Session details: Keynote address (2008) (0)
Special Session: ecuriuy on SOG (2002) (0)
Special session: security on SoC (2002) (0)
Oasic Synthesis Results (1991) (0)
Low energy security optimization in embedded cryptographic systems (2004) (0)
Side Channel Attacks on the Embedded System (2010) (0)
Modeling Power Dynamics for an Embedded DSP Processor Core. An Empirical Model (2001) (0)
The Catree Architectural Synthesis with Testability (1991) (0)
Global VLSI Design Cycle (1992) (0)
Revisiting the determination of cryptoperiods for authentication primitives in telecommand, telemetry, and payload links (2016) (0)
Differential Analysis of a Low Energy Table-based Countermeasure for Secure Embedded Systems (2005) (0)
Reliable Testable Secure Systems (2010) (0)
Behavioral and Structural Interfaces (1992) (0)
Where Security Began (2010) (0)
Oasic: Area-Delay Constrained Architectural Synthesis (1992) (0)
Optimized mapping of video applications to hardware-software for VLSI architectures (1995) (0)
A Methodology for Architectural Synthesis (1992) (0)
Quiescent photonics side channel analysis: Low cost SRAM readout attack (2021) (0)
Introduction to Secure Embedded Systems (2010) (0)
An Energy-Efficient Image Representation for Secure Mobile Systems (2005) (0)
Differential Analysis Using Phase-Substitution (2007) (0)

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Other Resources About Catherine Gebotys

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What Schools Are Affiliated With Catherine Gebotys?

Catherine Gebotys is affiliated with the following schools:

University of Waterloo