Chen Xingbi
#97,232
Most Influential Person Now
Chinese electronics engineer
Chen Xingbi's AcademicInfluence.com Rankings
Chen Xingbiengineering Degrees
Engineering
#5555
World Rank
#6816
Historical Rank
Applied Physics
#3051
World Rank
#3119
Historical Rank
Download Badge
Engineering
Chen Xingbi's Degrees
- Bachelors Electrical Engineering Tsinghua University
- Masters Electronics Engineering Peking University
- PhD Electronics Engineering Zhejiang University
Why Is Chen Xingbi Influential?
(Suggest an Edit or Addition)According to Wikipedia, Chen Xingbi was a Chinese electronics engineer and professor at the University of Electronic Science and Technology of China. Known for his invention of superjunction power semiconductor devices, he was elected an academician of the Chinese Academy of Sciences and a life fellow of the Institute of Electrical and Electronics Engineers . He was inducted into IEEE's ISPSD Hall of Fame in 2019.
Chen Xingbi's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- Optimization of the specific on-resistance of the COOLMOS/sup TM/ (2001) (164)
- Theory of a novel voltage-sustaining layer for power devices (1998) (110)
- A Vertical Power MOSFET With an Interdigitated Drift Region Using High- $k$ Insulator (2012) (63)
- Analysis and Fabrication of an LDMOS With High-Permittivity Dielectric (2011) (58)
- Theory of optimum design of reverse-biased p-n junctions using resistive field plates and variation lateral doping (1992) (50)
- A novel high-voltage sustaining structure with buried oppositely doped regions (2000) (45)
- A High-Speed Deep-Trench MOSFET With a Self-Biased Split Gate (2010) (34)
- A New Solution for Superjunction Lateral Double Diffused MOSFET by Using Deep Drain Diffusion and Field Plates (2015) (30)
- An Investigation of a Novel Snapback-Free Reverse-Conducting IGBT and With Dual Gates (2012) (29)
- Optimization of Specific On-Resistance of Balanced Symmetric Superjunction MOSFETs Based on a Better Approximation of Ionization Integral (2012) (28)
- An Improved Superjunction Structure With Variation Vertical Doping Profile (2015) (26)
- A 300-V Ultra-Low-Specific On-Resistance High-Side p-LDMOS With Auto-Biased n-LDMOS for SPIC (2017) (24)
- Optimum doping profile of power MOSFET epitaxial layer (1982) (23)
- Lateral high-voltage devices using an optimized variational lateral doping (1996) (21)
- A novel snapback-free reverse conducting IGBT with anti-parallel Shockley diode (2013) (20)
- Vertical Power ${\rm H}k$-MOSFET of Hexagonal Layout (2013) (20)
- An Ultralow Specific ON-Resistance LDMOST Using Charge Balance by Split p-Gate and n-Drift Regions (2013) (19)
- A novel diode-clamped CSTBT with ultra-low on-state voltage and saturation current (2016) (19)
- Correction to "Optimization of the specific on-resistance of the COOLMOS/sup TM/" (2001) (17)
- Simulation Study of a Low ON-State Voltage Superjunction IGBT With Self-Biased PMOS (2019) (15)
- Snapback-free reverse-conducting IGBT with low turnoff loss (2014) (13)
- Study of the SOI LDMOS With Low Conduction Loss and Less Gate Charge (2018) (13)
- Optimization of Specific on-Resistance of Semisuperjunction Trench MOSFETs with Charge Balance (2013) (12)
- A High-Voltage “Quasi-p-LDMOS” Using Electrons as Carriers in Drift Region Applied for SPIC (2018) (11)
- Study on Dual Channel n-p-LDMOS Power Devices With Three Terminals (2013) (11)
- Theory of an improved vertical power MOSFET using high-k insulator (2015) (10)
- A TIGBT With Floating n-Well Region for High dV/dt Controllability and Low EMI Noise (2018) (10)
- Study on HK-VDMOS with Deep Trench Termination (2014) (10)
- Low specific on-resistance p-type OPTVLDLDMOS with double hole-conductive paths for SPIC application (2012) (9)
- High voltage low side and high side power devices based on VLD technique (2012) (9)
- An Improved SOI P-Channel LDMOS With High- ${k}$ Gate Dielectric and Dual Hole-Conductive Paths (2017) (9)
- A Low On-State Voltage and Saturation Current TIGBT With Self-Biased pMOS (2016) (9)
- Potential of Utilizing High- $k$ Film to Improve the Cost Performance of Trench LDMOS (2019) (8)
- A Practical Approach to Enhance Yield of OPTVLD Products (2013) (8)
- The Oppositely Doped Islands IGBT Achieving Ultralow Turn Off Loss (2019) (8)
- A variation laterl doping layer and lightly doped region compensated superjunction LDMOS (2016) (8)
- A study of second saturation effect of OPTVLD NMOS (2011) (8)
- New Planar Junction Edge Termination Technique Using OPTVLD With a Buried Layer (2013) (8)
- A novel high voltage start-up current source for SMPS (2012) (7)
- An Ultra-Low Specific ON-Resistance LDMOST With Self-Driven Split Gate (2015) (7)
- Breakthrough to the "Silicon limit" of power devices (1998) (7)
- Simulation Study of a Low ON-State Voltage and Saturation Current TCIGBT With Diodes (2019) (6)
- Simulation Study of a Low Switching Loss FD-IGBT With High $dI/dt$ and $dV/dt$ Controllability (2018) (6)
- A Novel Low Turn-Off Loss and Snapback-Free Reverse-Conducting SOI-LIGBT With Integrated Polysilicon Diodes (2019) (6)
- Simulation Study of a Super-Junction Deep-Trench LDMOS With a Trapezoidal Trench (2018) (6)
- A Snapback-Free and Low Turn-Off Loss Reverse-Conducting SOI-LIGBT With Embedded Diode and MOSFET (2019) (6)
- ANALYSIS OF THERMAL CHARACTERISTICS OF VDMOS POWER TRANSISTORS (1991) (5)
- A new low specific on-resistance Hk-LDMOS with N-poly diode (2017) (5)
- A Novel Voltage Sensor-less Control Technique Synthesis for a Boost AC/DC Pre-regulator (2006) (5)
- Design of a Double-Gate Power LDMOS With Improved SOA by Complementary Majority Carrier Conduction Paths (2016) (5)
- A Novel Isolation Method for Half-Bridge Power ICs (2013) (5)
- A Novel Low on-State Voltage SOI LIGBT With Enhanced Conductivity Modulation (2019) (5)
- An Ultralow Turn-Off Loss SOI-LIGBT With a High-Voltage p-i-n Diode Integrated on Field Oxide (2019) (5)
- A Novel No Miller Plateau SOI-LIGBT With Low Saturation Current and Improved Switching Performance (2020) (5)
- A Negative Low-Voltage Power Supply Integrated With High-Voltage Devices (2018) (4)
- A new super-junction VDMOS realizing fast reverse recovery (2015) (4)
- New “silicon limit” of power devices (2002) (4)
- An improved SOI trench LDMOST with double vertical high-k insulator pillars (2018) (4)
- Trench Shielded Planar Gate IGBT (TSPG-IGBT) With Self-Biased pMOS Realizing Both Low On-State Voltage and Low Saturation Current (2020) (4)
- A Novel IGBT With High- ${k}$ Dielectric Modulation Achieving Ultralow Turn-Off Loss (2020) (3)
- An Ultra-Low On-Resistance Triple RESURF Tri-Gate LDMOS Power Device (2019) (3)
- A Novel Control Technique for Digital Power Factor Correction (2006) (3)
- TIGBT with emitter‐embedded gate for low turn‐on loss and low electro‐magnetic interference noise (2018) (3)
- A 600-V Super-Junction pLDMOS Utilizing Electron Current to Enhance Current Capability (2019) (3)
- An analytical model for electric field distribution of positively beveled abrupt PN junctions (1997) (3)
- An Novel Thin Layer SOI Carrier-Stored Trench LIGBT With Enhanced Emitter Injection (2019) (3)
- A novel double trench reverse conducting IGBT with robust freewheeling switch (2014) (2)
- A Novel Diode-Clamped Carrier-Stored SOI Lateral Superjunction IGBT with Ultralow Turn-off Loss and Saturation Current (2019) (2)
- A novel low-side structure for OPTVLD-SPIC technologically compatible with BiCMOS (2013) (2)
- A Novel p-LDMOS Additionally Conducting Electrons by Control ICs (2019) (2)
- Analysis and Fabrication of an LDMOS With (2011) (2)
- Novel technique for lateral high-voltage totem-pole power devices (2014) (2)
- A novel SCR-LDMOS for high voltage ESD protection (2015) (2)
- A high-voltage p-LDMOS with enhanced current capability comparable to double RESURF n-LDMOS (2018) (2)
- A novel CMOS positive to negative voltage converter and regulator (2017) (2)
- An integrated Low Voltage Power Supply with self-voltage-clamped characteristic (2010) (2)
- A Simple Analysis on the Function of the Conductive Particles in the Insulator Voltage-Sustaining Layer for Power Devices (2018) (2)
- Study on layouts design of the voltage sustaining layer using high-k insulator (2014) (2)
- A versatile low-cost smart power technology platform for applications over broad current and voltage ranges (2013) (2)
- Deep trench junction termination employing variable-K dielectric for high voltage devices (2015) (2)
- Study on A Novel Trench LDMOS with Double Deep Trenches and Superjunction (2019) (2)
- A Novel Shielded IGBT (SIGBT) With Integrated Diodes (2020) (2)
- Vertical power Schottky barrier diodes using a high-k insulator (2015) (2)
- Effect of Cu-site Spin Polarization on Zhang–Rice State (2010) (1)
- A novel level-shifter integrated on the edge termination region of the high voltage device (2017) (1)
- A Novel 3.3-kV Integrated ETO (IETO) With Single-Gate Controlling (2020) (1)
- Multilevel Low-Voltage Power Supplies Capable of Integrating With High-Voltage Devices (2017) (1)
- Simulation Study of Trench IGBT with Diode-Clamped P-Well for High dI/dt and dV/dt Controllability (2019) (1)
- A Novel Double-RESURF SOI-LIGBT With Improved $V_{\mathrm{\scriptscriptstyle ON}}-{E}_{ \mathrm{\scriptscriptstyle OFF}}$ Tradeoff and Low Saturation Current (2020) (1)
- A Novel Double-RESURF SOI Lateral TIGBT With Self-Biased nMOS for Improved ${V}_{\text{CE(sat)}}$ – ${E}_{\text{off}}$ Tradeoff Relationship (2019) (1)
- An analytical model for SOI triple RESURF devices (2011) (1)
- A Novel Low Channel Resistance LDMOS with Planar and Trench Gates (2019) (1)
- A Novel Diode-Clamped Carrier Stored Trench IGBT With Improved Performances (2020) (1)
- A High Speed High Voltage Normally-off SiC Vertical JFET Power Device (2019) (1)
- An LDMOS with large SOA and low specific on-resistance (2016) (1)
- A new high-voltage level-shifting circuit for half-bridge power ICs (2013) (1)
- Simulation study on a novel snapback-free and low turn-off loss reverse-conducting SOI-LIGBT with P-type double trench gates on the anode region (2019) (1)
- A novel Electrostatic Discharge protection design based on SCR (2010) (1)
- Simulation study of a novel thin layer SOI carrier-stored TLIGBT with self-biased pMOS (2019) (0)
- Novel high-voltage, high-side and low-side power devices with a single control signal (2013) (0)
- Simulation Study on Novel High Voltage Transient Voltage Suppression Diodes (2019) (0)
- A novel PMOS controlled high voltage current source (2010) (0)
- LDMOS with Variable-k Dielectric for Improved Breakdown Voltage and Specific On-resistance (2019) (0)
- Simulation Study of a Low Switching Loss FD-IGBT With High <inline-formula> <tex-math notation="LaTeX">$dI/dt$ </tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">$dV/dt$ </tex-math> </inline-fo (2018) (0)
- Low on-state voltage and saturation current Trench Insulated Gate Bipolar Transistor with integrated Zener diode (2017) (0)
- A Novel Fast-Switching SOI LIGBT with Anode Junction Paralleled by a Diode (2019) (0)
- Study on a novel junction edge termination for HK-MOSFET (2016) (0)
- A Positive Low-Voltage Power Supply Integrated With High-Voltage Devices (2019) (0)
- A novel snapback-free reverse-conducting (RC) SOI-LIGBT with a built-in thyristor (2019) (0)
- A Low On-state Voltage and Large Current Capability Thin SOI-LIGBT with Trench NMOS (2019) (0)
- A New Carrier Stored Trench IGBT Realizing Both Ultra Low $V_{\text{on}}$ and Turn-off loss (2019) (0)
- Increasing breakdown voltage of LDMOST using buried layer (2003) (0)
- Study on Conductivity Degradation of High-k VDMOS Caused by Ferroelectricity (2019) (0)
- A low on-state voltage TIGBT with planar gate self-biased pMOS (2017) (0)
This paper list is powered by the following services:
Other Resources About Chen Xingbi
What Schools Are Affiliated With Chen Xingbi?
Chen Xingbi is affiliated with the following schools:
