Christoforos E. Kozyrakis
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Christoforos E. Kozyrakis's AcademicInfluence.com Rankings
Christoforos E. Kozyrakisengineering Degrees
Engineering
#6079
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#7379
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Electrical Engineering
#1760
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#1859
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Christoforos E. Kozyrakiscomputer-science Degrees
Computer Science
#7907
World Rank
#8322
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Parallel Computing
#39
World Rank
#41
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Computer Architecture
#49
World Rank
#51
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Database
#4966
World Rank
#5159
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Engineering Computer Science
Christoforos E. Kozyrakis's Degrees
- PhD Electrical Engineering Stanford University
- Masters Electrical Engineering Stanford University
- Bachelors Electrical Engineering National Technical University of Athens
Why Is Christoforos E. Kozyrakis Influential?
(Suggest an Edit or Addition)Christoforos E. Kozyrakis's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- Evaluating MapReduce for Multi-core and Multiprocessor Systems (2007) (1089)
- STAMP: Stanford Transactional Applications for Multi-Processing (2008) (995)
- Quasar: resource-efficient and QoS-aware cluster management (2014) (925)
- Transactional memory coherence and consistency (2004) (760)
- Paragon: QoS-aware scheduling for heterogeneous datacenters (2013) (726)
- A case for intelligent RAM (1997) (658)
- The case for RAMClouds: scalable high-performance storage entirely in DRAM (2010) (544)
- ZSim: fast and accurate microarchitectural simulation of thousand-core systems (2013) (492)
- Understanding sources of inefficiency in general-purpose chips (2010) (484)
- Heracles: Improving resource efficiency at scale (2015) (473)
- TETRIS: Scalable and Efficient Neural Network Acceleration with 3D Memory (2017) (418)
- IX: A Protected Dataplane Operating System for High Throughput and Low Latency (2014) (380)
- On the energy (in)efficiency of Hadoop clusters (2010) (373)
- A Comparison of High-Level Full-System Power Models (2008) (342)
- Raksha: a flexible information flow architecture for software security (2007) (325)
- An effective hybrid transactional memory system with strong isolation guarantees (2007) (307)
- JouleSort: a balanced energy-efficiency benchmark (2007) (303)
- Towards energy proportionality for large-scale latency-critical workloads (2014) (283)
- Phoenix rebirth: Scalable MapReduce on a large-scale shared-memory system (2009) (267)
- Dune: Safe User-level Access to Privileged CPU Features (2012) (259)
- Towards energy-proportional datacenter memory with mobile DRAM (2012) (248)
- Vantage: Scalable and efficient fine-grain cache partitioning (2011) (237)
- Reconciling high server utilization and sub-millisecond quality-of-service (2014) (231)
- Practical Near-Data Processing for In-Memory Analytics Frameworks (2015) (226)
- Scalable Processors in the Billion-Transistor Era: IRAM (1997) (223)
- RAMP: Research Accelerator for Multiple Processors (2007) (215)
- A Case for Intelligent RAM: IRAM (1997) (207)
- Pocket: Elastic Ephemeral Storage for Serverless Analytics (2018) (197)
- The ZCache: Decoupling Ways and Associativity (2010) (193)
- Architectural Semantics for Practical Transactional Memory (2006) (187)
- The Atomos transactional programming language (2006) (187)
- Convolution engine: balancing efficiency & flexibility in specialized computing (2013) (177)
- The case for RAMCloud (2011) (176)
- Tarcil: reconciling scheduling speed and quality in large shared clusters (2015) (168)
- Energy-Efficient Abundant-Data Computing: The N3XT 1,000x (2015) (165)
- Plasticine: A reconfigurable architecture for parallel patterns (2017) (164)
- A New Direction for Computer Architecture Research (1998) (160)
- Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks (2002) (158)
- HRL: Efficient and flexible reconfigurable logic for near-data processing (2016) (156)
- QoS-Aware scheduling in heterogeneous datacenters with paragon (2013) (151)
- A Scalable, Non-blocking Approach to Transactional Memory (2007) (147)
- GraphP: Reducing Communication for PIM-Based Graph Processing with Efficient Data Partition (2018) (147)
- Programming with transactional coherence and consistency (TCC) (2004) (141)
- From Laptop to Lambda: Outsourcing Everyday Jobs to Thousands of Transient Functional Containers (2019) (139)
- Spatial: a language and compiler for application accelerators (2018) (139)
- Evaluating Bufferless Flow Control for On-chip Networks (2010) (137)
- Learning Memory Access Patterns (2018) (136)
- Intelligent RAM (IRAM): chips that remember and compute (1997) (135)
- Power Management of Datacenter Workloads Using Per-Core Power Gating (2009) (134)
- Flexible architectural support for fine-grain scheduling (2010) (128)
- The Energy Efficiency Of Iram Architectures (1997) (126)
- An analysis of on-chip interconnection networks for large-scale chip multiprocessors (2010) (125)
- HCloud: Resource-Efficient Provisioning in Shared Cloud Systems (2016) (124)
- Comparing memory systems for chip multiprocessors (2007) (120)
- ReFlex: Remote Flash ≈ Local Flash (2017) (119)
- Future scaling of processor-memory interfaces (2009) (118)
- Flash storage disaggregation (2016) (115)
- Models and Metrics to Enable Energy-Efficiency Optimizations (2007) (115)
- SCD: A scalable coherence directory with flexible sharer set encoding (2012) (111)
- Shinjuku: Preemptive Scheduling for μsecond-scale Tail Latency (2019) (111)
- The common case transactional behavior of multithreaded programs (2006) (108)
- Scalable Vector Media-processors for Embedded Systems (2002) (105)
- TANGRAM: Optimized Coarse-Grained Dataflow for Scalable NN Accelerators (2019) (103)
- Overcoming the limitations of conventional vector processors (2003) (102)
- Server Engineering Insights for Large-Scale Online Services (2010) (101)
- Hardware Enforcement of Application Security Policies Using Tagged Memory (2008) (99)
- iBench: Quantifying interference for datacenter applications (2013) (97)
- Nemesis: Preventing Authentication & Access Control Vulnerabilities in Web Applications (2009) (97)
- Automatic Generation of Efficient Accelerators for Reconfigurable Hardware (2016) (96)
- The OpenTM Transactional Application Programming Interface (2007) (95)
- Scalable Vector Processors for Embedded Systems (2003) (88)
- Tradeoffs in transactional memory virtualization (2006) (84)
- Unlocking Concurrency (2006) (82)
- Decoupling Dynamic Information Flow Tracking with a dedicated coprocessor (2009) (80)
- Characterization of TCC on chip-multiprocessors (2005) (77)
- Eigenbench: A simple exploration tool for orthogonal TM characteristics (2010) (75)
- A practical FPGA-based framework for novel CMP research (2007) (75)
- The stream virtual machine (2004) (75)
- Transactional coherence and consistency: simplifying parallel hardware and software (2004) (75)
- Understanding Ephemeral Storage for Serverless Analytics (2018) (71)
- Energy proportionality and workload consolidation for latency-critical applications (2015) (69)
- Generating Configurable Hardware from Parallel Patterns (2015) (69)
- Memory Hierarchy for Web Search (2018) (67)
- From chaos to QoS: case studies in CMP resource management (2007) (65)
- Bolt: I Know What You Did Last Summer... In The Cloud (2017) (64)
- Real-World Buffer Overflow Protection for Userspace and Kernelspace (2008) (62)
- Making pull-based graph processing performant (2018) (61)
- Intelligent RAM (IRAM): the industrial setting, applications, and architectures (1997) (61)
- Centralized Core-granular Scheduling for Serverless Functions (2019) (60)
- Selecta: Heterogeneous Cloud Storage Configuration for Data Analytics (2018) (60)
- Dynamic Fine-Grain Scheduling of Pipeline Parallelism (2011) (58)
- ATLAS: A Chip-Multiprocessor with Transactional Memory Support (2007) (56)
- Automatic power management schemes for Internet servers and data centers (2005) (55)
- Research accelerator for multiple processors (2006) (53)
- Dynamic management of TurboMode in modern multi-core chips (2014) (53)
- A Media-Enhanced Vector Architecture for Embedded Memory Systems (1999) (51)
- Amdahl's law for tail latency (2018) (50)
- AsmDB: Understanding and Mitigating Front-End Stalls in Warehouse-Scale Computers (2019) (50)
- Transactional collection classes (2007) (49)
- Thread-safe dynamic binary translation using transactional memory (2008) (47)
- INFaaS: Automated Model-less Inference Serving (2021) (45)
- ECHO: Recreating network traffic maps for datacenters with tens of thousands of servers (2012) (45)
- Testing implementations of transactional memory (2006) (45)
- DNN Dataflow Choice Is Overrated (2018) (44)
- Convolution engine (2015) (44)
- Vector Lane Threading (2006) (37)
- Corrigendum to “The IX Operating System: Combining Low Latency, High Throughput and Efficiency in a Protected Dataplane” (2017) (36)
- Locality-aware task management for unstructured parallelism: a quantitative limit study (2013) (36)
- Evaluation of Existing Architectures in IRAM Systems (1998) (34)
- The IX Operating System (2016) (34)
- Classifying Memory Access Patterns for Prefetching (2020) (33)
- Heuristics for profile-driven method-level speculative parallelization (2005) (33)
- Implementing and evaluating nested parallel transactions in software transactional memory (2010) (33)
- MARS: adaptive remote execution for multi-threaded mobile devices (2011) (31)
- Understanding sources of ineffciency in general-purpose chips (2011) (31)
- Llama: A Heterogeneous & Serverless Framework for Auto-Tuning Video Analytics Pipelines (2021) (30)
- Scalable and Efficient Fine-Grained Cache Partitioning with Vantage (2012) (30)
- Improving System Energy Efficiency with Memory Rank Subsetting (2012) (30)
- TAPE: a transactional application profiling environment (2005) (28)
- QoS-Aware Admission Control in Heterogeneous Datacenters (2013) (27)
- Quality-of-Service-Aware Scheduling in Heterogeneous Data centers with Paragon (2014) (27)
- Hardware acceleration of transactional memory on commodity systems (2011) (26)
- Feedback-directed barrier optimization in a strongly isolated STM (2009) (26)
- Faa$T: A Transparent Auto-Scaling Cache for Serverless Applications (2021) (26)
- Pipelined multi-queue management in a VLSI ATM switch chip with credit-based flow-control (1997) (26)
- DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric (2016) (25)
- How to solve the current memory access and data transfer bottlenecks: at the processor architecture or at the compiler level (2000) (25)
- Decoupling datacenter studies from access to large-scale applications: A modeling approach for storage workloads (2011) (24)
- A memory system design framework: creating smart memories (2009) (23)
- A Case for Managed and Model-less Inference Serving (2019) (20)
- Transactional Memory: The Hardware-Software Interface (2007) (20)
- Tainting is not pointless (2010) (19)
- ghOSt: Fast & Flexible User-Space Delegation of Linux Scheduling (2021) (19)
- Resource efficient computing for warehouse-scale datacenters (2013) (19)
- Mind the Gap: A Case for Informed Request Scheduling at the NIC (2019) (19)
- SmartHarvest: harvesting idle CPUs safely and efficiently in the cloud (2021) (18)
- Executing Java programs with transactional memory (2006) (18)
- Transactional programming in a multi-core environment (2007) (18)
- The Netflix Challenge: Datacenter Edition (2013) (18)
- Understanding data storage and ingestion for large-scale deep recommendation model training: industrial product (2021) (18)
- RackSched: A Microsecond-Scale Scheduler for Rack-Scale Computers (Technical Report) (2020) (16)
- Comparative evaluation of memory models for chip multiprocessors (2008) (16)
- Green enterprise computing data: Assumptions and realities (2012) (16)
- FARM: A Prototyping Environment for Tightly-Coupled, Heterogeneous Architectures (2010) (15)
- Advancing computer systems without technology progress (2013) (15)
- Register Pointer Architecture for Efficient Embedded Processors (2007) (15)
- Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler (2000) (14)
- Syrup: User-Defined Scheduling Across the Stack (2021) (14)
- QuMan: Profile-based Improvement of Cluster Utilization (2018) (14)
- Measuring and analyzing the energy use of enterprise computing systems (2013) (13)
- Interference-Aware Scheduling for Inference Serving (2021) (12)
- Leveraging application classes to save power in highly-utilized data centers (2020) (12)
- Simultaneously Improving Code Size, Performance, and Energy in Embedded Processors (2006) (11)
- Towards soft optimization techniques for parallel cognitive applications (2007) (11)
- Persona: A High-Performance Bioinformatics Framework (2017) (11)
- Plasticine: A Reconfigurable Accelerator for Parallel Patterns (2018) (11)
- Security Implications of Data Mining in Cloud Scheduling (2016) (10)
- 3D nanosystems enable embedded abundant-data computing: special session paper (2017) (10)
- DBOS: A DBMS-oriented Operating System (2021) (9)
- Making nested parallel transactions practical using lightweight hardware support (2010) (9)
- Implementing and Evaluating a Model Checker for Transactional Memory Systems (2010) (9)
- Energy-efficient and high-performance instruction fetch using a block-aware ISA (2005) (8)
- A case of system-level hardware/software co-design and co-verification of a commodity multi-processor system with custom hardware (2012) (8)
- Time and Cost-Efficient Modeling and Generation of Large-Scale TPCC/TPCE/TPCH Workloads (2011) (7)
- Cross-Examination of Datacenter Workload Modeling Techniques (2011) (6)
- RAIL: Predictable, Low Tail Latency for NVMe Flash (2022) (5)
- Potential show-stoppers for transactional synchronization (2007) (5)
- VIVA: An End-to-End System for Interactive Video Analytics (2022) (4)
- Optimizing Memory Transactions for Multicore Systems (2009) (4)
- A low power front-end for embedded processors using a block-aware instruction set (2007) (4)
- Improving Instruction Delivery with a Block-Aware ISA (2005) (4)
- AsmDB: Understanding and Mitigating Front-End Stalls in Warehouse-Scale Computers (2020) (4)
- Decoupling Datacenter Storage Studies from Access to Large-Scale Applications (2012) (4)
- SOL: safe on-node learning in cloud platforms (2022) (4)
- AppSwitch: Resolving the Application Identity Crisis (2017) (3)
- Fast memory snapshot for concurrent programmingwithout synchronization (2009) (3)
- Outsourcing Everyday Jobs to Thousands of Cloud Functions with gg (2019) (3)
- Improving software concurrency with hardware-assisted memory snapshot (2008) (3)
- Intelligent RAM (IRAM) (1997) (3)
- Trevor: Automatic configuration and scaling of stream processing pipelines (2018) (3)
- Hermod: principled and practical scheduling for serverless functions (2022) (3)
- Block-aware instruction set architecture (2006) (3)
- A case against (most) context switches (2021) (3)
- Parallelizing the Index-Nested-Loops Database Join Primitive on a Shared-Nothing Cluster (1998) (3)
- Storage I/O generation and replay for datacenter applications (2011) (2)
- A New Frontier for Pull-Based Graph Processing (2019) (2)
- Evaluating impact of manageability features on device performance (2010) (2)
- Intelligent Memory Systems (2001) (2)
- How to solve the current memory access and data transfer bottlenecks: at the processor architecture or at the compiler level? (2000) (2)
- Optimizing Video Analytics with Declarative Model Relationships (2022) (1)
- A New Direction for Computer Research (1998) (1)
- The stanford pervasive parallelism lab (2009) (1)
- Scaling Processors to 1 Billion Transistors andBeyond (1997) (1)
- Ased: availability, security, and debugging support usingtransactional memory (2008) (1)
- Towards μs tail latency and terabit ethernet: disaggregating the host network stack (2022) (1)
- Transactional memory implementation overview (2006) (1)
- A Polystore Based Database Operating System (DBOS) (2020) (1)
- DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric (2017) (1)
- The Architecture, Operation and Design of the Queue Management Block in the ATLAS I ATM Switch (1998) (1)
- Selected Research from Hot Chips 24 (2013) (0)
- Revised Papers from the Second International Workshop on Intelligent Memory Systems (2000) (0)
- Embedded memories in system design - from technology to systems architecture (1998) (0)
- The Hot Chips Renaissance (2020) (0)
- Summary of Question/Answer Sessions for Workshop Presentations (2001) (0)
- Merging processing and memory into a single DRAM chip could revolutionize the semiconductor industry . A CASE FOR INTELLIGENT RAM (1997) (0)
- The Energy Efficiencyof IRAM Architectures (1997) (0)
- A Collaborative Research Proposal to the NSF: Research Accelerator for Multiple Processors (RAMP) - A Shared Experimental Parallel HW/SW Platform (2008) (0)
- A few ways can take you a long way: Efficient and highly associative caches with scalable partitioning for many-core CMPs (2011) (0)
- RecD: Deduplication for End-to-End Deep Learning Recommendation Model Training Infrastructure (2022) (0)
- 次世代MPUアーキテクチャを多角的に検証する--モバイル機器に最適な「ベクトルIRAM」 (1999) (0)
- Uncovering the Security Implications of Cloud Multi-Tenancy with Bolt (2018) (0)
- Guest Editors' Introduction: Hot Chips Turns 20 (2009) (0)
- Intelligent Memory Systems: Second International Workshop, IMS 2000, Cambridge, MA, USA, November 12, 2000. Revised Papers (2001) (0)
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