Ǵabor C. Temes

Ǵabor C. Temes's AcademicInfluence.com Rankings

Ǵabor C. Temes

Engineering

#2576

World Rank

#3524

Historical Rank

Electrical Engineering

#481

World Rank

#535

Historical Rank

engineering Degrees

Download Badge

Engineering

Ǵabor C. Temes's Degrees

PhD Electrical Engineering Stanford University
Masters Electrical Engineering Stanford University

Why Is Ǵabor C. Temes Influential?

(Suggest an Edit or Addition)

(See a Problem?)

Ǵabor C. Temes's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Understanding Delta-Sigma Data Converters (2004) (2315)
Delta-sigma data converters : theory, design, and simulation (1997) (1874)
Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization (1996) (1784)
Delta-sigma data converters (1994) (988)
Analog MOS Integrated Circuits for Signal Processing (1986) (618)
Wideband low-distortion delta-sigma ADC topology (2001) (577)
Oversampling delta-sigma data converters : theory, design, and simulation (1992) (463)
Oversampling Delta Sigma Data Converters (1991) (391)
Random error effects in matched MOS capacitors and current sources (1984) (337)
Design-oriented estimation of thermal noise in switched-capacitor circuits (2005) (269)
Theory and applications of incremental ΔΣ converters (2004) (261)
Switched-capacitor circuit design (1983) (186)
A 20-V four-quadrant CMOS analog multiplier (1985) (186)
Introduction to Circuit Synthesis and Design (1977) (160)
Interpolation and Decimation of Digital SignalsA Tutorial Review (1992) (160)
A 16-bit low-voltage CMOS A/D converter (1987) (157)
Modern filter theory and design (1973) (149)
Random errors in MOS capacitors (1982) (148)
A high-resolution multibit Sigma Delta ADC with digital correction and relaxed amplifier requirements (1993) (136)
A low-power 22-bit incremental ADC (2006) (127)
Filter Design Using Transformed Variables (1968) (117)
Computer-aided network optimization the state-of-the-art (1967) (111)
Adaptive digital correction of analog errors in MASH ADCs. II. Correction using test-signal injection (2000) (110)
Finite amplifier gain and bandwidth effects in switched-capacitor filters (1980) (110)
A Higher Order Topology for Interpolative Modulators for Oversampling A/D Converters (1992) (99)
A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators (2005) (99)
Adaptive digital correction of analog errors in MASH ADCs. I. Off-line and blind on-line calibration (2000) (98)
Switched-capacitor filter design using the bilinear z-transform (1978) (92)
A differential switched-capacitor amplifier (1987) (91)
MOSFET-only switched-capacitor circuits in digital CMOS technologies (1997) (87)
A 1-V 10-MHz clock-rate 13-bit CMOS ΔΣ modulator using unity-gain-reset op amps (2002) (77)
Switched-capacitor integrators with low finite-gain sensitivity (1985) (75)
Narrow-band switched-capacitor bandpass filters (1982) (75)
An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and -98 dB THD (2009) (73)
High-accuracy circuits for on-chip capacitance ratio testing or sensor readout (1994) (72)
A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC (2008) (71)
Improved offset-compensation schemes for switched-capacitor circuits (1984) (70)
A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, ${-}$ 98 dB THD, and 79 dB SNDR (2008) (69)
Multibit oversampled Σ-Δ A/D convertor with digital error correction (1988) (67)
Digitally corrected multi-bit Sigma Delta data converters (1989) (65)
First-order sensitivity and worst case analysis of doubly terminated reactance two-ports (1973) (64)
A New Approach to Reducing Output Ripple in Switched-Capacitor-Based Step-Down DC–DC Converters (2006) (63)
The Delta¿¿¿Sigma Toolbox (2017) (63)
GaAs switched-capacitor circuits for high-speed signal processing (1987) (57)
A Micro-Power Two-Step Incremental Analog-to-Digital Converter (2015) (57)
Sturdy MASH - modulator (2006) (55)
Bilinear switched-capacitor ladder filters (1981) (53)
High-accuracy circuits for on-chip capacitive ratio testing and sensor readout (1998) (52)
Least pth Approximation (1969) (50)
Switched-capacitor filter design using bilinear element modeling (1980) (50)
Multirate Filter Designs Using Comb Filters (1992) (49)
Noise-shaping techniques applied to switched-capacitor voltage regulators (2005) (47)
The optimization of bandlimited systems (1973) (45)
Analog MOS integrated circuits (1988) (44)
A two-chip interface for a MEMS accelerometer (2002) (44)
An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and $-$98 dB THD (2008) (43)
Offset-compensated switched-capacitor integrators (1990) (42)
Noise–Power Optimization of Incremental Data Converters (2008) (41)
An 8-b 1.3-MHz successive-approximation A/D converter (1990) (37)
Low-distortion delta-sigma topologies for MASH architectures (2004) (37)
An Iterative Approximation Procedure for Automatic Filter Synthesis (1965) (36)
Design techniques for digital and analog all-pass circuits (1978) (36)
A tutorial discussion of the oversampling method for A/D and D/A conversion (1990) (36)
スイッチド・キャパシタディジタル容量ブリッジ(IEEE Transactions on Instrumentation and Measurement,Vol.IM-33,December,1984) (1985) (36)
A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver (2009) (36)
A switched-capacitor DAC with analog mismatch correction (2000) (35)
Multibit sigma-delta modulator with reduced sensitivity to DAC nonlinearity (1991) (35)
Incremental Delta-Sigma Structures for DC Measurement: an Overview (2006) (35)
A linear NMOS depletion resistor and its application in an integrated amplifier (1984) (35)
Switched-capacitor building blocks (1980) (35)
An 11-bit 250-nW 10-kS/s SAR ADC with doubled input range for biomedical applications (2017) (34)
A quasi-passive CMOS pipeline D/A converter (1988) (34)
Design of Low-Voltage Highly Linear Switched-R-MOSFET-C Filters (2007) (34)
Digital correlation technique for the estimation and correction of DAC errors in multibit mash /spl Delta//spl Sigma/ ADCs (2002) (33)
Multibit bandpass delta-sigma modulators using N-path structures (1992) (33)
Low-voltage switched-capacitor circuits (1999) (33)
A 12-bit 7 µW/channel 1 kHz/channel incremental ADC for biosensor interface circuits (2012) (33)
High-accuracy pipeline A/D convertor configuration (1985) (33)
A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2–2 MASH $\Delta \Sigma$ Modulator Dissipating 16 mW Power (2012) (32)
The derivation of switched-capacitor filters from active-RC prototypes (1978) (32)
A first-order current-steering sigma-delta modulator (1990) (32)
Comparison of amplifier gain enhancement techniques for GaAs MESFET analogue integrated circuits (1986) (31)
Reduced nonlinear distortion in circuits with correlated double sampling (1996) (31)
Low-power and low-offset comparator using latch load (2011) (31)
Switched-Capacitor Track-and-Hold Amplifiers With Low Sensitivity to Op-Amp Imperfections (2007) (31)
Multibit oversampled Sigma - Delta A/D convertor with nonuniform quantisation (1991) (30)
Stability Theory for Modulators (1997) (29)
A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2-2 MASH ΔΣ Modulator Dissipating 16 mW Power. (2012) (29)
Iterative Chebyshev Approximation Technique for Network Synthesis (1967) (29)
Fast CMOS current amplifier and buffer stage (1987) (29)
Switched-capacitor DAC with analogue mismatch correction (1999) (28)
An efficient ΔΣ ADC architecture for low oversampling ratios (2004) (27)
82 dB SNDR 20-channel incremental ADC with optimal decimation filter and digital correction (2010) (27)
A Continuous-Time Delta-Sigma Modulator for Biomedical Ultrasound Beamformer Using Digital ELD Compensation and FIR Feedback (2015) (27)
Digital techniques for improved /spl Delta//spl Sigma/ data conversion (2002) (27)
Theory and applications of incremental /spl Delta//spl Sigma/ converters (2004) (26)
High-linearity switched-capacitor circuits in digital CMOS technology (1995) (26)
Oversampling methods for data conversion (1991) (26)
A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting (2017) (26)
Optimum impulse response and the van der Maas function (1972) (25)
Nine Digital Filters for Decimation and Interpolation (1992) (25)
A 18 mW CT ΔΣ modulator with 25 MHz bandwidth for next generation wireless applications (2007) (25)
Switched-capacitor gain stage with reduced sensitivity to finite amplifier gain and offset voltage (1986) (25)
Efficient common-mode feedback circuits for pseudo-differential switched-capacitor stages (2000) (23)
A 1-V, 10-MHz clock-rate, 13-bit CMOS ΔΣ modulator using unity-gain-reset opamps (2001) (23)
Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay (2011) (22)
An improved switched-capacitor integrator (1978) (22)
First-Order Estimation and Precorrection of Parasitic Loss Effects in Ladder Filters (1962) (22)
Noise-shaped integrating quantisers in ΔΣ modulators (2009) (21)
A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR (2008) (21)
Adaptive calibration of multiple quantization oversampled A/D converters (1996) (21)
A noise-shaping accelerometer interface circuit for two-chip implementation (2000) (21)
Switched-capacitor circuits bilinearly equivalent to floating inductor or f.d.n.r. (1979) (21)
An enhanced slew rate source follower (1995) (21)
A dual-quantization multi-bit sigma delta analog/digital converter (1994) (21)
Digital techniques for improving the accuracy of data converters (1999) (21)
A Multistage DeltaSigma Modulator without Double Integration Loop (1992) (20)
A high-frequency track-and-hold stage with offset and gain compensation (1995) (20)
A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces (2014) (20)
A 1.8 V 94 dB dynamic range /spl Sigma//spl Delta/ modulator for voice applications (1996) (20)
Noise-coupled ADCs (2006) (20)
Stochastic analog-to-digital conversion (2005) (20)
Low-phase-error offset-compensated switched-capacitor integrator (1990) (20)
A 0.49–13.3 MHz Tunable Fourth-Order LPF with Complex Poles Achieving 28.7 dBm OIP3 (2018) (20)
A 50MHZ-BW continuous-time ΔΣ ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR (2018) (19)
Digital estimation and correction of DAC errors in multibit ΔΣ ADCs (2001) (19)
Noise-Coupled Multi-Cell Delta-Sigma ADCs (2007) (19)
Enhanced split-architecture Δ-Σ ADC (2006) (19)
Two-step incremental analogue-to-digital converter (2013) (19)
Adaptive selfcalibrating delta-sigma modulators (1992) (19)
On-line adaptive digital correction of dual-quantisation delta-sigma modulators (1992) (18)
Fully passive third-order noise shaping SAR ADC (2017) (18)
A 101 dB DR 1.1 mW audio delta-sigma modulator with direct-charge-transfer adder and noise shaping enhancement (2012) (18)
Incremental Analog-to-Digital Converters for High-Resolution Energy-Efficient Sensor Interfaces (2015) (17)
Sturdy MASH /spl Delta//spl Sigma/ modulator (2006) (17)
Autozeroing and correlated double sampling techniques (1995) (17)
Mixed-Order Sturdy MASH Δ-Σ Modulator (2007) (17)
DeltaSigma ADCs with Multibit Internal Converters (1997) (17)
Simple formula for estimation of minimum clock-feedthrough error voltage (1986) (17)
Large-change sensitivities of linear digital networks (1978) (17)
The prolate filter: An ideal lowpass filter with optimum step-response (1972) (17)
An improved circuit for pseudo-N- path switched-capacitor filters (1985) (17)
Error analysis in pipeline A/D converters and its applications (1992) (17)
Gain- and offset-compensated switched-capacitor filters (1991) (16)
A method for the computation of large tolerance effects (1973) (16)
Switched-capacitor circuit techniques in submicron low-voltage CMOS (1999) (16)
Switched-capacitor resonator structure with improved performance (2001) (16)
SC circuits: the state of the art compared to SI techniques (1993) (16)
Adaptive compensation of analog circuit imperfections for cascaded delta-sigma ADCs (1998) (16)
Noise-shaping SAR ADC using three capacitors (2013) (16)
A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications (2004) (16)
A Switched-Capacitor Digital Capacitance Bridge (1984) (15)
Noise-coupled continuous-time delta-sigma ADCs (2009) (15)
The Design of SigmaDelta Modulation AnalogtoDigital Converters (1992) (15)
A Split 2-0 MASH with Dual Digital Error Correction (2007) (15)
Area-efficient gain- and offset-compensated very-large-time-constant SC biquads (1992) (15)
A 63 dB 16 mW 20 MHz BW double-sampled ΔΣs analog-to-digital converter with an embedded-adder quantizer (2010) (15)
A fast offset-free sample-and-hold circuit (1988) (15)
Capacitor mismatch error cancellation technique for a successive approximation A/D converter (1999) (15)
The implementation of dual-truncation Sigma Delta D/A converters (1992) (14)
New high-precision circuits for on-chip capacitor ratio testing and sensor readout (1998) (14)
Adaptive compensation of analog circuit imperfections for cascaded /spl Sigma//spl Delta/ modulators (1996) (14)
Oversampling A/D and D/A converters (1998) (14)
Analog Circuit Design for ADCs (1997) (14)
Single-loop ΔΣ modulator with extended dynamic range (2008) (14)
Enhanced split-architecture delta-sigma ADC (2006) (14)
Real-factor FFT algorithms (1978) (14)
Sensitivity formulas for terminated lossless two-ports (1985) (13)
Offset and clock-feedthrough compensated switched-capacitor integrators (1985) (13)
Mismatch-shaping serial digital-to-analog converter (1999) (13)
A Segmented Data-Weighted-Averaging Technique (2007) (13)
Compensation for parasitic capacitances in switched-capacitor filters (1979) (13)
Quantization Errors and Dithering in Modulators (1997) (13)
Improved SC amplifiers with low sensitivity to op-amp imperfections (1997) (13)
A 0.9V 92dB Double-Sampled Switched-RC SD Audio ADC (2006) (13)
Noise-Coupled Delta-Sigma ADCS (2011) (13)
Quantization Noise in A/D Converters (1997) (13)
On-line digital compensation of analog circuit imperfections for cascaded /spl Sigma//spl Delta/ modulators (1996) (12)
Incremental Delta-Sigma ADCs: A Tutorial Review (2020) (12)
Architectures for high-order multibit Sigma delta modulators (1990) (12)
Multistage SigmaDelta Modulation (1992) (12)
A 0.6V Highly Linear Switched-R-MOSFET-C Filter (2006) (12)
A switched-capacitor multiplier/divider with digital and analog outputs (1984) (12)
GaAs switched-capacitor circuits for video signal processing (1987) (12)
Bilinear switched-capacitor ladder filter with reduced number of amplifiers (1980) (12)
Double-sampled ΔΣ modulator with relaxed feedback timing (2009) (12)
Area efficient CMOS charge pump circuits (2001) (12)
Design theory for high-order incremental converters (2003) (12)
A Simple Method for the Predistortion of Filter Transfer Functions (1963) (12)
On the Use of Modulo Arithmetic Comb Filters in Sigma Delta Modulators (1992) (12)
A low-cost, portable generic biotoxicity assay for environmental monitoring applications. (2005) (11)
Micropower Data Converters: A Tutorial (2010) (11)
Correlated double sampling integrator insensitive to parasitic capacitance (2001) (11)
Noise-coupled /spl Delta//spl Sigma/ ADC's (2006) (11)
High-linearity calibration of low-resolution digital-to-analog converters (1994) (11)
An 11-Bit 250-nW 10-kS/s SAR ADC With Doubled Input Range for Biomedical Applications (2017) (11)
A Noise-Coupled Time-Interleaved Delta-Sigma ADC with 4 . 2 MHz BW ,-98 dB THD , and 79 dB SNDR (2008) (11)
ΔΣ ADCs with second-order noise-shaping enhancement (2009) (11)
Improved low-distortion ΔΣ ADC topology (2009) (11)
Oversampled, Linear Predictive and NoiseShaping Coders of Order N (1992) (10)
Exact computation of group delay and its sensitivities using adjoint-network concept (1970) (10)
A pauper's algorithm for switched-capacitor circuit analysis (1981) (10)
Decimation and Interpolation for Conversion (1997) (10)
Effects of semiuniform losses in reactance 2-ports (1972) (10)
Low-Distortion Wideband Delta-Sigma ADCs With Shifted Loop Delays (2015) (10)
Digital foreground calibration methods for SAR ADCs (2012) (10)
A 2.5MHz BW and 78dB SNDR delta-sigma modulator using dynamically biased amplifiers (2008) (10)
Offset- and gain-compensated track-and-hold stages (1998) (10)
Bandpass Delta Sigma A/D convertor using two-path multibit structure (1991) (10)
High-precision switched-capacitor integrator using low-gain opamp (2011) (9)
Optimal capacitance assignment of switched-capacitor biquads (1995) (9)
Two-step split-junction SAR ADC (2010) (9)
Efficient error-cancelling algorithmic ADC (2000) (9)
Two-step multi-stage incremental ADC (2015) (9)
A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator (2016) (9)
Optimum low-order windows for discrete Fourier transform systems (1976) (9)
High-speed /spl Delta//spl Sigma/ ADC with error correction (2001) (9)
Simplified clock voltage doubler (1999) (8)
A new zero-optimization scheme for noise-coupled ΔΣ ADCs (2010) (8)
Pseudo-N-path switched capacitor filters with out-of-band noise peaks (1991) (8)
A High Resolution, Low Offset And High Speed Comparator (1992) (8)
A 0.45mW 12b 12.5MS/s SAR ADC with digital calibration (2014) (8)
Mismatch-shaping switching for two-capacitor DAC (1998) (8)
Experimental verification of a correlation-based correction algorithm for multi-bit delta-sigma ADCs (2004) (8)
A 13b-ENOB Noise Shaping SAR ADC with a Two-Capacitor DAC (2018) (8)
High¿¿¿Order Delta¿¿¿Sigma Modulators (2017) (8)
A new algorithm for cyclic and pipeline data conversion (1990) (8)
A 75dB SNDR, 10MHz conversion bandwidth stage-shared 2-2 MASH ΔΣ modulator dissipating 9mW (2011) (8)
Using Switched-RC Integrators (2005) (8)
DeltaSigma A/Ds with Reduced Sensitivity To Op AMP Noise and Gain (1992) (8)
Design and IC implementation of an ultra-low-ripple switched-capacitor-based buck dc-dc converter (2005) (8)
System-level noise filtering and linearization (2018) (7)
Multi-step incremental ADC with extended binary counting (2016) (7)
A 0.6V 82dB /spl Delta//spl Sigma/ audio ADC using switched-RC integrators (2005) (7)
Passive switched-capacitor filter with complex poles for high-speed applications (2016) (7)
Self-equalising sample-and-hold circuits (1979) (7)
A fully-differential input amplifier with band-pass filter for biosensors (2014) (7)
A double-sampled low-distortion cascade ΔΣ modulator with an adder/integrator for WLAN application (2011) (7)
Maximally flat approximation techniques (1968) (7)
Simple method for analysis of a class of switched-capacitor filters (1980) (7)
Novel pipeline data converters (1988) (7)
An Efficient and Accurate DC Analysis Technique for Switched-Capacitor Circuits (2002) (7)
A high-linearity low-voltage all-MOSFET delta-sigma modulator (1997) (7)
A digital calibration technique for DAC mismatches in delta-sigma modulators (2009) (7)
Switched-capacitor track-and-hold amplifier with low sensitivity to op-amp imperfections (2006) (7)
Buck-boost switched-capacitor DC-DC voltage regulator using delta-sigma control loop (2002) (7)
Efficient technique for excess loop delay compensation in continuous-time ΔΣ modulators (2013) (6)
A highly linear low-power 10 bit DAC for GSM (2000) (6)
A two-capacitor SAR-assisted multi-step incremental ADC with a single amplifier achieving 96.6 dB SNDR over 1.2 kHz BW (2017) (6)
A 16-bit 1KHz bandwidth micro-power multi-step incremental ADC for multi-channel sensor interface (2015) (6)
A First-Order Current-Steering (1991) (6)
Improved architecture for low-distortion δσ ADC's (2009) (6)
Efficient fully-floating double-sampling integrator for ΔΣ ADCs (2008) (6)
Wideband ΔΣ ADCs using direct-charge-transfer adder (2009) (6)
Bootstrapping techniques for floating switches in switched-capacitor circuits (2014) (6)
Mixed-Order Sturdy MASH Delta-Sigma Modulator. (2007) (6)
Dual-path delta-sigma modulators (2005) (6)
A new digital-to-analog conversion algorithm (1988) (6)
New architectures for low-power delta-sigma analog-to-digital converter (2008) (6)
A Design Methodology for Decimation Filters in Sigma Delta A/D Converters (1992) (6)
A compressed-sensing sensor-on-chip incorporating statistics collection to improve reconstruction performance (2015) (6)
Multi-step extended-counting analogue-to-digital converters (2013) (6)
The Design of Bandpass ADCs (1997) (6)
Direct-Charge-Transfer Pseudo-N-Path SC Circuit Insensitive to the Element Mismatch and Opamp Nonidealities (2002) (6)
Computational algorithm for the design of elliptic filters (1972) (6)
A noise-coupled time-interleaved delta-sigma modulator with shifted loop delays (2015) (6)
Noise-coupled continuous-time ΔΣ ADCs (2009) (6)
Novel high-frequency track-and-hold stages with offset and gain compensation (1996) (6)
A passive CMOS low-pass filter for high speed and high SNDR applications (2015) (6)
AMPLIFIER IMPERFECTION EFFECTS IN SWITCHED-CAPACITOR RESONATORS (6)
A noise–shaped switched–capacitor DC–DC voltage regulator (2002) (6)
CAD for the Analysis and Design of Converters (1997) (6)
Power-on digital calibration method for delta-Sigma ADCs (2016) (6)
Predictive correlated double sampling switched-capacitor integrators (1998) (6)
Improved input stage for bilinear switched-capacitor ladder filters (1983) (5)
An efficient procedure for the statistical transient analysis of switching circuits (1971) (5)
An NMOS buffer amplifier (1984) (5)
An optimum bandlimited system with monotonic step response (1967) (5)
The use of predictive correlated double sampling techniques in low-voltage delta-sigma modulators (1998) (5)
Multi-step capacitor-splitting SAR ADC (2010) (5)
Digital excess loop delay compensation technique with embedded truncator for continuous-time delta─sigma modulators (2016) (5)
Improved Adaptive Digital Compensation for Cascaded Delta-Sigma ADCs (2000) (5)
A Novel Architecture Design for VLSI Implementation of an FIR Decimation Filter (1992) (5)
Offset compensated switched capacitor circuits (1984) (5)
A 0.8V, 88dB Dual-Channel Audio /spl Delta//spl Sigma/ DAC with Headphone Driver (2006) (5)
Low-distortion double-sampling ΔΣ ADC using a direct-charge-transfer adder (2009) (5)
HigherOrder DeltaSigma Modulation (2005) (5)
Error analysis and digital correction algorithms for pipelined A/D converters (1990) (5)
Multibit Delta-Sigma ADC with Mixed-Mode DAC Error Correction (2001) (5)
A 10-MHz BW 77.9 dB SNDR DT MASH $\Delta\!\Sigma$ ADC With NC-VCO-Based Quantizer and OPAMP Sharing (2019) (5)
Low-voltage low-sensitivity switched-capacitor bandpass Sigma-Delta modulator. (2001) (5)
Efficient floating double-sampling integrator for DS ADCs (2007) (5)
Experimental results on reduced harmonic distortion in circuits with correlated double sampling (1998) (5)
Split-set data weighted averaging (2006) (5)
Enhanced split-architecture /spl Delta/-/spl Sigma/ ADC (2006) (5)
SPEED VS. DYNAMIC RANGE TRADE-OFF IN OVERSAMPLING DATA CONVERTERS (2002) (5)
A 10-MHz BW 77.9 dB SNDR DT MASH Δ!Σ ADC With NC-VCO-Based Quantizer and OPAMP Sharing. (2019) (5)
Buffer-based switched-capacitor gain stages (1988) (5)
Charge compensation technique for switched-capacitor circuits (2012) (5)
The Design of Cascaded ADCs (1997) (5)
Incremental and Extended-Range Data Converters (2014) (5)
Design techniques for discrete-time delta-sigma ADCs with extra loop delay (2010) (5)
Efficient Calibration of Feedback DAC in Delta Sigma Modulators (2020) (5)
Double noise coupling ΔΣ analogue-to-digital converter (2012) (5)
Mismatch-shaped pseudo-passive two-capacitor DAC (1999) (5)
A semi-synchronous SAR ADC (2012) (5)
Constraints Analysis for Oversampling AtoD Converter Structures on VLSl Implementation (1992) (5)
Linear interpolation using CCDs or switched-capacitor filters (1981) (5)
Spectral analysis of switched-capacitor filters designed using the bilinear z-transform (1980) (4)
ISSCC 2005 / SESSION 9 / SWITCHED-CAPACITOR ∆ Σ MODULATORS / 9 . 1 9 . 1 A 0 . 6 V 82 dB ∆ Σ Audio ADC Using Switched-RC Integrators (2002) (4)
Book review: Delta-Sigma data converters (2005) (4)
An incremental analog-to-digital converter with multi-step extended counting for sensor interfaces (2016) (4)
Fast successive-approximation A/D converters (1990) (4)
Efficient hybrid and state-space analysis of the adjoint network (1972) (4)
Binary windows for the discrete Fourier transform (1975) (4)
Incremental Data Converters (2010) (4)
Design Technique for Vestigial-Sideband Filters (1974) (4)
Switched-capacitor digital multiplier (1983) (4)
Low-power switched-capacitor integrator for delta-sigma ADCs (2010) (4)
Wide-band high-accuracy ΔΣ ADC using segmented DAC with DWA and mismatch shaping (2017) (4)
A NoiseShaping Coder Topology for 15 + Bit Converters (1992) (4)
Passive 3rd order delta-sigma ADC with VCO-based quantizer (2017) (4)
History, present state-of-art and future of incremental ADCs (2016) (4)
Enhanced split-architecture delta–sigma ADCs (2008) (4)
A 1 V 59 fJ/Step 15 MHz BW 74 dB SNDR continuous-time ΔΣ modulator with digital ELD compensation and multi-bit FIR feedback (2014) (4)
A True 16-bit 20 KHZ Multibit ΣΔ ADC with digital Correction (1992) (4)
A 14-bit dual-path 2-0 MASH ADC with dual digital error correction (2009) (4)
A generic multilevel multiplying D/A converter for pipelined ADCs (2005) (4)
Double-sampled wideband delta-sigma ADCs with shifted loop delays (2014) (4)
Computation of dissipation-induced loss distortion in lumped/distributed networks (1971) (4)
High-Speed ADC with Error Correction (2001) (4)
Implementation Considerations for ADCs (2005) (4)
The special section on switched-capacitor circuits (1983) (4)
Least-squares passband filters (1972) (4)
A 12b 10MS/s Pipelined ADC Using Reference Scaling (2006) (3)
FIR filter design using quadratic programming (1991) (3)
Some Techniques to Improve the Performance of Delta-Sigma Modulators (2003) (3)
Integrated Input Circuits For Photo Detectors (1977) (3)
Statistical large-tolerance analysis of nonlinear circuits in the time domain (1975) (3)
Pseudo-pseudo-differential circuits (2017) (3)
Adaptive digital correction for dual quantization /spl Sigma/-/spl Delta/ modulators (1993) (3)
Circuit Design for Discrete‐Time Delta‐Sigma ADCs (2017) (3)
Erratum: Multibit oversampled Σ-Δ A/D convertor with digital error correction (1988) (3)
THE FIRST-ORDER DELTA-SIGMA MODULATOR (2005) (3)
An efficient numerical method for the computation of zero- and pole-sensitivities† (1972) (3)
A noise-coupled low-distortion delta-sigma ADC with shifted loop delays (2014) (3)
Noise-Shaping Architecture for Wideband Applications (2002) (3)
A lower bound for the minimum risetime of bandlimited systems (1972) (3)
A ripple reduction technique for digital filters (1991) (3)
Bandpass and Quadrature DeltaSigma Modulation (2005) (3)
An NMOS buffer amplifier (1984) (3)
Noise-shaped filter implementation (2018) (3)
Multiple fault simulation in linear active circuits (1976) (3)
Digital Correction of DAC Nonlinearity in Multi-Bit Feedback A/D Converters: Invited tutorial (2020) (3)
Calibration technique for SAR analog-to-digital converters (2012) (3)
On the Szentirmai Transformation (1966) (3)
Two-stage ΔΣ ADC with noise-coupled VCO-based quantizer (2015) (3)
High‐linearity SAR‐VCO MASH ΔΣ ADC with second‐order noise shaping (2018) (3)
Capacitive ratio testing and sensor readout (1997) (3)
Appendix C: Noise in SwitchedCapacitor DeltaSigma Data Converters (2005) (3)
A continuous-time ΔΣ modulator with a digital technique for excess loop delay compensation (2014) (3)
Accuracy-enhanced switched-capacitor stages using low-gain opamps (2013) (3)
Passive slew rate enhancement technique for Switched-Capacitor Circuits (2019) (2)
A Charge-Domain Switched-Gm-C Band-Pass Filter Using Interleaved Semi-Passive Charge-Sharing Technique (2020) (2)
General sensitivity formulas for lossless two-ports (1983) (2)
Improved adaptive digital compensation for cascaded /spl Delta//spl Sigma/ ADCs (2000) (2)
Correlated double sampling technique for continuous-time filters (2006) (2)
Second¿¿¿Order Delta¿¿¿Sigma Modulation (2017) (2)
Dual-truncation Delta Sigma digital-to-analogue convertors (1992) (2)
The SecondOrder DeltaSigma Modulator (2005) (2)
Scaling for Optimum Dynamic Range and Noise-Power Tradeoff: A Review of Analog Circuit Design Techniques (2019) (2)
Implementations and Applications of Oversampling A/D Converters (1992) (2)
Oversampling AtoD and DtoA Converters with Multistage Noise Shaping Modulators (1992) (2)
A Hybrid Continuous Time Incremental and SAR Two-Step ADC with 90.5dB DR over 1MHz BW (2021) (2)
Efficient VLSIRealizable Decimators for SigmaDelta AnalogtoDigital Converters (1992) (2)
Clock generation system with reduced jitter noise in the baseband (1991) (2)
A novel input differential pair for improved-linearity buffer and S/H amplifier design (1994) (2)
A physical proof of Tellegen's theorem (1969) (2)
Two-step junction-splitting SAR analog-to-digital converter (2010) (2)
Micropower Incremental Analog-to-Digital Converters (2016) (2)
An Additional Extension of a Network Theorem (1961) (2)
Multibit /spl Delta//spl Sigma/ ADC with mixed-mode DAC error correction (2001) (2)
An Enhanced Dual-Path ΔΣ A/D Converter (2010) (2)
Applications of Golub's algorithm in circuit optimization and analysis (1973) (2)
Simple and efficient noise estimation algorithm (2004) (2)
Low-power parasitic-insensitive switched-capacitor integrator for delta-sigma ADCs (2010) (2)
Appendix B: The DeltaSigma Toolbox (2005) (2)
A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays (2015) (2)
Low-voltage low-sensitivity switched-capacitor bandpass /spl Delta//spl Sigma/ modulator (2001) (2)
Stray-insensitive differential input stages for A/D convertors (1984) (2)
Architectures for High-Order Multibit ZA Modulators' (1990) (2)
Noise-coupled low-power incremental ADCs (2010) (2)
Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC With 82.6-dB SNDR and 90.9-dB SFDR (2021) (2)
Simple technique for the prediction of dissipation-induced loss distortion (1970) (2)
Oversampled SigmaDelta Modulation (1992) (2)
The Magic of Delta¿¿¿Sigma Modulation (2017) (2)
A noise-shaping accelerometer interface circuit for two-chip implementation (2001) (2)
Low Distortion ΔΣ Modulator Employing modified charge-pump based switched-capacitor integrator (2010) (2)
Power-up calibration techniques for double-sampling ΔΣ modulators (2009) (2)
A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 /spl mu/V DC offset (2005) (2)
Some applications of the adjoint network concept in frequency domain analysis and optimization (1972) (2)
Predictive Noise Shaping SAR ADC (2019) (2)
One Bit Higher Order SigmaDelta A/D Converters (1992) (2)
Delta-sigma modulation applications in neutral-point clamped inverters (2003) (2)
Improved SignaltoNoise Ratio Using TriLevel DeltaSigma Modulation (1992) (2)
Radix-based digital correction technique for two-capacitor DACs (2010) (2)
Slewing Mitigation Technique for Switched Capacitor Circuits (2020) (2)
An op-amp sharing technique for continuous-time ΔΣ modulators (2010) (2)
Circuit Design for Continuous¿¿¿Time Delta¿¿¿Sigma Modulators (2017) (2)
Circuit and Technology Considerations for Mos DeltaSigma A/D Converters (1992) (2)
DoubleLoop SigmaDelta Modulation with dc Input (1992) (1)
CMOS circuits for on-chip capacitance ratio testing or sensor readout (1995) (1)
Efficient pipelined ADCs using integer gain MDACs (2007) (1)
Optimal dynamic range scaling of ΔΣ ADC using bias current estimation (2018) (1)
A SecondOrder HighResolution Incremental A/D Converter with Offset and Charge Injection Compensation (1992) (1)
ADC WITH MIXED-MODE DAC ERROR CORRECTION (2001) (1)
A DualChannel VoiceBand PCM Codec Using Â¿Â¿ Modulation Technique (1992) (1)
Example Modulator Systems (2005) (1)
Design Methodology for Â¿Â¿M (1992) (1)
Adaptive compensation of analog circuit imperfections for cascaded delta–sigma analog–to–digital converters (1998) (1)
IEEE Press Series on Microelectronic Systems (2017) (1)
Dynamic biasing scheme for high-speed= low-power switched-capacitor stages (2007) (1)
Optimization of A SigmaDelta Modulator by the USE of A Slow ADC (1992) (1)
Single-Loop Delta-Sigma ADC Using Noise-Coupled VCO Quantizer (2018) (1)
Linear Periodically Time¿¿¿Varying Systems (2017) (1)
Wave Digital Decimation Filters in Oversample A/D Converters (1992) (1)
Multibit Sigma-Delta ADC with mixed-mode DAC error correction. (2001) (1)
A low-power parasitic-insensitive switched-capacitor integrator for Delta-Sigma ADCs (2014) (1)
Correction to "An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and - 98 dB THD" [Aug 09 2202-2211] (2010) (1)
An Analysis of Nonlinear Behavior in DeltaDigma Modulators (1992) (1)
Power efficient noise-coupled ΔΣ ADC with simple delay cells (2017) (1)
Multiplexed noise shaping structures for delta-sigma modulators (1991) (1)
A CMOS Slope Adaptive Delta Modulator (1992) (1)
Switched-capacitor modulator circuits (1989) (1)
Multi-step counting ADC (2014) (1)
Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC with 85.1 dB DR and 91 dB SFDR (2020) (1)
Switched-R tuning technique for G m -C filters (2010) (1)
Improved Double Integration DeltaSigma Modulations for A to D and D to A Conversion (1992) (1)
Robust Continuous-Time MASH Delta Sigma Modulator (2018) (1)
An efficient /spl Delta//spl Sigma/ ADC architecture for low oversampling ratios (2004) (1)
A simple circuit technique to relax the feedback timing of ΔΣ ADC for high-speed and high-accuracy applications (2017) (1)
Sampling, Oversampling, and Noise¿¿¿Shaping (2017) (1)
Technology Scaling and Performance Limitations in DeltaSigma AnalogDigital Converters (1992) (1)
A 10-bit algorithmic A/D converter for cytosensor application (2005) (1)
2+2 MASH incremental ADC (2019) (1)
Fifty-Five Fun-Filled Years in Circuit Design (2013) (1)
An Amplifier-Free 0–2 SAR-VCO MASH ΔΣ ADC (2019) (1)
Architectures for DACs (1997) (1)
Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits (2019) (1)
A design technique for vestigial-sideband filters (1974) (1)
Node elimination in linear active circuits (1975) (1)
A 100-dB gain-corrected delta-sigma audio DAC with headphone driver (2007) (1)
An Improved SigmaDelta Modulator Architecture (1992) (1)
Sensitivity and Worst Case Analysis Terminated Reactance Two-Ports '. (1973) (1)
A Stereo 16Bit DeltaSigma A/D Converter for Digital AudioPresented at the 85th Convention of the Audio Engineering Society, Los Angeles, 1988 November 36; revised 1989 March 13. (1992) (1)
Design of Stable High Order 1Bit SigmaDelta Modulators (1992) (1)
The realization of delta-sigma A/D converters in low-voltage digital CMOS technology (1997) (1)
Low-Distortion Correlated Level Shifting Sample-and-Hold Stage (2021) (1)
FIR filter design for sigma-delta A/D converters using quadratic programming (1991) (1)
Predictive Switched-Capacitor Track-and-Hold Amplifier with Improved Linearity (2007) (1)
High speed buffers for op-amp characterization (1993) (1)
Appendix A: Spectral Estimation (2005) (1)
A Switched-Capacitor Building Block for Digital Multiplication and Division (1984) (0)
TableBased Simulation of DeltaSigma Modulators (1992) (0)
Research on Generalized Radix Design of Low-Power High-Performance Pipelined & Cyclic ADCs Final Report (2006) (0)
Delta¿¿¿Sigma DACs (2017) (0)
Multicell Delta-Sigma Data Converters (2006) (0)
Adaptive Digital Correction for Dual Quantization Sigma-Delta Modulators (1993) (0)
A first-order current-steering sigma-delta modulator (1990) (0)
A HighResowtion Cmos SigmaDelta A/D Converter with 320 kHz Output Rate (1992) (0)
The Principles of Delta-Sigma Data Converters (2007) (0)
Low-voltage switched-capacitor resonators (2001) (0)
A 16bit Oversampling Atohyphen;D Conversion Technology Using TripleIntegration Noise Shaping (1992) (0)
Continuous¿¿¿Time Delta¿¿¿Sigma Modulation (2017) (0)
An Enhanced Dual-Path DeltaSigma A/D Converter (2010) (0)
Low voltage Delta-Sigma Modulator with full range and unidirectional output (2015) (0)
Comments on "The Design of Filters by Synthesis (1962) (0)
Thoughts on Engineering Creativity [Point of View] (2019) (0)
A wide-band high-accuracy incremental ADC (2016) (0)
The past and present of circuit theory and the CAS Transactions (1977) (0)
The Old Professor in Action (2013) (0)
MOS AUCFilter Combination That Does Not Require Precision Analog ComponentsResearch supported by DARPA contract N00034K0251, and by Fannie and John Hertz Foundation. (1992) (0)
Interpolation and Decimation Filters (2017) (0)
Correction to 'Switched-Capacitor Building Blocks' (1983) (0)
A 12bit SigmaDelta AnalogtoDigital Converter with a 15MHz Clock Rate (1992) (0)
Improved double noise coupling ΔΣ analog-to-digital converter (2017) (0)
ITERATIVE CHEBYSHEV APPROXIMATION TECHNIQUE FOR EQUALIZER SYNTHESIS (1965) (0)
Sequential interstage correlated double sampling: A switched-capacitor technique for high accuracy systems (2014) (0)
A Hybrid Continuous-Time Incremental and SAR Two-Step ADC With 90.5-dB DR Over 1-MHz BW (2022) (0)
HighSpeed Cascaded ADCs (1997) (0)
A wide-band high-accuracy incremental ADC (2017) (0)
A simple circuit technique to relax the feedback timing of ΔΣ ADC for high-speed and high-accuracy applications (2017) (0)
Design and Implementation of an Audio 18Bit Analogto Digital Converter Using Oversampling TechniquesPresented at the 77th Convention of the Audio Engineering Society. Hamburg. 1985 March 58. (1992) (0)
A Voltage-Mode Switched-Capacitor Bandpass ∆Σ Modulator (2002) (0)
Incremental Analog¿¿¿to¿¿¿Digital Converters (2017) (0)
Switched-Capacitor Circuits [Education] (2021) (0)
HighLevel Design and Simulation (2005) (0)
Multicell Delta-Sigma Data Converters (2006) (0)
Digital DAC calibration technique for DS and incremental modulators (2012) (0)
Multi-channel mixed-signal noise source with applications to stochastic equalization (2012) (0)
Frequency Synthesis via the Discrete Chirp and Prime Sequence ROM's (1976) (0)
A CMOS Stereo 16Bit DIA Converter for Digital Audio (1992) (0)
Authors' reply to Comments on Sswitched-capacitor filter design using the bilinear z-transform' (1981) (0)
Calibration technique for SAR analog-to-digital converters (2012) (0)
AreaEfficient Multichannel Oversampled PCM VoiceBand Coder (1992) (0)
Erratum: Stray-insensitive differential input stages for A/D convertors (1985) (0)
Using Triangularly Weighted Interpolation to Get 13Bit PCM from a SigmaDelta (1992) (0)
Statistical Large-Tolerance Afial$is of Nonlinear \ Circuits in the Time IXinain (1975) (0)
Switched-resistor tuning technique for highly linear Gm-C filter design (2010) (0)
A noise–shaped switched–capacitor DC–DC voltage regulator (2002) (0)
A 0 . 9V 10 . 7-MHz 3 . 6-mW Bandpass ∆ Σ Modulator Using Unity-Gain-Reset Opamps (2003) (0)
AN ABSTRACT OF THE DISSERTATION OF Qingdong Meng for the degree of Doctor of Philosophy in Electrical and Computer Engineering presented on January 5, 2007. Title: Low-Voltage Data Converters Abstract approved: (2007) (0)
Switched-Capacitor Integrator with Slew-Rate Enhancement and Low Distortion (2021) (0)
A Unity Bit Coding Method by Negative FeedbackReceived July 24, 1963. Partly presented at the International Telcrnctering Conference, London, England; 1963. (1992) (0)
A 13 bit ISDNband Oversampled ADC using TwoStage Third Order Noise Shaping (1992) (0)
Optimal Selectivity of Harmonic Separating Filter Sets (1962) (0)
Multi-step extended-counting analogue-to-digital (2012) (0)
Yannis Tsividis, Path-Breaking Researcher and Educator (2014) (0)
Iterative optimization techniques for circuit design (1966) (0)
2+2 MASH incremental ADC (2019) (0)
Nonidealities in Continuous¿¿¿Time Delta¿¿¿Sigma Modulators (2017) (0)
Improved double noise coupling ΔΣ analog-to-digital converter (2017) (0)
An l8b Oversamplinq A/D Converter for Digital Audio (1992) (0)
In Memoriam (2004) (0)
A semi-synchronous SAR ADC (2011) (0)
Optimal dynamic range scaling of ΔΣ ADC using bias current estimation (2018) (0)
The Design of HighOrder SingleBit ADCs (1997) (0)
Further Comments on Saal's Reply to comments on 'The Design of Filters by Synthesis' (1962) (0)
Energy-efficient time-interleaved and pipelined SAR ADCs (2010) (0)
On the active realization of lossless two-ports (1975) (0)
An Oversampling AnalogtoDigital Converter Topology for HighResolution Signal Acquisition Systems (1992) (0)
Multiplexed Incremental Data Converters for EEG Monitoring and Recording (2008) (0)
Teraohm on-chip resistance realisation using switched capacitor topologies (2012) (0)
Analog ( S ) witchcraft , or How to Perform Accurate and Linear Data Conversion Using Inaccurate Nonlinear Elements (2004) (0)
Switched-Capacitor Circuits (2022) (0)
Worst-case error analysis for the fast fourier transform (1977) (0)
An Overview of Basic ConceptsThis chapter is a rewrite of material from reference [1] (1997) (0)
An enhanced dual-path ΔΣ analog-to-digital converter (2009) (0)
Circuit d'evaluation d'un signal a condensateur commute (2005) (0)
An Abstract of the Thesis of Title: Design Techniques for Successive Approximation Register Analog-to-digital Converters. Design Techniques for Successive Approximation Register Analog-to-digital Converters Co-major Professor, Representing Electrical and Computer Engineering (2011) (0)
History, present state-of-art and future of incremental ADCs (2016) (0)
The present and future of filter theory (1968) (0)
Incremental ADC with parallel counting (2017) (0)
In Defense of Engineering Education [Point of View] (2015) (0)
A 14bit 80kHz SigmaDelta A/D Converter: Modeling, Design, and Performance Evaluation (1992) (0)
Gabor Temes honored for analog signal processing fundamentals (2006) (0)
Generalized linear minimax approximation of system functions with constraints (1973) (0)
CORRELATION OF ENERGY LOSSES OF SUCCESSIVE CHARGED HEAVY PARTICLES IN ELECTRON GAS (1957) (0)
Digital Filters for Oversampling A/D Converters (1992) (0)
Hybrid delta-sigma ADC (2010) (0)
Architectures for HighOrder Multibit Â¿Â¿ ModulatorsThis work was supported by the Naval Ocean Systems Center, San Diego, CA, contract no. N6600186C0193 (1992) (0)
The FirstOrder Delta Sigma Modulator (2005) (0)
Design formulas for cascaded two-ports (1972) (0)
An Efficient Noise-Shaping Architecture for Wideband Applications (2002) (0)
Redacted for Privacy Analysis and Measurement of Charge Injection in Switched-Capacitor Circuits (2012) (0)
A Second-Order Passive Noise-Shaping SAR ADC With 4× Passive Gain and A Two-Input-Pair Comparator (2022) (0)
The insertion loss synthesis of communication networks using non-ideal elements. (1961) (0)
Low-power duty-cycle tuned filters (2014) (0)
Signal scaling circuit switched capacity (2005) (0)
Sturdy MASH D-S modulator (2006) (0)
for Low Oversampling Ratios (2004) (0)
Selected papers on integrated analog filters (1987) (0)
Fully Differential Cmos SigmaDelta Modulator for High Performance AnalogtoDigital Conversion With 5 V Operating Voltage (1992) (0)
The synthesis of general parameter insertion loss filters using a digital computer (1961) (0)
Pseudo-Pseudo-Differential Multibit Delta-Sigma Modulator (2020) (0)
ASP 12: Forum - Analog Electronics - a European Speciality? (1994) (0)
Simulating and Testing Oversampled AnalogtoDigital Converters (1992) (0)
A new approach to reducing output ripple in switched-capacitor-based step-down DC-DC converters (2004) (0)
A 16Bit 4th Order NoiseShaping D/A Converter (1992) (0)
Title : MOSFET-Only Predictive Track and Hold Circuit Abstract approval : (2012) (0)
An Enhanced Dual-path DeltaSigma Analog-to-digital Converter. (2009) (0)
State-of-the-art and future prospects for analogue signal processing-a tutorial (1988) (0)
Design, Simulation Techniques, and Architectures for Oversampling Converters (1992) (0)
Basic Theory and Analysis (1992) (0)
Efficient fully-floating double-sampling integrator for DeltaSigma ADCs. (2008) (0)
FP 14.3: A 1.8V 94dB Dynamic Range AZ Modulator for Voice Applications (1996) (0)
Improved Low-distortion DeltaSigma ADC Topology. (2009) (0)
An Oversampled SigmaDelta A/D Converter Circuit Using TwoStage Fourth Order Modulator (1992) (0)
The Twin Arts of Writing and Revising Technical Articles (2018) (0)
Quantization Noise Spectra (1992) (0)
Editorial - Circuit theory of the 1970's and the IEEE Transactions on Circuit Theory (1970) (0)
Multi¿¿¿Stage and Multi¿¿¿Quantizer Delta¿¿¿Sigma Modulators (2017) (0)
Theory and Implementations of Oversampling D/A Converters (1992) (0)
Digitally Corected MultiBit Â¿Â¿ Data Converters (1992) (0)
AN ABSTRACT OF THE THESIS OF Thirumalai Rengachari for the degree of Master of Science in Electrical Engineering and Computer (2012) (0)
Sidney Darlington is 80 years old (1986) (0)

This paper list is powered by the following services:

What Schools Are Affiliated With Ǵabor C. Temes?

Ǵabor C. Temes is affiliated with the following schools:

Oregon State University