Ingrid Verbauwhede

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Ingrid Verbauwhede

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#2539

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#630

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Ingrid Verbauwhede

Computer Science

#3599

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#3781

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#1643

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Engineering
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Why Is Ingrid Verbauwhede Influential?

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According to Wikipedia, Ingrid Verbauwhede is a professor at the COSIC Research Group of the Electrical Engineering Department, KU Leuven, where she leads the embedded systems team. She is a pioneer in the field of secure embedded circuits and systems, with several awards recognising her contributions to the field. She is member of the Royal Flemish Academy of Belgium for Science and the Arts since 2011. She is a fellow of IEEE.

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Ingrid Verbauwhede's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation (2004) (765)
A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards (2002) (582)
Physically Unclonable Functions: A Study on the State of the Art and Future Research Directions (2010) (446)
spongent: A Lightweight Hash Function (2011) (345)
PUFKY: A Fully Functional PUF-Based Cryptographic Key Generator (2012) (293)
A 21.54 Gbits/s fully pipelined AES processor on FPGA (2004) (283)
Machine learning in side-channel analysis: a first study (2011) (266)
Public-Key Cryptography for RFID-Tags (2007) (264)
Elliptic-Curve-Based Security Processor for RFID (2008) (261)
PUFs: Myth, Fact or Busted? A Security Evaluation of Physically Unclonable Functions (PUFs) Cast in Silicon (2012) (245)
CANAuth - A Simple, Backward Compatible Broadcast Authentication Protocol for CAN bus (2011) (243)
Design and performance testing of a 2.29-GB/s Rijndael processor (2003) (234)
Compact Ring-LWE Cryptoprocessor (2014) (232)
RECTANGLE: a bit-slice lightweight block cipher suitable for multiple platforms (2015) (227)
Intrinsic PUFs from Flip-flops on Reconfigurable Devices (2008) (218)
Area-throughput trade-offs for fully pipelined 30 to 70 Gbits/s AES processors (2006) (215)
Low-Overhead Implementation of a Soft Decision Helper Data Algorithm for SRAM PUFs (2009) (212)
Practical Mitigations for Timing-Based Side-Channel Attacks on Modern x86 Processors (2009) (210)
Sancus: Low-cost Trustworthy Extensible Networked Devices with a Zero-software Trusted Computing Base (2013) (208)
Consolidating Masking Schemes (2015) (205)
Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology (2003) (201)
Helper Data Algorithms for PUF-Based Key Generation: Overview and Analysis (2015) (193)
Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings (2007) (190)
Chaskey: An Efficient MAC Algorithm for 32-bit Microcontrollers (2014) (184)
Automatic secure fingerprint verification system based on fuzzy vault scheme (2005) (179)
Scalable Session Key Construction Protocol for Wireless Sensor Networks (2002) (179)
Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm (2001) (177)
A soft decision helper data algorithm for SRAM PUFs (2009) (176)
Reverse Fuzzy Extractors: Enabling Lightweight Mutual Authentication for PUF-Enabled RFIDs (2012) (171)
LiBrA-CAN: A Lightweight Broadcast Authentication Protocol for Controller Area Networks (2012) (165)
State-of-the-art of secure ECC implementations: a survey on known side-channel attacks and countermeasures (2010) (163)
Cryptographic Hardware and Embedded Systems - Ches 2007 (2008) (162)
AES-Based Security Coprocessor IC in 0.18-$muhbox m$CMOS With Resistance to Differential Power Analysis Side-Channel Attacks (2006) (160)
Low-Cost Elliptic Curve Cryptography for Wireless Sensor Networks (2006) (160)
Side channel modeling attacks on 65nm arbiter PUFs exploiting CMOS device noise (2013) (156)
Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment (2005) (156)
FPGA Vendor Agnostic True Random Number Generator (2006) (152)
An In-depth and Black-box Characterization of the Effects of Clock Glitches on 8-bit MCUs (2011) (152)
Machine learning attacks on 65nm Arbiter PUFs: Accurate modeling poses strict bounds on usability (2012) (152)
Hardware Designer's Guide to Fault Attacks (2013) (152)
A Practical Attack on KeeLoq (2008) (151)
A Lockdown Technique to Prevent Machine Learning on PUFs for Lightweight Authentication (2016) (151)
A digital design flow for secure integrated circuits (2006) (151)
A Survey on Lightweight Entity Authentication with Strong PUFs (2015) (149)
EC-RAC (ECDLP Based Randomized Access Control): Provably Secure RFID authentication protocol (2008) (143)
A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box (2005) (136)
An Elliptic Curve Processor Suitable For RFID-Tags (2006) (131)
Hardware-Based Trusted Computing Architectures for Isolation and Attestation (2018) (128)
Place and Route for Secure Standard Cell Design (2004) (126)
PrETP: Privacy-Preserving Electronic Toll Pricing (2010) (125)
A Micropower CMOS-Instrumentation Amplifier (1984) (124)
An Updated Survey on Secure ECC Implementations: Attacks, Countermeasures and Cost (2012) (121)
Fault Injection Modeling Attacks on 65 nm Arbiter and RO Sum PUFs via Environmental Changes (2014) (121)
Partition vs. Comparison Side-Channel Distinguishers: An Empirical Evaluation of Statistical Tests for Univariate Side-Channel Attacks against Two Unprotected CMOS Devices (2009) (120)
Experimental evaluation of Physically Unclonable Functions in 65 nm CMOS (2012) (117)
Electromagnetic Analysis Attack on an FPGA Implementation of an Elliptic Curve Cryptosystem (2005) (110)
SPONGENT: The Design Space of Lightweight Cryptographic Hashing (2011) (110)
High-Speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems (2015) (110)
Low-cost untraceable authentication protocols for RFID (2010) (109)
Efficient software implementation of ring-LWE encryption (2015) (108)
A VLSI design flow for secure side-channel attack resistant ICs (2005) (105)
A quick safari through the reconfiguration jungle (2001) (104)
Securing embedded systems (2006) (100)
FPGA-Based High-Performance Parallel Architecture for Homomorphic Computing on Encrypted Data (2019) (97)
High Precision Discrete Gaussian Sampling on FPGAs (2013) (93)
Efficient Ring-LWE Encryption on 8-Bit AVR Processors (2015) (87)
Untraceable RFID authentication protocols: Revision of EC-RAC (2009) (87)
FPGA Implementation of Pairings Using Residue Number System and Lazy Reduction (2011) (85)
Minimum area cost for a 30 to 70 Gbits/s AES processor (2004) (81)
Test Versus Security: Past and Present (2014) (81)
A masked ring-LWE implementation (2015) (77)
Secure Integrated Circuits and Systems (2010) (77)
Design method for constant power consumption of differential logic circuits (2005) (77)
DPA, Bitslicing and Masking at 1 GHz (2015) (75)
The Fault Attack Jungle - A Classification Model to Guide You (2011) (75)
Advanced RF/baseband interconnect schemes for inter- and intra-ULSI communications (2005) (74)
A noise bifurcation architecture for linear additive physical functions (2014) (72)
Efficient Fuzzy Extraction of PUF-Induced Secrets: Theory and Applications (2016) (72)
Elliptic Curve Cryptography with Efficiently Computable Endomorphisms and Its Hardware Implementations for the Internet of Things (2017) (70)
Memory Estimation for High Level Synthesis (1994) (69)
Energy-Memory-Security Tradeoffs in Distributed Sensor Networks (2004) (69)
Power Analysis of Atmel CryptoMemory - Recovering Keys from Secure EEPROMs (2012) (69)
Reducing radio energy consumption of key management protocols for wireless sensor networks (2004) (69)
A side-channel leakage free coprocessor IC in 0.18/spl mu/m CMOS for embedded AES-based cryptographic and biometric processing (2005) (69)
Electromagnetic circuit fingerprints for Hardware Trojan detection (2015) (69)
A Pay-per-Use Licensing Scheme for Hardware IP Cores in Recent SRAM-Based FPGAs (2012) (67)
Dude, is my code constant time? (2017) (67)
RECTANGLE: A Bit-slice Ultra-Lightweight Block Cipher Suitable for Multiple Platforms (2014) (66)
Domain-Specific Codesign for Embedded Security (2003) (66)
Multicore Curve-Based Cryptoprocessor with Reconfigurable Modular Arithmetic Logic Units over GF(2^n) (2007) (66)
Exploiting Hardware Performance Counters (2008) (66)
Perfect Matching Disclosure Attacks (2008) (66)
A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-μm CMOS technology (2005) (66)
Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration (2008) (65)
Differential power and electromagnetic attacks on a FPGA implementation of elliptic curve cryptosystems (2007) (65)
Faster Interleaved Modular Multiplication Based on Barrett and Montgomery Reduction Methods (2010) (64)
Charge recycling sense amplifier based logic: securing low power security ICs against DPA [differential power analysis] (2004) (63)
Secure IRIS Verification (2007) (62)
Faster -Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves (2009) (62)
A compact FPGA-based architecture for elliptic curve cryptography over prime fields (2010) (62)
SFINKS: A synchronous stream cipher for restricted hardware environments (2005) (62)
A secure fingerprint matching technique (2003) (61)
SOFIA: Software and control flow integrity architecture (2016) (59)
Secure Lightweight Entity Authentication with Strong PUFs: Mission Impossible II (2014) (59)
Dietary Recommendations for Lightweight Block Ciphers: Power, Energy and Area Analysis of Recently Developed Architectures (2013) (59)
The energy cost of secrets in ad-hoc networks (2002) (59)
Saber on ARM CCA-secure module lattice-based key encapsulation on ARM (2018) (59)
Attacking PUF-Based Pattern Matching Key Generators via Helper Data Manipulation (2014) (57)
Key-recovery attacks on various RO PUF constructions via helper data manipulation (2014) (57)
A Side-Channel-Resistant Implementation of SABER (2021) (56)
Simulation models for side-channel information leaks (2005) (56)
Energy, performance, area versus security trade-offs for stream ciphers (2004) (56)
Interfacing a high speed crypto accelerator to an embedded CPU (2004) (55)
Secure and Low-cost RFID Authentication Protocols (2005) (55)
Revisiting a combinatorial approach toward measuring anonymity (2008) (55)
Additively Homomorphic Ring-LWE Masking (2016) (55)
Superscalar Coprocessor for High-Speed Curve-Based Cryptography (2006) (53)
Compact and Side Channel Secure Discrete Gaussian Sampling (2014) (53)
Efficient implementation of anonymous credentials on Java Card smart cards (2009) (53)
Revisiting Higher-Order DPA Attacks: (2010) (52)
High-throughput programmable cryptocoprocessor (2004) (52)
Security and Performance Optimization of a new DES data encryption chip (1987) (51)
Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates (2012) (50)
Dependence of RFID Reader Antenna Design on Read Out Distance (2008) (50)
A survey of Hardware-based Control Flow Integrity (CFI) (2017) (48)
Speed-area trade-off for 10 to 100 Gbits/s throughput AES processor (2003) (48)
Selecting Time Samples for Multivariate DPA Attacks (2012) (48)
Extending ECC-based RFID authentication protocols to privacy-preserving multi-party grouping proofs (2012) (46)
HEAWS: An Accelerator for Homomorphic Encryption on the Amazon AWS FPGA (2020) (46)
Highly efficient entropy extraction for true random number generators on FPGAs (2015) (45)
Fault Analysis Study of IDEA (2008) (45)
Theory and Practice of a Leakage Resilient Masking Scheme (2012) (45)
Modular Hardware Architecture for Somewhat Homomorphic Function Evaluation (2015) (44)
Low-cost implementations of NTRU for pervasive security (2008) (44)
Design methods for Security and Trust (2007) (42)
Time-memory trade-off in Toom-Cook multiplication: an application to module-lattice based cryptography (2020) (42)
Secure fuzzy vault based fingerprint verification system (2004) (42)
Unlocking the design secrets of a 2.29 Gb/s Rijndael processor (2002) (41)
Revisiting Higher-Order DPA Attacks: Multivariate Mutual Information Analysis. (2009) (40)
Design of portable biometric authenticators - energy, performance, and security tradeoffs (2004) (40)
Design of an Interconnect Architecture and Signaling Technology for Parallelism in Communication (2007) (40)
Constant-Time Discrete Gaussian Sampling (2018) (40)
Secure JTAG Implementation Using Schnorr Protocol (2013) (40)
How Can We Conduct " Fair and Consistent " Hardware Evaluation for SHA-3 Candidate ? (2010) (40)
Ultra low-power implementation of ECC on the ARM Cortex-M0+ (2014) (39)
A Parallel Processing Hardware Architecture for Elliptic Curve Cryptosystems (2006) (39)
Montgomery Modular Multiplication Algorithm on Multi-Core Systems (2007) (39)
Implementation of binary edwards curves for very-constrained devices (2010) (39)
PUF-based secure test wrapper design for cryptographic SoC testing (2012) (39)
A New Scan Attack on RSA in Presence of Industrial Countermeasures (2012) (38)
Elliptic curve cryptography on embedded multicore systems (2008) (38)
Background Memory Synthesis for Algebraic Algorithms on Multi-Processor DSP Chips (1989) (38)
HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation (2018) (38)
Radio Frequency Identification. Security and Privacy Issues (2012) (38)
Systematic Analysis of Randomization-based Protected Cache Architectures (2021) (37)
Security Analysis of Industrial Test Compression Schemes (2013) (37)
Timing Attacks on Error Correcting Codes in Post-Quantum Schemes (2019) (37)
In-place memory management of algebraic algorithms on application specific ICs (1991) (36)
Masking ring-LWE (2016) (36)
Power Analysis of Synchronous Stream Ciphers with Resynchronization Mechanism (2004) (35)
Efficient Hardware Implementation of Fp-Arithmetic for Pairing-Friendly Curves (2012) (35)
Small footprint ALU for public-key processors for pervasive security (2006) (35)
Faster Pairing Coprocessor Architecture (2012) (35)
On the impact of decryption failures on the security of LWE/LWR based schemes (2018) (35)
Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems (2006) (35)
Hardware/software co-design of an elliptic curve public-key cryptosystem (2001) (35)
Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations (2007) (35)
On the Feasibility of Cryptography for a Wireless Insulin Pump System (2016) (35)
Physically unclonable functions: manufacturing variability as an unclonable device identifier (2011) (35)
Micropower high-performance SC building block for integrated low-level signal processing (1985) (34)
Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography (2021) (34)
Decryption Failure Attacks on IND-CCA Secure Lattice-Based Schemes (2019) (34)
Synthesis of Secure FPGA Implementations (2004) (34)
Tripartite modular multiplication (2011) (34)
ES-TRNG: A High-throughput, Low-area True Random Number Generator based on Edge Sampling (2018) (33)
Analysis and design of active IC metering schemes (2009) (33)
A Physically Unclonable Function Using Soft Oxide Breakdown Featuring 0% Native BER and 51.8 fJ/bit in 40-nm CMOS (2019) (32)
A hardware implementation in FPGA of the Rijndael algorithm (2002) (32)
High-performance Public-key Cryptoprocessor for Wireless Mobile Applications (2007) (32)
CT-bus: a heterogeneous CDMA/TDMA bus for future SOC (2004) (32)
Public-Key Cryptography on the Top of a Needle (2007) (32)
Differential Electromagnetic Attack on an FPGA Implementation of Elliptic Curve Cryptosystems (2006) (32)
An interactive codesign environment for domain-specific coprocessors (2006) (31)
A Low Power DSP Engine for Wireless Communications (1999) (31)
Single-Cycle Implementations of Block Ciphers (2015) (30)
Throughput Optimized SHA-1 Architecture Using Unfolding Transformation (2006) (30)
Reconfigurable modular arithmetic logic unit supporting high-performance RSA and ECC over GF( p ) (2007) (30)
The impact of error dependencies on Ring/Mod-LWE/LWR based schemes (2019) (30)
Cracking Unix Passwords using FPGA Platforms (2005) (29)
Breaking Elliptic Curve Cryptosystems Using Reconfigurable Hardware (2010) (29)
Time-Memory Trade-Off Attack on FPGA Platforms: UNIX Password Cracking (2006) (29)
Integrated modeling and generation of a reconfigurable network-on-chip (2004) (29)
Hardware Assisted Fully Homomorphic Function Evaluation and Encrypted Search (2017) (28)
Interactive cosimulation with partial evaluation (2004) (28)
Secure Logic Synthesis (2004) (28)
Side-channel issues for designing secure hardware implementations (2005) (28)
Modular Reduction in GF(2n) without Pre-computational Phase (2008) (28)
High-Performance Ideal Lattice-Based Cryptography on 8-Bit AVR Microcontrollers (2017) (28)
A compact and efficient fingerprint verification system for secure embedded devices (2003) (28)
Fast Leakage Assessment (2017) (28)
A Speed Area Optimized Embedded Co-processor for McEliece Cryptosystem (2012) (28)
IoT: Source of test challenges (2016) (28)
TOTAL: TRNG on-the-fly testing for attack detection using Lightweight hardware (2016) (27)
Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate (2004) (27)
Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP (2005) (27)
A 2.29 Gbits/sec, 56 mW non-pipelined Rijndael AES encryption IC in a 1.8 V, 0.18 /spl mu/m CMOS technology (2002) (27)
A Component-Based Design Environment for ESL Design (2006) (27)
AES-based cryptographic and biometric security coprocessor IC in 0.18-/spl mu/m CMOS resistant to side-channel power analysis attacks (2005) (27)
Privacy-Preserving ECC-Based Grouping Proofs for RFID (2010) (27)
Towards efficient and automated side-channel evaluations at design time (2018) (26)
Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients (2002) (25)
Hierarchical ECC-Based RFID Authentication Protocol (2011) (25)
The communication and computation cost of wireless security: extended abstract (2011) (25)
Lightweight Coprocessor for Koblitz Curves: 283-Bit ECC Including Scalar Conversion with only 4300 Gates (2015) (25)
Prototyping platform for performance evaluation of SHA-3 candidates (2010) (25)
Efficient pipelining for modular multiplication architectures in prime fields (2007) (25)
Compact domain-specific co-processor for accelerating module lattice-based KEM (2020) (25)
Efficient Finite field multiplication for isogeny based post quantum cryptography (2016) (25)
A Compact Architecture for Montgomery Elliptic Curve Scalar Multiplication Processor (2007) (24)
A scan-based attack on Elliptic Curve Cryptosystems in presence of industrial Design-for-Testability structures (2012) (24)
Power analysis on NTRU implementations for RFIDs: First results (2008) (24)
Novel RNS Parameter Selection for Fast Modular Multiplication (2014) (24)
Architectural design features of a programmable high throughput AES coprocessor (2004) (23)
LiBrA-CAN (2017) (23)
Anti-counterfeiting, Untraceability and Other Security Challenges for RFID Systems: Public-Key-Based Protocols and Hardware (2010) (23)
Differential Scan Attack on AES with X-tolerant and X-masked Test Response Compactor (2012) (23)
Balanced point operations for side-channel protection of elliptic curve cryptography (2005) (22)
Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding (2006) (22)
Design solutions for securing SRAM cell against power analysis (2012) (22)
Practical DPA attacks on MDPL (2009) (22)
Secure PRNG seeding on commercial off-the-shelf microcontrollers (2013) (22)
Low-cost implementations of on-the-fly tests for random number generators (2012) (22)
Cooperative multithreading on embedded multiprocessor architectures enables energy-scalable design (2005) (21)
Design flow for HW/SW acceleration transparency in the thumbpod secure embedded system (2003) (21)
Protected Software Module Architectures (2013) (21)
Embedded software integration for coarse-grain reconfigurable systems (2004) (21)
Saber on ARM (2018) (21)
A fast dual-field modular arithmetic logic unit and its hardware implementation (2006) (21)
Teaching HW/SW Co-Design With a Public Key Cryptography Application (2013) (21)
Soteria: Offline Software Protection within Low-cost Embedded Devices (2015) (21)
Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques (2004) (21)
Low power DSP's for wireless communications (2000) (20)
Secure remote reconfiguration of an FPGA-based embedded system (2011) (20)
Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security (2009) (19)
Speeding Up Bipartite Modular Multiplication (2010) (19)
Circuit challenges from cryptography (2015) (19)
Core Based Architecture to Speed Up Optimal Ate Pairing on FPGA Platform (2012) (19)
A hyperelliptic curve crypto coprocessor for an 8051 microcontroller (2005) (19)
Iterating Von Neumann's post-processing under hardware constraints (2016) (18)
BLAKE-512-Based 128-Bit CCA2 Secure Timing Attack Resistant McEliece Cryptoprocessor (2014) (18)
Wide-Weak Privacy-Preserving RFID Authentication Protocols (2010) (18)
Security Considerations in the Design and Implementation of a new DES chip (1987) (18)
Efficient and Secure Fingerprint Verification for Embedded Devices (2006) (18)
Pushing the speed limit of constant-time discrete Gaussian sampling. A case study on the Falcon signature scheme. (2019) (18)
Secure, Remote, Dynamic Reconfiguration of FPGAs (2015) (17)
Design with race-free hardware semantics (2006) (17)
A single-chip solution for the secure remote configuration of FPGAs using bitstream compression (2013) (17)
Design and testing methodologies for true random number generators towards industry certification (2018) (17)
A High Speed Pairing Coprocessor Using RNS and Lazy Reduction (2011) (17)
Low power showdown: comparison of five DSP platforms implementing an LPC speech codec (2001) (17)
Architectures and design techniques for energy efficient embedded DSP and multimedia processing (2004) (17)
Physically unclonable function using CMOS breakdown position (2017) (17)
Circuits and design techniques for secure ICs resistant to side-channel attacks (2006) (17)
Low-cost fault detection method for ECC using Montgomery powering ladder (2011) (17)
An FPGA Implementation of Rijndael: Trade-offs for side-channel security (2004) (16)
Partition vs. Comparison Side-Channel Distinguishers (2008) (16)
A low-cost implementation of Trivium (2008) (16)
Compact and Flexible FPGA Implementation of Ed25519 and X25519 (2019) (16)
Domain Specific Tools and Methods for Application in Security Processor Design (2002) (16)
HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor (2007) (16)
Privacy Challenges in RFID Systems (2010) (16)
A 5.6-mW 1-Gb/s/pair pulsed signaling transceiver for a fully AC coupled bus (2005) (16)
On the high-throughput implementation of RIPEMD-160 hash algorithm (2008) (15)
On-the-fly tests for non-ideal true random number generators (2015) (15)
Timing attacks on Error Correcting Codes in Post-Quantum Secure Schemes (2019) (14)
An embedded platform for privacy-friendly road charging applications (2010) (14)
Flexible hardware architectures for curve-based cryptography (2006) (14)
On the Implementation of Unified Arithmetic on Binary Huff Curves (2013) (14)
Reconfigurable interconnect for next generation systems (2002) (14)
Side-Channel Analysis of Lattice-Based Post-Quantum Cryptography: Exploiting Polynomial Multiplication (2022) (14)
A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications (2007) (14)
Design and design methods for unified multiplier and inverter and its application for HECC (2011) (14)
Three Phase Dynamic Current Mode Logic: A More Secure DyCML to Achieve a More Balanced Power Consumption (2012) (14)
Finding the best system design flow for a high-speed JPEG encoder (2003) (14)
Advanced profiling for probabilistic Prime+Probe attacks and covert channels in ScatterCache (2019) (14)
Secure interrupts on low-end microcontrollers (2014) (13)
Performance and Security Evaluation of AES S-Box-Based Glitch PUFs on FPGAs (2012) (13)
Prime+Scope: Overcoming the Observer Effect for High-Precision Cache Contention Attacks (2021) (13)
A scalable and high performance elliptic curve processor with resistance to timing attacks (2005) (13)
EM Information Security Threats Against RO-Based TRNGs: The Frequency Injection Attack Based on IEMI and EM Information Leakage (2019) (13)
Programmable Gigabit Ethernet Packet Processor Design Methodology (2001) (13)
A Tiny Coprocessor for Elliptic Curve Cryptography over the 256-bit NIST Prime Field (2016) (13)
Higher-Order Masked Ciphertext Comparison for Lattice-Based Cryptography (2022) (13)
A quick safari through the reconfiguration jungle (Invited) (2001) (13)
A Dynamic and Differential CMOS Logic Style to Resist Power and Timing Attacks on Security IC's (2004) (13)
Trust in FPGA-accelerated Cloud Computing (2020) (13)
An In-Depth and Black-Box Characterization of the Effects of Laser Pulses on ATmega328P (2018) (13)
Exploring active manipulation attacks on the TERO random number generator (2016) (13)
A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems (2008) (12)
A Discussion on the Properties of Physically Unclonable Functions (2010) (12)
Empirical comparison of side channel analysis distinguishers on DES in hardware (2009) (12)
Revisiting Higher-Order Masked Comparison for Lattice-Based Cryptography: Algorithms and Bit-Sliced Implementations (2023) (12)
A reconfiguration hierarchy for elliptic curve cryptography (2001) (12)
A low power capacitive coupled bus interface based on pulsed signaling (2004) (12)
Software only, extremely compact, Keccak-based secure PRNG on ARM Cortex-M (2014) (12)
Testing Framework for eSTREAM Proflle II Candidates (2005) (12)
A Highly-Portable True Random Number Generator Based on Coherent Sampling (2019) (12)
Design and Implementation of a Waveform-Matching Based Triggering System (2016) (12)
Modular reduction without precomputational phase (2009) (12)
A Closer Look at the Delay-Chain based TRNG (2018) (12)
Anonymous Split E-Cash—Toward Mobile Anonymous Payments (2015) (11)
HECC Goes Embedded: An Area-Efficient Implementation of HECC (2009) (11)
Light-weight implementation options for curve-based cryptography: HECC is also ready for RFID (2009) (11)
Multilevel design validation in a secure embedded system (2005) (11)
Developing a Multidimensional Synchronous Dataflow Domain in Ptolemy (1994) (11)
Security and Reliability Properties of Syndrome Coding Techniques Used in PUF Key Generation (2013) (11)
Low-energy encryption for medical devices: Security adds an extra design dimension (2013) (11)
Generic DPA Attacks: Curse or Blessing? (2014) (11)
Embedded HW/SW platform for on-the-fly testing of true random number generators (2015) (11)
A digit-serial architecture for inversion and multiplication in GF(2M) (2008) (11)
Public-Key Cryptography for RFID Tags and Applications (2008) (11)
Upper bounds on the min-entropy of RO Sum, Arbiter, Feed-Forward Arbiter, and S-ArbRO PUFs (2016) (11)
Software security: Vulnerabilities and countermeasures for two attacker models (2016) (11)
Platform-based design for an embedded-fingerprint-authentication device (2005) (10)
24.1 Circuit challenges from cryptography (2015) (10)
Compact domain-specific co-processor for accelerating module lattice-based key encapsulation mechanism (2020) (10)
Specification and support for multidimensional DSP in the SILAGE language (1994) (10)
DEMO: Inherent PUFs and secure PRNGs on commercial off-the-shelf microcontrollers (2013) (10)
Analysis and Comparison of Table-based Arithmetic to Boolean Masking (2021) (10)
Hardware evaluation of the Luffa hash family (2009) (9)
Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs (2015) (9)
Compact and Side Channel Resistant Discrete Gaussian Sampling (2014) (9)
The Impact of Pulsed Electromagnetic Fault Injection on True Random Number Generators (2018) (9)
Challenge-response based secure test wrapper for testing cryptographic circuits (2010) (9)
Security for Ambient Intelligent Systems (2005) (9)
Skiing the embedded systems mountain (2005) (9)
Statistical Analysis of Silicon PUF responses for Device Identification (2008) (9)
Low power DSP's for wireless communications (embedded tutorial session) (2000) (9)
Signal Processing for Cryptography and Security Applications (2010) (9)
The happy marriage of architecture and application in next-generation reconfigurable systems (2004) (9)
Reconfigurable Architectures for Curve-Based Cryptography on Embedded Micro-Controllers (2006) (9)
On-chip jitter measurement for true random number generators (2017) (9)
Side channel attacks and fault attacks on cryptographic algorithms (2004) (8)
BASALISC: Flexible Asynchronous Hardware Accelerator for Fully Homomorphic Encryption (2022) (8)
Turbo codes on the fixed point DSP TMS320C55x (2000) (8)
A 5.1μJ per point‐multiplication elliptic curve cryptographic processor (2017) (8)
Compact Hardware Implementation of Ring-LWE Cryptosystems (2013) (8)
Fpga-Oriented Secure Data Path Design: Implementation of a Public Key Coprocessor (2006) (8)
Design Methods for Embedded Security (2008) (8)
A Note on the Use of Margins to Compare Distinguishers (2014) (8)
Low Cost Built in Self Test for Public Key Crypto Cores (2010) (8)
Pushing the speed limit of constant-time discrete Gaussian sampling. A case study on Falcon (2019) (8)
Private Mobile Pay-TV From Priced Oblivious Transfer (2018) (8)
ASIC cryptographical processor based on DES (1991) (8)
Hardware-Efficient Post-Processing Architectures for True Random Number Generators (2019) (7)
Trellis Codes with Low Ones Density for the OR Multiple Access Channel (2006) (7)
Design Considerations for EM Pulse Fault Injection (2019) (7)
Fault Analysis of the ChaCha and Salsa Families of Stream Ciphers (2017) (7)
A realtime, memory efficient fingerprint verification system (2004) (7)
Side-Channel Analysis Attacks on Hardware Implementations of Cryptographic Algorithms (2007) (7)
Case Study : A class E power amplifier for ISO-14443A (2009) (7)
A multi-bit/cell PUF using analog breakdown positions in CMOS (2018) (7)
A New Model for Error-Tolerant Side-Channel Cube Attacks (2013) (7)
TROT: A Three-Edge Ring Oscillator Based True Random Number Generator With Time-to-Digital Conversion (2022) (7)
Matching shielded loops for cryptographic analysis (2006) (7)
STBC: Side Channel Attack Tolerant Balanced Circuit with Reduced Propagation Delay (2017) (7)
Polynomial multiplication on embedded vector architectures (2021) (7)
Higher-order masked Saber (2022) (7)
Synthesis for real time systems: Solutions and challenges (1995) (7)
HW/SW co-design for public-key cryptosystems on the 8051 micro-controller (2007) (7)
Speeding Up Barrett and Montgomery Modular Multiplications (2009) (7)
Sweeping for Leakage in Masked Circuit Layouts (2020) (7)
Side-channel aware design: algorithms and architectures for elliptic curve cryptography over GF(2/sup n/) (2005) (7)
Semi-Automatic Locating of Cryptographic Operations in Side-Channel Traces (2021) (6)
Testing ThumbPod: Softcore bugs are hard to find (2003) (6)
Teaching trade-offs in system-level design methodologies (2003) (6)
Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051 microprocessor (2005) (6)
Providing security on demand using invasive computing (2016) (6)
Accelerating Scalar Conversion for Koblitz Curve Cryptoprocessors on Hardware Platforms (2015) (6)
Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class (2008) (6)
Security Adds an Extra Dimension to IC Design: Future IC Design Must Focus on Security in Addition to Low Power and Energy (2017) (6)
A systematic M safe-error detection in hardware implementations of cryptographic algorithms (2012) (6)
Interface Design for Mapping a Variety of RSA Exponentiation Algorithms on a HW/SW Co-design Platform (2012) (6)
Side-Channel Leakage Tolerant Architectures (2006) (6)
Characterization of EM faults on ATmega328p (2019) (6)
A Physically Unclonable Function with 0% BER Using Soft Oxide Breakdown in 40nm CMOS (2018) (6)
Side-channel resistant system-level design flow for public-key cryptography (2007) (6)
Detection of IEMI fault injection using voltage monitor constructed with fully digital circuit (2018) (5)
The Monte Carlo PUF (2017) (5)
VLSI design methods for low power embedded encryption (2016) (5)
A Hybrid Scheme for Concurrent Error Detection of Multiplication over Finite Fields (2010) (5)
The exponential impact of creativity in computer engineering education (2013) (5)
A High-Throughput ASIC implementation of Configurable Advanced Encryption Standard (AES) Processor (2012) (5)
The Energy Budget for Wireless Security: Extended Version (2015) (5)
Hardware/software codesign for stream ciphers (2007) (5)
Efficient and secure hardware (2012) (5)
FPGA-based testing strategy for cryptographic chips: A case study on Elliptic Curve Processor for RFID tags (2009) (5)
Towards inter-vendor compatibility of true random number generators for FPGAs (2018) (5)
Atlas: Application Confidentiality in Compromised Embedded Systems (2019) (5)
A Fast and Compact FPGA Implementation of Elliptic Curve Cryptography Using Lambda Coordinates (2016) (5)
Fast IP address lookup engine for SoC integration (2002) (5)
Demonstration of Uncoordinated Multiple Access in Optical Communications (2008) (5)
Random numbers generation: Investigation of narrowtransitions suppression on FPGA (2009) (5)
Analysis of multidimensional DSP specifications (1996) (4)
A Light-Weight Cooperative Multi-threading with Hardware Supported Thread-Management on an Embedded Multi-Processor System (2005) (4)
Compact implementations of pairings (2009) (4)
Hardware design for Hash functions (2010) (4)
Algorithms for Digital Image Steganography via Statistical Restoration (2012) (4)
HW/SW Co-design for Accelerating Public-Key Cryptosystems over GF(p) on the 8051 μ-controller (2006) (4)
The Energy Cost of Embedded Security for Wireless Sensor Networks (2006) (4)
Compact Public-Key Implementations for RFID and Sensor Nodes (2010) (4)
Scan attacks on side-channel and fault attack resistant public-key implementations (2012) (4)
X-Ray and Proton Radiation Effects on 40 nm CMOS Physically Unclonable Function Devices (2018) (4)
Secure Mutual Testing Strategy for Cryptographic SoCs (2014) (4)
High Speed Channel Coding Architectures for the Uncoordinated OR Channel (2006) (4)
Lattice-Based Public-Key Cryptography in Hardware (2019) (4)
Process Isolation for Reconfigurable Hardware (2006) (4)
Secure Sketch Metamorphosis: Tight Unified Bounds (2015) (4)
Extended abstract: Unified digit-serial multiplier/inverter in finite field GF(2m) (2008) (4)
A 334uW 0.158mm2 Saber Learning with Rounding based Post-Quantum Crypto Accelerator (2022) (4)
Tiny application-specific programmable processor for BCH decoding (2012) (4)
Wireless Digital Signal Processors (1999) (3)
F1: Intelligent energy-efficient systems at the edge of IoT (2018) (3)
Methodology for Memory Analysis and Optimization in Embedded Systems (2004) (3)
Interleaver-Division Multiple Access on the OR Channel (2006) (3)
Double Trouble: Combined Heterogeneous Attacks on Non-Inclusive Cache Hierarchies (2022) (3)
On the Practical Performance of Rateless Codes (2008) (3)
How to Use Koblitz Curves on Small Devices? (2014) (3)
Arithmetic of $$\tau $$τ-adic expansions for lightweight Koblitz curve cryptography (2018) (3)
Measuring the vulnerability of cryptographic algorithms (2006) (3)
A Pay-perUse Licensing Scheme for Hardware IP Cores in Recent SRAM-Based FPGAs (2011) (3)
Embedded Software Integration for Coarse-grain Reconfigurable Architectures (2004) (3)
Security of countermeasures against state-of-the-art differential scan attacks (2013) (3)
Embedded Security (2016) (3)
Towards efficient and automated side-channel evaluations at design time (2020) (3)
Constructing Application-Specific Memory Hierarchies on FPGAs (2011) (3)
HW/SW Co-design of TA/SPA-resistant Public-key Cryptosystems (2005) (3)
Fast dynamic memory integration in co-simulation frameworks for multiprocessor system on-chip (2005) (3)
Hardware/software co-design flavors of elliptic curve scalar multiplication (2014) (3)
Designing Maximal Resolution Loop Sensors for Cryptographic Analysis (2009) (3)
A Cautionary Note When Looking for a Truly Reconfigurable Resistive RAM PUF (2018) (3)
Can We Trust the Chips of the Future? (2011) (3)
Ring-LWE: Applications to Cryptography and Their Efficient Realization (2016) (3)
2010 Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2010, Santa Barbara, California, USA, 21 August 2010 (2010) (2)
Streaming encryption for a secure wavelength and time domain hopped optical network (2004) (2)
Extended abstract: a race-free hardware modeling language (2005) (2)
Hardware acceleration of a software-based VPN (2016) (2)
Guest Editorial Integrated Circuit and System Security (2012) (2)
INVITED: Design Principles for True Random Number Generators for Security Applications (2019) (2)
Canary Numbers: Design for Light-weight Online Testability of True Random Number Generators (2016) (2)
HW/SW co-design of RSA on 8051 (2012) (2)
Teaching HW/SW codesign with a Zynq ARM/FPGA SoC (2018) (2)
The next HDL (panel session): if C++ is ;the answer, what was the question? (2001) (2)
DSP Architectures for Next-Generation Wireless Communications (2010) (2)
Smart Grid, Security and EDA (2010) (2)
Microcoded coprocessor for embedded secure biometric authentication systems (2005) (2)
ACM Transaction on Design Automation of Electronic Systems (TODAES) 2005 Best Paper Award (2005) (2)
Attacking Hardware Random Number Generators in a Multi-Tenant Scenario (2020) (2)
VLSI Implementation of Double-Base Scalar Multiplication on a Twisted Edwards Curve with an Efficiently Computable Endomorphism (2015) (2)
Propagating trusted execution through mutual attestation (2019) (2)
Hold Your Breath, PRIMATEs Are Lightweight (2016) (2)
Proxy Re-Encryption for Accelerator Confidentiality in FPGA-Accelerated Cloud (2020) (2)
Differential Electromagnetic Attack on an FPGA (2006) (2)
Provable Secure Software Masking in the Real-World (2022) (2)
Computer Architecture and Design (2008) (1)
An energy and area efficient, all digital entropy source compatible with modern standards based on jitter pipelining (2022) (1)
Designing maximal resolution loop sensors for electromagnetic cryptographic analysis (2009) (1)
Ring-LWE Public Key Encryption Processor (2019) (1)
Biggest Failures in Security (Dagstuhl Seminar 19451) (2019) (1)
FO4-based models for area, delay and energy of polynomial multiplication over binary fields (2010) (1)
POSTER: PUF-based Secure Test Wrapper for Cryptographic SoC (2012) (1)
FPGA Design for Algebraic Tori-Based Public-Key Cryptography (2008) (1)
Fundamental study on non-invasive frequency injection attack against RO-based TRNG (2018) (1)
Micro-coded ASIC Architecture for Real-Time Extraction of a Fetal Electro Cardiogram using the SVD Algorithm (1990) (1)
Secure remote reconfiguration of FPGAs (2010) (1)
Comparison of two setups for contactless power measurements for side-channel analysis (2018) (1)
14 th IST Mobile and Wireless Communications Summit Call for Papers (2005) (1)
Systematic security evaluation method against C safe-error attacks (2011) (1)
Hardware/software co-design for stream ciphers (2014) (1)
Proceedings of the 8th international conference on Radio Frequency Identification: security and privacy issues (2012) (1)
A monolithic SPAD-based random number generator for cryptographic application (2022) (1)
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002 (2002) (1)
Cryptanalysis of Strong Physically Unclonable Functions (2023) (1)
The cost of cryptography: Is low budget possible? (2011) (1)
Single-Round Pattern Matching Key Generation Using Physically Unclonable Function (2019) (1)
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip (2006) (1)
A Self-Calibrating True Random Number Generator (2019) (1)
Binary decision diagram to design balanced secure logic styles (2016) (1)
The Need for Hardware Roots of Trust (2019) (1)
Seventh international workshop on Fault Diagnosis and Tolerance in Cryptography, 2010, FDTC 2010, Santa Barbara, California, USA, 21 August 2010 (2010) (1)
Public-key Primitives (2008) (1)
Introduction to EM information security for IoT devices (2018) (1)
BASALISC: Programmable Asynchronous Hardware Accelerator for BGV Fully Homomorphic Encryption (2022) (1)
Exploring Micro-architectural Side-Channel Leakages through Statistical Testing (2021) (1)
Design and Evaluation of a Spark Gap Based EM-fault Injection Setup (2020) (1)
SCM: Secure Code Memory Architecture (2017) (1)
The next HDL: if C++ is the answer, what was the question? (2001) (0)
Multiplier Based Built In Self Test Strategy for Cryptographic Applications (2012) (0)
Challenges for the Logic Design of Secure Embedded Systems (2005) (0)
A Secure Multithreaded Coprocessor Interface ÿ ÿ (0)
LOOKUP ENGINE FOR SOC INTEGRATION (2002) (0)
Lightweight Prediction-Based Tests for On-Line Min-Entropy Estimation (2017) (0)
Neural Network Quantisation for Faster Homomorphic Encryption (2023) (0)
Security and reliability – friend or foe (2019) (0)
DATE 2022: Aiming for an Online/ Onsite Format and Finally Moving to Online Only (2022) (0)
Hardware Security Knowledge Area Version 1.0.1 (2021) (0)
Hardware Security: Physical Design versus Side-Channel and Fault Attacks (2022) (0)
Gigabit simultaneous bi-directional signaling using DS-CDMA (2002) (0)
Hardware Security (2019) (0)
Session details: Reconfigurable Interconnect for Next Generation Systems (2002) (0)
Low-Power DSPs (2004) (0)
Canary Design for Light-weight Online Testability of True Random Number Generators (2016) (0)
Extending ECC-based RFID authentication protocols to privacy-preserving multi-party grouping proofs (2011) (0)
University of Birmingham Ring-LWE (2016) (0)
Hardware Security Knowledge Area Issue 1 . 0 (2019) (0)
Side-Channel Attacks (2016) (0)
Session details: Wireless session: information design methodology (2005) (0)
A New Hardware Implementation (2017) (0)
Implementation-oriented Simulation-oriented Implementation-oriented Design with Race-free Hardware Semantics (0)
Benchmarking DSP Architectures for Low Power Applications (2002) (0)
Energy and performance analysis of mapping parallel multi-threaded tasks for an on-chip multi-processor system (2005) (0)
Performance evaluation of control unit options for elliptic curve cryptography: a case study on binary Edwards curves (2010) (0)
A Study on Output Bit Tampering of True Random Number Generators Using Time-Varying EM Waves (2021) (0)
Dagstuhl Seminar 10281, Dynamically Reconfigurable Architectures, 11.-16.07.2010 Dynamically Reconfigurable Architectures (2010) (0)
REAL-TIME EMBEDDED PROCESSORS : ARCHITECTURES AND DESIGN METHODS (2003) (0)
Unlocking the design secrets of a 2.29 Gb/s Rijndael encryption processor (2002) (0)
10281 Summary - Dynamically Reconfigurable Architectures (2010) (0)
RECTANGLE: a bit-slice lightweight block cipher suitable for multiple platforms (2015) (0)
Wireless Wednesday at DAC (2005) (0)
Side channel aware design: Algorithms and Architectures for Curve-based Cryptography over GF(2^n) (2005) (0)
2019 IEEE WIE Committee Members (2018) (0)
Discrete Gaussian Sampling (2019) (0)
Coprocessor for Koblitz Curves (2019) (0)
Chapter # 8 ARCHITECTURES AND DESIGN TECHNIQUES FOR ENERGY EFFICIENT EMBEDDED DSP AND MULTIMEDIA PROCESSING Subtitle (2015) (0)
Position Statements (2010) (0)
EE2: Workshop on circuits for social good (2018) (0)
Design Methods for Secure Hardware (NII Shonan Meeting 2014-11) (2014) (0)
Scabbard: a suite of efficient learning with rounding key-encapsulation mechanisms (2021) (0)
Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems (2007) (0)
Circuits for Security and Secure Circuits: Implementation of cryptographic algorithms (2023) (0)
Arithmetic of τ\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\tau $$\end{document}-adic expansions for lightweight K (2018) (0)
2013 JETTA-TTTC Best Paper Award (2014) (0)
Mining CryptoNight-Haven on the Varium C1100 Blockchain Accelerator Card (2022) (0)
Scan attacks on side-channel and fault attack resistant public-key implementations (2012) (0)
The Impact of X-ray and Proton Radiation on a CMOS Physically Unclonable Function Based on Oxide Breakdown (2018) (0)
Background (2019) (0)
Session 36 Overview: Hardware Security Digital Architectures and Systems Subcommittee (2021) (0)
Hw/sw co-design and asip architectures for cryptographic primitives in embedded security systems (2005) (0)
Design and Analysis of Configurable Ring Oscillators for True Random Number Generation Based on Coherent Sampling (2021) (0)
Masking ring-LWE (2016) (0)
UCLA students develop a prototype fingerprint authentication device incorporating a Virtex-II FPGA . ThumbPod Puts Security Under Your Thumb 00 (2003) (0)
Session details: Securing and debugging embedded systems (2008) (0)
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003 (2003) (0)
FPGADesignforAlgebraicTori-BasedPublic-KeyCryptography (2008) (0)
Future of Assurance: Ensuring that a System is Trustworthy (2009) (0)
Secure JTAG Implementation Using Schnorr Protocol (2013) (0)
Chapter 11 : Wireless digital signal proc (1997) (0)
Efficient and secure hardware (2012) (0)
MESSAGE FROM TPC CO-CHAIR (2020) (0)
On the Key Schedules of Lightweight Block Ciphers for RFID Applications (2011) (0)
Conclusions and Future Work (2019) (0)
Unified Digit-Serial Multiplier and Inverter in Finite Field GF(2 m ). (2008) (0)
Comparison of two random number generators on an FPGA (2008) (0)
C++ Object Oriented Programming (2000) (0)
A $334$-$\mu \text{W}$ $0.158$-$\text{mm}^2$ ASIC for Post-Quantum Key-Encapsulation Mechanism Saber With Low-Latency Striding Toom–Cook Multiplication (2023) (0)
Introduction (2019) (0)
Interleaver-Division Multiple Access on the OR Multiple Access Channel (2006) (0)
A Security Protocol for Biometric Smart Cards (2002) (0)
Optimizing Linear Correctors: A Tight Output Min-Entropy Bound and Selection Technique (2023) (0)
HW/SW Co-design forAccelerating Public-Key Cryptosystems overGF(p)onthe8051j-controller (2006) (0)
Guest editor's introduction design environments for DSP (1995) (0)
10281 Abstracts Collection - Dynamically Reconfigurable Architectures (2006) (0)
1 Circuit Challenges from Cryptography (2014) (0)
Implementation and Evaluation of Zero-Knowledge Proofs of Knowledge (2012) (0)
HARDWARE SECURITY KNOWLEDGE AREA ( DRAFT FOR COMMENT ) (0)
A Lightweight 1.16 pJ/bit Processor for the Authenticated Encryption Scheme KetjeSR (2019) (0)
FPT: a Fixed-Point Accelerator for Torus Fully Homomorphic Encryption (2022) (0)
Tiny Public-Key Security Processor (2009) (0)
10281 Abstracts Collection Dynamically Reconfigurable Architectures — Dagstuhl Seminar — (2010) (0)
Editorial: Transforming Signal Processing Applications into Parallel Implementations (2007) (0)
Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs (2014) (0)
A Practical Attack on KeeLoq (2010) (0)
for Somewhat Homomorphic Function Evaluation (2015) (0)
Secure Remote Reconflguration of FPGAs (2010) (0)
Transforming Signal Processing Applications into Parallel Implementations (2007) (0)
Guest editorial: low-power electronics and design (2002) (0)

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