Israel Koren
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Israel Korencomputer-science Degrees
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Computer Science
Why Is Israel Koren Influential?
(Suggest an Edit or Addition)Israel Koren's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- Computer arithmetic algorithms (2018) (1269)
- Fault Injection Attacks on Cryptographic Devices: Theory, Practice, and Countermeasures (2012) (471)
- Fault-Tolerant Systems (2007) (454)
- Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard (2003) (355)
- Defect tolerance in VLSI circuits: techniques and yield analysis (1998) (243)
- System-level power-aware design techniques in real-time systems (2003) (170)
- Complete and partial fault tolerance of feedforward neural nets (1995) (161)
- On Area and Yield Considerations for Fault-Tolerant VLSI Processor Arrays (1984) (102)
- Optimal aspect ratios of building blocks in VLSI (1988) (99)
- A reconfigurable and fault-tolerant VLSI multiprocessor array (1981) (99)
- Fault tolerance in VLSI circuits (1990) (99)
- Yield Models for Defect-Tolerant VLSI Circuits: A Review (1989) (95)
- Workshop on fault diagnosis and tolerance in cryptography (2004) (94)
- A Unified Negative-Binomial Distribution for Yield Analysis of Defect-Tolerant Circuits (1993) (89)
- Evaluating Elementary Functions in a Numerical Coprocessor Based on Rational Approximations (1990) (84)
- Countermeasures against fault attacks on software implemented AES: effectiveness and cost (2010) (84)
- Towards energy-aware software-based fault tolerance in real-time systems (2002) (80)
- Floorplans, planar graphs and layouts (1988) (78)
- Hybrid Signed-Digit Number Systems: A Unified Framework for Redundant Number Representations With Bounded Carry Propagation Chains (1994) (78)
- Connectivity and performance tradeoffs in the cascade correlation learning architecture (1994) (78)
- Layout-synthesis techniques for yield enhancement (1995) (77)
- The Optimal Fan-Out of Clock Network for Power Minimization by Adaptive Gating (2012) (74)
- Modeling the Effect of Redundancy on Yield and Performance of VLSI Systems (1987) (73)
- Defect and Fault Tolerance in VLSI Systems (2012) (72)
- A Continuous-Parameter Markov Model and Detection Procedures for Intermittent Faults (1978) (70)
- Yield and performance enhancement through redundancy in VLSI and WSI multiprocessor systems (1986) (70)
- A Study on the Use of Performance Counters to Estimate Power in Microprocessors (2013) (69)
- A data-driven VLSI array for arbitrary algorithms (1988) (63)
- A parity code based fault detection for an implementation of the Advanced Encryption Standard (2002) (62)
- Reliability Analysis of N-Modular Redundancy Systems with Intermittent and Permanent Faults (1979) (62)
- Design Flow for Flip-Flop Grouping in Data-Driven Clock Gating (2014) (60)
- An efficient hardware-based fault diagnosis scheme for AES: performances and cost (2004) (58)
- Fault Diagnosis and Tolerance in Cryptography (2006) (55)
- Constant-Time Addition and Simultaneous Format Conversion Based on Redundant Binary Representations (2001) (51)
- Incorporating error detection and online reconfiguration into a regular architecture for the advanced encryption standard (2005) (51)
- Generalized multistate monotone coherent systems (1994) (51)
- An Operation-Centered Approach to Fault Detection in Symmetric Cryptography Ciphers (2007) (51)
- An interactive VLSI CAD tool for yield estimation (1995) (48)
- Simulated Annealing Based Temperature Aware Floorplanning (2007) (48)
- TILTS: A Fast Architectural-Level Transient Thermal Simulation Method (2007) (46)
- Experimental and Analytical Study of Xeon Phi Reliability (2017) (45)
- Affinity-Based Thread and Data Mapping in Shared Memory Systems (2016) (43)
- Analysis of a Class of Recovery Procedures (1986) (43)
- Fault-sensitivity analysis and reliability enhancement of analog-to-digital converters (2003) (43)
- Performance Per Watt Benefits of Dynamic Core Morphing in Asymmetric Multicores (2011) (43)
- A statistical study of defect maps of large area VLSI IC's (1994) (42)
- An opportunistic prediction-based thread scheduling to maximize throughput/watt in AMPs (2013) (41)
- Techniques for transient fault sensitivity analysis and reduction in VLSI circuits (2003) (41)
- Fault Diagnosis and Tolerance in Cryptography, Third International Workshop, FDTC 2006, Yokohama, Japan, October 10, 2006, Proceedings (2006) (41)
- Identification of in-field defect development in digital image sensors (2007) (40)
- Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits (2007) (40)
- Quantitative analysis of in-field defects in image sensor arrays (2007) (38)
- Embedding Tree Structures in VLSI Hexagonal Arrays (1984) (37)
- The minimax cache: an energy-efficient framework for media processors (2002) (36)
- Cool-cache for hot multimedia (2001) (35)
- Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices? (2008) (34)
- An Adaptive Resource Partitioning Algorithm for SMT processors (2008) (34)
- Designing interconnection buses in VLSI and WSI for maximum yield and minimum delay (1988) (34)
- Diagnosis of Intermittent Faults in Combinational Networks (1977) (33)
- On the propagation of faults and their detection in a hardware implementation of the Advanced Encryption Standard (2002) (32)
- Nanoscale Application Specific Integrated Circuits (2011) (32)
- Interaction Between Fault Attack Countermeasures and the Resistance Against Power Analysis Attacks (2012) (32)
- The Effect of Operation Scheduling on the Performance of a Data Flow Computer (1987) (31)
- JMPI: implementing the message passing standard in Java (2002) (30)
- Towards logic functions as the device (2010) (29)
- Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-threshold Devices through an Example of a 65nm AES Implementation (2011) (27)
- Statistical identification and analysis of defect development in digital imagers (2009) (26)
- Techniques for yield enhancement of VLSI adders (1995) (25)
- Automatic Detection of In-field Defect Growth in Image Sensors (2008) (25)
- Temptor: A Lightweight Runtime Temperature Monitoring Tool Using Performance Counters (2006) (25)
- A self-correcting active pixel camera (2000) (25)
- New routing and compaction strategies for yield enhancement (1992) (25)
- The Hyeti Defect Tolerant Microprocessor: A Practical Experiment and its Cost-Effectiveness Analysis (1994) (24)
- Accurate estimation of soft error rate (SER) in VLSI circuits (2004) (24)
- Detecting and locating faults in VLSI implementations of the Advanced Encryption Standard (2003) (24)
- Analysis of strategies for constructive general block placement (1988) (23)
- Improving performance per watt of asymmetric multi-core processors via online program phase classification and adaptive core morphing (2013) (23)
- Utilization-Based Resource Partitioning for Power-Performance Efficiency in SMT Processors (2011) (22)
- Application-Level Fault Tolerance as a Complement to System-Level Fault Tolerance (2000) (22)
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2018) (21)
- Event-driven adaptive duty-cycling in sensor networks (2009) (20)
- Empirical formula for rates of hot pixel defects based on pixel size, sensor area, and ISO (2013) (20)
- On Switching Policies for Modular Redundancy Fault-Tolerant Computing Systems (1987) (20)
- Crosstalk minimization in three-layer HVH channel routing (1997) (20)
- Adaptive fault-tolerance fault-tolerance for cyber-physical systems (2013) (20)
- Incorporating Yield Enhancement into the Floorplanning Process (2000) (20)
- Scalable Thread Scheduling in Asymmetric Multicores for Power Efficiency (2012) (19)
- The Effect of Scaling on the Yield of VLSI Circuits (1988) (19)
- Phantom redundancy: a high-level synthesis approach for manufacturability (1995) (19)
- A voltage scheduling heuristic for real-time task graphs (2003) (19)
- A Direct Mapping of Algorithms onto VLSI Processing Arrays Based on the Data Flow Approach (1983) (19)
- A note on error detection in an RSA architecture by means of residue codes (2006) (18)
- Cool-Fetch: Compiler-Enabled Power-Aware Fetch Throttling (2002) (18)
- Application-level fault tolerance in the orbital thermal imaging spectrometer (2004) (18)
- Countermeasures against EM analysis for a secured FPGA-based AES implementation (2013) (17)
- Robust detection of defects in imaging arrays (2006) (16)
- Software-Based Failure Detection and Recovery in Programmable Network Interfaces (2007) (16)
- Countermeasures Against Branch Target Buffer Attacks (2007) (16)
- On Classes of Positive, Negative, and Imaginary Radix Number Systems (1981) (15)
- Fault spectrum analysis for fast spare allocation in reconfigurable arrays (1992) (15)
- Layer reassignment for antenna effect minimization in 3-layer channel routing (1996) (15)
- Tradeoffs in Imager Design with Respect to Pixel Defect Rates (2010) (14)
- Temperature-aware computing (2011) (14)
- Cool-Fetch: a compiler-enabled IPC estimation based framework for energy reduction (2004) (14)
- Transient fault sensitivity analysis of analog-to-digital converters (ADCs) (2001) (14)
- Reliability enhancement of real-time multiprocessor systems through dynamic reconfiguration (1994) (14)
- Advanced fault-tolerance techniques for a color digital camera-on-a-chip (2001) (13)
- On the effect of floorplanning on the yield of large area integrated circuits (1997) (13)
- Analysis of the Signal Reliability Measure and an Evaluation Procedure (1979) (13)
- The Concept and Implementation of Data-Driven Processor Arrays (1987) (13)
- On Reliability Trojan Injection and Detection (2012) (13)
- Energy characterization of hardware-based data prefetching (2004) (13)
- Should yield be a design objective? (2000) (13)
- Reliability enhancement of analog-to-digital converters (ADCs) (2001) (13)
- Adaptive Fault-Tolerance for Cyber-Physical Systems (2012) (12)
- Layer assignment for yield enhancement (1995) (12)
- An analytical model of high performance superscalar-based multiprocessors (1995) (12)
- Determination of yield bounds prior to routing (1999) (12)
- Dynamic Thread Scheduling in Asymmetric Multicores to Maximize Performance-per-Watt (2012) (12)
- Cool-Cache: A compiler-enabled energy efficient data caching framework for embedded/multimedia processors (2003) (12)
- CAROL-FI: an Efficient Fault-Injection Tool for Vulnerability Evaluation of Modern HPC Parallel Accelerators (2017) (11)
- Impact of nanomanufacturing flow on systematic yield losses in nanoscale fabrics (2011) (11)
- CHAPTER 1 – Preliminaries (2007) (11)
- Analysis of a hybrid defect-tolerance scheme for high-density memory ICs (1997) (11)
- On gracefully degrading multiprocessors with multistage interconnection networks (1989) (11)
- On-Line Mapping of In-Field Defects in Image Sensor Arrays (2006) (11)
- Sequential Fault Diagnosis in Combinational Networks (1977) (11)
- Analyzing the impact of ISO on digital imager defects with an automatic defect trace algorithm (2010) (10)
- An Adaptive Algorithm for Fault Tolerant Re-Routing in Wireless Sensor Networks (2007) (10)
- Optical interconnects for multiprocessors cost performance trade-offs (1992) (10)
- Concurrent fault detection in a hardware implementation of the RC5 encryption algorithm (2003) (10)
- Compiler-based adaptive fetch throttling for energy-efficiency (2006) (10)
- Tradeoffs in imager design parameters for sensor reliability (2011) (10)
- 3-D integration requirements for hybrid nanoscale-CMOS fabrics (2011) (10)
- Exploring Heterogeneity within a Core for Improved Power Efficiency (2016) (10)
- Detecting faults in four symmetric key block ciphers (2004) (9)
- Yield-enhanced routing for high-performance VLSI designs (1997) (9)
- Filtering Random Graphs to Synthesize Interconnection Networks with Multiple Objectives (2002) (9)
- The effect of spot defects on the parametric yield of long interconnection lines (1995) (9)
- The effect of wire length minimization on yield (1994) (9)
- Restructuring hexagonal arrays of processors in the presence of faults (1987) (9)
- AdaFT: A Framework for Adaptive Fault Tolerance for Cyber-Physical Systems (2017) (9)
- A Random Distributed Algorithm to Embed Trees in Partially Faulty Processor Arrays (1991) (9)
- On-line identification of faults in fault-tolerant imagers (2005) (9)
- A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks (2014) (9)
- Predicting Pixel Defect Rates Based on Image Sensor Parameters (2011) (8)
- Thermal Aware Task Scheduling for Enhanced Cyber-Physical Systems Sustainability (2020) (8)
- Combining compiler and runtime IPC predictions to reduce energy in next generation architectures (2004) (8)
- The design of a 64-bit integer multiplier/divider unit (1993) (8)
- Using Simulated Annealing for Mapping Algorithms onto Data Driven Arrays (1991) (8)
- Does the floorplan of a chip affect its yield? (1993) (8)
- A Unified Approach to Yield Analysis of Defect Tolerant Circuits (1990) (8)
- AdaFT (2017) (8)
- Online mechanism for reliability and power-efficiency management of a dynamically reconfigurable core (2015) (7)
- A Fault Attack Against the FOX Cipher Family (2006) (7)
- Characterization of pixel defect development during digital imager lifetime (2008) (7)
- Technology mapping for hot-carrier reliability enhancement (1997) (7)
- An Architecture to Enable Life Cycle Testing in CMPs (2011) (7)
- Adaptive and polymorphic VLIW processor to optimize fault tolerance, energy consumption, and performance (2018) (7)
- Characterization of Gain Enhanced In-Field Defects in Digital Imagers (2009) (7)
- Balanced Block Spacing for VLSI Layout (1992) (7)
- Scheduling imprecise task graphs for real-time applications (2014) (7)
- A study on performance benefits of core morphing in an asymmetric multicore processor (2010) (7)
- A low energy dual-mode adder (2014) (7)
- Power-Aware Replication of Data Structures in Distributed Embedded Real-Time Systems (2000) (7)
- Reliability analysis of hybrid redundancy systems (1984) (7)
- Yield and routing objectives in floorplanning (1998) (7)
- Improving Communication and Load Balancing with Thread Mapping in Manycore Systems (2018) (7)
- A model for enhanced manufacturability of defect tolerant integrated circuits (1991) (7)
- Improved image accuracy in Hot Pixel degraded digital cameras (2013) (6)
- Enhancing Vehicular Anonymity in ITS: A New Scheme for Mix Zones and Their Placement (2019) (6)
- CHAPTER 2 – Hardware Fault Tolerance (2007) (6)
- Performance and Power Benefits of Sharing Execution Units between a High Performance Core and a Low Power Core (2014) (6)
- Single Event Upsets and Hot Pixels in digital imagers (2015) (6)
- Data mining the memory access stream to detect anomalous application behavior (2017) (6)
- Yield enhancement vs. performance improvement in VLSI circuits (1995) (6)
- A New Approach to the Evaluation of the Reliability of Digital Systems (1980) (6)
- Energy-Aware Data Prefetching for General-Purpose Programs (2004) (6)
- Enhanced correction methods for high density hot pixel defects in digital imagers (2015) (5)
- Thermal-Aware Task Allocation and Scheduling for Heterogeneous Multi-core Cyber-Physical Systems (2016) (5)
- Intermediate variable encodings that enable multiplexor-based implementations of two operand addition (1999) (5)
- Incorporating Error Detection in an RSA Architecture (2006) (5)
- Yield analysis of a novel scheme for defect-tolerant memories (1996) (5)
- Incorporating fault tolerance in analog-to-digital converters (ADCs) (2002) (5)
- Construction of Minimal n-2-n Encoders for Any n (1993) (5)
- A yield study of VLSI adders (1994) (5)
- A study on polymorphing superscalar processor dynamically to improve power efficiency (2013) (5)
- Thermal-aware management techniques for cyber-physical systems (2017) (5)
- Analyzing the Connectivity and Bandwidth of Multiprocessors with Multi-stage Interconnection Networks (1988) (5)
- Dynamic Reconfiguration vs. DVFS: A Comparative Study on Power Efficiency of Processors (2016) (5)
- The impact of floorplanning on the yield of fault-tolerant ICs (1995) (5)
- FAULT DETECTION IN THE ADVANCED ENCRYPTION STANDARD (2015) (5)
- On the bandwidth of a multi-stage network in the presence of faulty components (1988) (5)
- Jmpi: Implementing The Message Passing Interface Standard In Java (2000) (5)
- Improving processor lifespan and energy consumption using DVFS based on ILP monitoring (2015) (5)
- STATS: A framework for microprocessor and system-level design space exploration (1999) (5)
- Minimum-diameter cyclic arrangements in mapping data-flow graphs onto VLSI arrays (1988) (5)
- Tradeoffs in the Design of Single Chip Multiprocessors (1994) (5)
- Low overhead fault tolerant networking in Myrinet (2003) (5)
- Increases in Hot Pixel Development Rates for Small Digital Pixel Sizes (2016) (5)
- Online Inertia-Based Temperature Estimation for Reliability Enhancement (2016) (4)
- Reducing Energy per Instruction via Dynamic Resource Allocation and Voltage and Frequency Adaptation in Asymmetric Multicores (2014) (4)
- A mechanism to verify cache coherence transactions in multicore systems (2012) (4)
- Measuring the Vulnerability of Interconnection Networks in Embedded Systems (1998) (4)
- Comments on "The Diogenes Approach to Testable Fault-Tolerant Arrays of Processors" (1986) (4)
- The effect of placement on yield for standard cell designs (2000) (4)
- Importance Sampling to Evaluate Real-time System Reliability: A Case Study (2001) (4)
- Discrete and Continuous Models for the Performance of Reconfigurable Multistage Systems (1991) (4)
- On Paths with the Shortest Average Arc Length in Weighted Graphs (1993) (4)
- Estimating the Potential Parallelism and Pipelining of Algorithms for Data Flow Machines (1992) (4)
- An interactive yield estimator as a VLSI CAD tool (1993) (4)
- Phantom redundancy: a register transfer level technique for gracefully degradable data path synthesis (2002) (4)
- Exploring soft errors (SEUs) with digital imager pixels ranging from 7 to 1.3 μm (2017) (4)
- Wire length and via reduction for yield enhancement (1996) (4)
- Determining Acceptance Tests for Application-Level Fault Detection (2002) (3)
- Trade-offs between yield and reliability enhancement [VLSI] (1996) (3)
- Biased Voting for Improved Yield in Nanoscale Fabrics (2011) (3)
- Analysis of defect maps of large area VLSI ICs (1992) (3)
- Architecture and technology tradeoffs in the design of next-generation multiprocessor servers (1995) (3)
- A unified approach to a class of number systems (1978) (3)
- A runtime support mechanism for fast mode switching of a self-morphing core for power efficiency (2014) (3)
- CHAPTER 8 – Defect Tolerance in VLSI Circuits (2007) (3)
- Energy aware kernel for hard real-time systems (2005) (3)
- Technology mapping for reliability enhancement in logic synthesis (2005) (3)
- Redundancy management in arithmetic processing via redundant binary representations (1999) (3)
- Enhancing dependability and energy efficiency of cyber-physical systems by dynamic actuator derating (2020) (3)
- Filtering Random Networks to Synthesize Interconnection Networks with Multiple Objectives (2002) (3)
- Incorporating Heterogeneous Redundancy in a Nanoprocessor for Improved Yield and Performance (2010) (3)
- CHAPTER 3 – Information Redundancy (2007) (2)
- Projecting the rate of in-field pixel defects based on pixel size, sensor area, and ISO (2012) (2)
- Analysis of Single Event Upsets Based on Digital Cameras with Very Small Pixels (2018) (2)
- Mapping algorithms onto a multiple-chip data-driven array (1993) (2)
- Hybrid number representations with bounded carry propagation chains (1993) (2)
- Exploring Hot Pixel Characteristics for 7 to 1.3 micron Pixels (2018) (2)
- Topological optimization of PLAs for yield enhancement (1993) (2)
- Do more camera pixels result in a better picture? (2012) (2)
- Floorplanning of memory ICs: routing complexity vs. yield (1999) (2)
- Adaptive clock gating for shift register based circuits (2010) (2)
- Introduction Special Section on High-Yield Systems (1989) (2)
- An evaluation of an AES implementation protected against EM analysis (2013) (2)
- CHAPTER 5 – Software Fault Tolerance (2007) (2)
- Saturating counters: application and design alternatives (2003) (2)
- Software-based adaptive and concurrent self-testing in programmable network interfaces (2006) (2)
- Improved correction for hot pixels in digital imagers (2014) (2)
- The Rapids Simulator: A Testbed for Evaluating Scheduling, Allocation and Fault-Recovery Algorithms in Distributed Real-Time Systems (2000) (2)
- Does the Sharing of Execution Units Improve Performance/Power of Multicores? (2015) (2)
- Improving the memory bandwidth of highly-integrated, wide-issue, microprocessor-based systems (1997) (2)
- Evaluating the Cost-Effectiveness of Switches in Processor Array Architectures (1985) (2)
- Effective analytical delay model for transistor sizing (2005) (2)
- Detecting and counteracting benign faults and malicious attacks in cyber physical systems (2018) (2)
- Layout and logic techniques for yield and reliability enhancement (1998) (2)
- An ILP formulation for yield-driven architectural synthesis (2005) (2)
- DEVELOPMENT OF APPLICATION-LEVEL FAULT TOLERANCE IN A REAL-TIME BENCHMARK (2003) (2)
- Trade-Offs between Yield and Reliability Enhancement * (1996) (2)
- A Study of the Impact of Computational Delays in Missile Interception Systems (2012) (1)
- Input Size Effects on the Radiation-Sensitivity of Modern Parallel Processors (2016) (1)
- Hot Pixel Behavior as Pixel Size Reduces to 1 micron (2017) (1)
- Introduction to a fault-tolerant distributed real-time system simulator (1999) (1)
- Detecting SEUs in Noisy Digital Imagers with small pixels (2019) (1)
- Seventh international workshop on Fault Diagnosis and Tolerance in Cryptography, 2010, FDTC 2010, Santa Barbara, California, USA, 21 August 2010 (2010) (1)
- Profiling and Reducing Micro-Architecture Bottlenecks at the Hardware Level (2014) (1)
- Experimental study and analysis of soft and permanent errors in digital cameras (2016) (1)
- CHAPTER 10 – Simulation Techniques (2007) (1)
- Reduced state-space markov decision process and the dynamic recovery and reconfiguration of a distributed real-time system (1996) (1)
- Adaptive workload adjustment for cyber-physical systems using deep reinforcement learning (2021) (1)
- On the Properties of Sensitized Paths (1979) (1)
- Networking issues in distributed real-time systems (2002) (1)
- Guest Editors' Introduction - Special Issue on Computer Arithmetic (2000) (1)
- SPECIAL SECTION ON HIGH-YIELD VLSI SYSTEMS - INTRODUCTION (1989) (1)
- Correcting high-density hot pixel defects in digital imagers (2014) (1)
- Yield-aware floorplanning (2005) (1)
- Fault Diagnosis and Tolerance in Cryptography: Third International Workshop, FDTC 2006, Yokohama, Japan, October 10, 2006, Proceedings (Lecture Notes in Computer Science) (2006) (1)
- Constructive floorplanning with a yield objective (2001) (1)
- Optimal determination of block dimensions in general floorplans (1994) (1)
- Efficient arithmetic implementations based on carry-save representations (2000) (1)
- Guest Editors' Introduction: Special Section on Fault Diagnosis and Tolerance in Cryptography (2006) (1)
- Energy efficient deeply fused dot-product multiplication architecture (2016) (1)
- Runtime architecture adaptation for energy management in embedded real-time systems (2012) (1)
- Image degradation from hot pixel defects with pixel size shrinkage (2019) (1)
- Improving performance per Watt of non-monotonic Multicore Processors via bottleneck-based online program phase classification (2016) (1)
- Relating digital imager defect rates to pixel size, sensor area and ISO (2012) (1)
- Using rational approximations for evaluating the reliability of highly reliable systems (2002) (1)
- Proceedings, 14th IEEE Symposium on Computer Arithmetic, April 14-16, 1999, Adelaide, Australia (1999) (1)
- Synthesis of saturating counters using traditional and non-traditional basic counters (2005) (0)
- On dynamic polymorphing of a superscalar core for improving energy efficiency (2013) (0)
- Surge Handling as a Measure of Real-Time System Dependability (1998) (0)
- SCHEDULING HEURISTICS FOR MAXIMIZING OUTPUT QUALITY OF IRIS TASK GRAPHS IN MULTIPROCESSOR ENVIRONMENT WITH TIME AND ENERGY BOUNDS (2011) (0)
- Energy and Dependability Enhancement by Dynamic Actuator Derating in Cyber-Physical Systems (2018) (0)
- Fault Sensitivity and Tolerance of Successive Approximation and Δ-Σ Analog-to-Digital Converters (ADCs) (2003) (0)
- Techniques for Yield Enhancement of VLSI Adders 1 (2001) (0)
- 1 YIELD MODELS FOR DEFECT-TOLERANT (1989) (0)
- CHAPTER 6 – Checkpointing (2007) (0)
- CHAPTER 4 – Fault-Tolerant Networks (2007) (0)
- Inertia-Based Temperature Estimation for Reliability Enhancement (2016) (0)
- Proceedings of the 1st Workshop on Cryptography and Security in Computing Systems, CS2 2014 (2014) (0)
- Designing a secure DRAM+NVM hybrid memory module (2019) (0)
- A Methodology for the In-Depth Analysis of Cache Hierarchy Design Alternatives (2007) (0)
- Sustainable Computing: Informatics and Systems (2011) (0)
- - Based Multimedia Architecture Simulator (2001) (0)
- Low Cost Dynamic Architecture Adaptation Schemes for Drowsy Cache Management (2013) (0)
- Block diagram of Rijndael ’ s AES : ( a ) Key Schedule , ( b ) Encryption (2005) (0)
- Information Redundancy (2021) (0)
- Software Fault Tolerance (2021) (0)
- Fault Detection in Cryptographic Systems (2007) (0)
- An Analysis of Scalar Memory Accesses in Embedded and Multimedia Systems (2004) (0)
- An algorithm for area and delay optimisation of sequential machines through decomposition (1994) (0)
- HIGH-SPEED MULTIPLICATION (2018) (0)
- Fourth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2007, FDTC 2007: Vienna, Austria, 10 September 2007 (2007) (0)
- ACHIEVING HIGHER DEPENDABILITY THROUGH HOST AND NIC PROCESSOR COLLABORATION (2009) (0)
- Hardware Fault Tolerance (2021) (0)
- CHAPTER 9 – Fault Detection in Cryptographic Systems (2007) (0)
- Using digital imagers to characterize the dependence of energy and area distributions of SEUs on elevation (2020) (0)
- Detecting faults in integer and finite field arithmetic operations for cryptography (2004) (0)
- Cyber-Physical Systems (2021) (0)
- Building a portable deeply-nested implicit information flow tracking (2020) (0)
- Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography (2006) (0)
- Integration Of Low Power Digital Circuitry Into Undergraduate Curricula (2006) (0)
- Reliability and Fault Tolerance Considerations when Designing Optical Interconnects for MPPs (1995) (0)
- An Architecture to Enable Lifetime Full Chip Testability in Chip Multiprocessors (2011) (0)
- Eight international workshop on Fault Diagnosis and Tolerance in Cryptography, 2011, FDTC 2011, Nara, Japan, 28 September 2011 (2011) (0)
- THE RESIDUE NUMBER SYSTEM (2018) (0)
- Fault-Tolerant Networks (2021) (0)
- Optimizing the Yield of VLSI Circuits (2003) (0)
- Discrete and continuous models for the performance of multi-stage systems in the presence of faulty components (1989) (0)
- CHAPTER 7 – Case Studies (2007) (0)
- 2 Maximum Temperature for the SPEC 2000 Benchmarks (0)
- Mapping of algorithms onto programmable data-driven arrays (1991) (0)
- Exploring Design Alternatives for a Highly-Integrated, Wide-Issue, Microprocessor-Based System (2007) (0)
- Comment on "Nonplanar VLSI arrays with high fault-tolerance capabilities (1989) (0)
- Defect Tolerance in VLSI Circuits (2021) (0)
- A dynamic block-level execution profiler (2016) (0)
- Yield Enhancement vs. Performance Imp (1995) (0)
- Pre-processing input data to augment fault tolerance in space applications (2003) (0)
- Introduction of Application-level Fault Tolerance in the Rtht Benchmark Application-level Fault Tolerance Architecture and Real-time Systems Lab -university O F M a S S a C Husetts, Amherst (0)
- Testing and Validation of the CASA DCAS System (2006) (0)
- Special Issue: Selected papers from the 2011 IEEE International Green Computing Conference (IGCC 2011) (2012) (0)
- Chapter 19 THE RAPIDS SIMULATOR : A TESTBED FOR EVALUATING SCHEDULING , ALLOCATION , AND FAULT-RECOVERY ALGORITHMS IN DISTRIBUTED REAL-TIME SYSTEMS (2003) (0)
- A Yield Study of Vlsi Adders 1 (1994) (0)
- Cost Functions for Scheduling Tasks in Cyber-physical Systems (2012) (0)
- Application-Driven Reliability Measures and Evaluation Tool for Fault-Tolerant Real-Time Systems (2001) (0)
- A Mean Value Analysis Multiprocessor Model Incorporating Superscalar Processors and Latency Tolerating Techniques (1996) (0)
- Keynote speech: IGSC 2017: Green computing through adaptive multi-core architectures (2017) (0)
- Author ' s personal copy A low energy dual-mode adder q (2014) (0)
- Reconfigurable optical interconnects for computer vision applications (1994) (0)
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What Schools Are Affiliated With Israel Koren?
Israel Koren is affiliated with the following schools: