John L. Hennessy
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American computer scientist
John L. Hennessy's AcademicInfluence.com Rankings
John L. Hennessyengineering Degrees
Engineering
#1633
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#2365
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#601
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Electrical Engineering
#276
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#315
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#112
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John L. Hennessycomputer-science Degrees
Computer Science
#2443
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#2551
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#1069
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Parallel Computing
#11
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#11
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#9
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Computer Architecture
#14
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#14
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#12
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Database
#506
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#530
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#199
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Engineering Computer Science
John L. Hennessy's Degrees
- Bachelors Electrical Engineering Villanova University
Why Is John L. Hennessy Influential?
(Suggest an Edit or Addition)According to Wikipedia, John Leroy Hennessy is an American computer scientist, academician and businessman who serves as chairman of Alphabet Inc. Hennessy is one of the founders of MIPS Computer Systems Inc. as well as Atheros and served as the tenth President of Stanford University. Hennessy announced that he would step down in the summer of 2016. He was succeeded as president by Marc Tessier-Lavigne. Marc Andreessen called him "the godfather of Silicon Valley."
John L. Hennessy's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- Computer Architecture: A Quantitative Approach (1969) (11709)
- Computer Architecture - A Quantitative Approach, 5th Edition (1996) (1373)
- The Stanford Dash multiprocessor (1992) (1099)
- Memory consistency and event ordering in scalable shared-memory multiprocessors (1990) (1035)
- Computer Architecture, Fifth Edition: A Quantitative Approach (2011) (970)
- Computer architecture (2nd ed.): a quantitative approach (1996) (895)
- The directory-based cache coherence protocol for the DASH multiprocessor (1990) (745)
- Computer organization and design: the hardware-software interface (appendix a (1993) (704)
- Computer Architecture - A Quantitative Approach (4. ed.) (2007) (689)
- The Stanford FLASH multiprocessor (1994) (633)
- SUIF: an infrastructure for research on parallelizing and optimizing compilers (1994) (627)
- An evaluation of directory schemes for cache coherence (1988) (532)
- Memory consistency and event ordering in scalable shared-memory multiprocessors (1990) (514)
- Computer Organization & Design: The Hardware/Software Interface (1993) (436)
- Computer Organization and Design, Fourth Edition, Fourth Edition: The Hardware/Software Interface (The Morgan Kaufmann Series in Computer Architecture and Design) (2008) (368)
- A new golden age for computer architecture (2019) (361)
- The priority-based coloring approach to register allocation (1990) (360)
- An analytical cache model (1989) (335)
- Reducing the cost of branches (1986) (293)
- Two Techniques to Enhance the Performance of Memory Consistency Models (1991) (266)
- Performance evaluation of memory consistency models for shared-memory multiprocessors (1991) (261)
- Efficient and exact data dependence analysis (1991) (257)
- Postpass Code Optimization of Pipeline Constraints (1983) (257)
- False Sharing ans Spatial Locality in Multiprocessor Caches (1994) (250)
- Cache performance of operating system and multiprogramming workloads (1988) (246)
- The Stanford FLASH multiprocessor (1994) (243)
- Register allocation by priority-based coloring (1984) (242)
- Comparative evaluation of latency reducing and tolerating techniques (1991) (234)
- The DASH Prototype: Implementation and Performance (1992) (229)
- VLSI Processor Architecture (1984) (213)
- The DASH Prototype: Logic Overhead and Performance (1993) (210)
- Multiprocessor Simulation and Tracing Using Tango (1991) (197)
- Computer organization and design (2nd ed.): the hardware/software interface (1997) (196)
- Compile-time partitioning and scheduling of parallel programs (1986) (183)
- Computer Organization and Design, Fifth Edition: The Hardware/Software Interface (2013) (178)
- Symbolic Debugging of Optimized Code (1982) (167)
- Computer technology and architecture: an evolving interaction (1991) (154)
- Scaling parallel programs for multiprocessors: methodology and examples (1993) (153)
- Computer organization and design - the hardware / software interface (3. ed.) (2007) (153)
- Performance tradeoffs in cache design (1988) (147)
- The performance impact of flexibility in the Stanford FLASH multiprocessor (1994) (138)
- The Future of Systems Research (1999) (134)
- WSCLOCK—a simple and effective algorithm for virtual memory management (1981) (128)
- The accuracy of trace-driven simulations of multiprocessors (1993) (125)
- Sharlit—a tool for building optimizers (1992) (121)
- Load Balancing and Data locality in Adaptive Hierarchical N-Body Methods: Barnes-Hut, Fast Multipole, and Rasiosity (1995) (120)
- Partitioning parallel programs for macro-dataflow (1986) (112)
- SoftFLASH: analyzing the performance of clustered distributed virtual shared memory (1996) (111)
- Programming for Different Memory Consistency Models (1992) (110)
- Characterizing the caching and synchronization performance of a multiprocessor operating system (1992) (109)
- MIPS: a VLSI processor architecture (1981) (107)
- A parallel adaptive fast multipole method (1993) (104)
- The performance advantages of integrating block data transfer in cache-coherent multiprocessors (1994) (101)
- Mtool: An Integrated System for Performance Debugging Shared Memory Multiprocessor Applications (1993) (98)
- FLASH vs. (Simulated) FLASH: closing the simulation loop (2000) (94)
- Data locality and load balancing in COOL (1993) (93)
- Retargetable Compiler Code Generation (1982) (93)
- Characteristics Of Performance-Optimal Multi-level Cache Hierarchies (1989) (91)
- Share Data Placement Optimizations to Reduce Multiprocessor Cache Miss Rates (1990) (90)
- Hardware/software tradeoffs for increased performance (1982) (90)
- MIPS: A microprocessor architecture (1982) (90)
- COOL: An object-based language for parallel programming (1994) (89)
- Hiding Memory Latency using Dynamic Scheduling in Shared-Memory Multiprocessors (1992) (87)
- Optimizing delayed branches (1982) (82)
- The SUIF Compiler System: a Parallelizing and Optimizing Research Compiler (1994) (79)
- Penicillin V and rifampin for the treatment of group A streptococcal pharyngitis: a randomized trial of 10 days penicillin vs 10 days penicillin with rifampin during the final 4 days of therapy. (1985) (74)
- An empirical comparison of the Kendall Square Research KSR-1 and Stanford DASH multiprocessors (1993) (73)
- Implications of hierarchical N-body methods for multiprocessor architectures (1995) (72)
- The Effects of Latency, Occupancy, and Bandwidth in Distributed Shared Memory Multiprocessors (1995) (71)
- The MIPS Machine (1982) (71)
- COOL: a language for parallel programming (1990) (64)
- Performance debugging shared memory multiprocessor programs with MTOOL (1991) (61)
- Evaluating the memory overhead required for COMA architectures (1994) (61)
- Schedule (2019) (61)
- Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors (1998) (59)
- Design of a high performance VLSI processor (1983) (58)
- Computer Organization & Design: The Hardware/Software Interface, Second Edition (1997) (57)
- A new golden age for computer architecture: Domain-specific hardware/software co-design, enhanced security, open instruction sets, and agile chip development (2018) (56)
- Computer Organization and Design - The Hardware / Software Interface (Revised 4th Edition) (2012) (53)
- Lisp on a reduced-instruction-set processor: characterization and optimization (1988) (51)
- Efficient performance prediction for modern microprocessors (2000) (51)
- Computer Organization and Design, Revised Fourth Edition, Fourth Edition: The Hardware/Software Interface (2011) (50)
- A simple interprocedural register allocation algorithm and its effectiveness for LISP (1989) (50)
- Tags and type checking in LISP: hardware and software approaches (1987) (49)
- Finding and Exploiting Parallelism in an Ocean Simulation Program: Experience, Results, and Implications (1992) (49)
- Cache-coherent distributed shared memory: perspectives on its development and future challenges (1999) (48)
- MIPS-X: a 20-MIPS peak, 32-bit microprocessor with on-chip cache (1987) (47)
- Application and Architectural Bottlenecks in Large Scale Distributed Shared Memory Machines (1996) (47)
- A Spectral Lower Bound Techniqye for the Size of Decision Trees and Two Level AND/OR Circuits (1990) (45)
- Computer Organization and Design: The Hardware Software Interface ARM Edition (2016) (44)
- Copy elimination in functional languages (1989) (43)
- Integrating Scalar Optimization and Parallelization (1991) (42)
- Organization and VLSI implementation of MIPS (1984) (41)
- MTOOL: a method for detecting memory bottlenecks (1991) (40)
- An overview of the suif compiler system (1990) (39)
- The Role of Performance (1994) (38)
- Design of scalable shared-memory multiprocessors: the DASH approach (1990) (36)
- The performance and scalability of distributed shared memory cache coherence protocols (1998) (35)
- The Performance Advantages of Integrating Message Passing in Cache-Coherent Multiprocessors (1993) (34)
- A Quantitative Analysis of the Performance and Scalability of Distributed Shared Memory (1999) (28)
- Code generation and reorganization in the presence of pipeline constraints (1982) (28)
- An evaluation of a commercial CC-NUMA architecture-the CONVEX Exemplar SPP1200 (1997) (27)
- Microprocessors: From Desktops to Supercomputers (1993) (26)
- Measurement and evaluation of the MIPS architecture and processor (1988) (26)
- A nationwide parallel computing environment (1997) (25)
- Estimating the Performance Advantages of Relaxing Consistency in a Shared Memory Multiprocessor (1990) (24)
- Characterizing the synchronization behavior of parallel programs (1988) (24)
- Specifying system requirements for memory consistency models (1993) (22)
- The Use and Abuse of SPEC: An ISCA Panel (2003) (21)
- Program optimization and exception handling (1981) (21)
- Performance directed memory hierarchy design (1988) (20)
- On the Spectre and Meltdown Processor Security Vulnerabilities (2019) (20)
- LISP on a reduced-instruction-set-processor (1986) (20)
- Analysis of Critical Architectural and Program Parameters in a Hierarchical Shared Memory Multiprocessor (1990) (19)
- Compile‐time copy elimination (1993) (19)
- Compilation of the Pascal case statement (1982) (19)
- Latency, Occupancy, and Bandwidth in DSM Multiprocessors: A Performance Evaluation (2003) (18)
- Hardware/Software Codesign of Processors: Concepts and Examples (1996) (18)
- Information technology for counterterrorism : immediate actions and future possibilities (2003) (15)
- MTOOL: A Method for Isolating Memory Bottlenecks in Shared Memory Multiprocessor Programs (1991) (15)
- Parallelism and Representation Problems in Distributed Systems (1980) (15)
- Analysis of critical architectural and programming parameters in a hierarchical (1990) (15)
- A 32b microprocessor with on-chip 2Kbyte instruction cache (1987) (15)
- Effectiveness of data dependence analysis (1995) (13)
- A pipelined 32b NMOS microprocessor (1984) (13)
- An Interactive Graphics System for Custom Design (1980) (12)
- EBOOK : Computer Organization and Design; the Hardware / Software Interface, RISC V Edition (2018) (11)
- TOMAL: a high-level programming language for microprocessor process control applications (1976) (11)
- Large and Fast: Exploiting Memory Hierarchy (1994) (10)
- SLIM: a simulation and implementation language for VLSI microcode (1985) (10)
- A simple and efficient implmentation approach for single assignment languages (1988) (10)
- Memory profiling on shared-memory multiprocessors (2002) (9)
- Advances in compiler technology (1986) (9)
- Hardware/software co-design of the Stanford FLASH multiprocessor (1997) (9)
- A language for microcode description and simulation in VLSI (1980) (8)
- The FLASH Multiprocessor: Designing a Flexible and Scalable System (1998) (8)
- TOMAL-a high-level programming language for microprocessor process control applications (1976) (8)
- SWAMI: A Flexible Logic Implementation System (1985) (8)
- RISC architecture: a perspective on the past and future (1989) (7)
- Arithmetic for Computers (1994) (7)
- A Technique for Estimating the Position of the Oxygen‐Hemoglobin Dissociation Curve (1974) (6)
- Small Shared-Memory Multiprocessors (1986) (6)
- An overview of the MIPS-X-MP project (1986) (6)
- Sufficient System Requirements for Supporting the PLpc Memory Model (1993) (6)
- TOMAL: A Task-Oriented Microprocessor Applications Language (1975) (5)
- Computer Organization And Design Second Edition (2016) (5)
- Scalable multiprocessors and the DASH approach (1992) (5)
- HIGH PERFORMANCE MICROPROCESSOR ARCHITECTURES (1990) (5)
- The design and implementation of parametric types in Pascal (1982) (5)
- The Priority-Based Register Allocation (1990) (5)
- Register allocation by priority-based coloring (2004) (4)
- Copy Elimination with Abstract Interpretation (1987) (3)
- The Stanford Dash multiprocessor-Computer (2008) (3)
- Reduced instruction set computer architectures (1988) (3)
- Reverse synthesis compilation for architectural research (1984) (3)
- Automatic compiler code generation (1981) (3)
- Trends in processor and system design and the interaction with advanced packaging (1992) (2)
- Scalable multiprocessors and the DASH approach (videotape) (1992) (2)
- Architectural convergence and its implications (1994) (2)
- Four Stage Pipelined 16 bit RISC on Xilinx Spartan 3AN FPGA (2016) (2)
- Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor (2016) (2)
- A real-time language for small processors: design, definition, and implementation. (1977) (2)
- 6 Related Work (1993) (1)
- Surveyor's Forum: Retargetable Code Generators (1983) (1)
- The computer architecture curriculum at Stanford: challenges and approaches (1996) (1)
- Molecular structure computation from multiple data sources (1999) (1)
- The DASH prototype: implementation and performance (1998) (1)
- Codesign of the Stanford FLASH Multiprocessor (1997) (1)
- SLIM: A Language for Microcode Description and Simulation in VLSJ1 (2012) (1)
- Chapter 1 - VLSI Processor Design Methodology* (1986) (1)
- 6 Discussion and conclusions (2009) (1)
- Retrospective: evaluation of directory schemes for cache coherence (1998) (1)
- Sharlit - A Tool for Building Optimizers (1992) (1)
- Enhancing Performance with Pipelining (1994) (1)
- The Performance Advantages of Integrating Block Data Trabsfer in Cache-Coherent Multiprocessors (1994) (0)
- Computer Abstractions and Technology (1994) (0)
- " LISP on a Reduced-Instruction-Set-Processor 00 (0)
- 3 Experimental Results and Conclusion 2.5 Partitioning Cost Function (0)
- Automatic Compiler Code Gene ration Mahadevan Ganapathi (1998) (0)
- Code Size Reduction in Embedded Systems with Redesigned ISA for RISC Processors (2020) (0)
- Microsupercomputers: Design and implementation. Semi-annual technical report, Oct 90-Mar 91 (1991) (0)
- Instructions: Language of the Machine (1994) (0)
- Challenges in Multiprocessor Architectures (1989) (0)
- Key Hardware and Software Issues in Processor Design (2007) (0)
- Research in VLSI Systems. Heuristic Programming Project and VLSI Theory Project. A Fast Turn Around Facility for Very Large Scale Integration (VLSI) (1982) (0)
- 7. Validation 6. User Interface 5. Timing and the Global Event Ordering Problem 4. Implementation Platforms Parallel Simulation Instruction-driven Simulation Execution-driven Simulation (1994) (0)
- 7. Validation 6. User Interface 5. Timing and the Global Event Ordering Problem 4. Implementation Platforms Parallel Simulation Instruction-driven Simulation Execution-driven Simulation (1994) (0)
- AD-Al 8 i 716 AN ANALYTICAL CACHE MODEL DTlC (0)
- B: The Basics of Logic Design (2016) (0)
- Data Locality and Load Balancing in (0)
- Research in VLSI Computer Systems. (1987) (0)
- Microsupercomputers: Design and Implementation (1988) (0)
- Register allocation by priority-based coloring (with retrospective) (1984) (0)
- WAM 2.3 A 32b Microprocessor with OnChip ZKbyte Instruction Cache (1984) (0)
- ,research in Vlsi Systems Research in Vlsi Systems Design and a Rchitectu Re (1998) (0)
- Research in VLSI systems design and architecture (1981) (0)
- Microsupercomputers: Design and implementation. Technical progress report, November 1988-March 1989 (1989) (0)
- A : Assemblers, Linkers, and the SPIM Simulator (2016) (0)
- Acknowledgements: I Would like to Thank Hagit Attiya for Many Helpful Comments and Discussions. Thanks Also To (0)
- Acknowledgements 8.2 Lower Bounds for Broadcasting and Related Problems 5 Realization on Feasible Networks Spawning Algorithms. a Spawning Algorithm Starts with a Collection of Unit Tasks, and at Each (1994) (0)
- 5. Conclusion and Future Work (0)
- A 20 MIPS Peak Microprocessor with On-Chip Cache, (1984) (0)
- Microsupercomputers: Design and implementation. Semi-annual technical progress report, November 1989-March 1990 (1990) (0)
- Research in VLSI (Very Large Scale Integration) Systems (1983) (0)
- An Overview of the MIPS-XMP Project (1998) (0)
- , Martin I. Loren. John Wiley & Sons, Inc., New York (1982), 246 pages. $25.95 (1983) (0)
- Microsupercomputers: Design and implementation. Semi-annual technical progress report, April-October 1989 (1988) (0)
- Instructor's manual for computer architecture : a quantitative approach (1996) (0)
- Systems I " Technical Progress Report April 1986-December 1986 Computer Systems Laboratory Integrated Circuits Laboratory Center for Integrated Systems (0)
- Memory Hierarchy Design-Part 4 . Virtual memory and virtual machines (2019) (0)
- 4.2 Multi-phase Barrier Synchronization 4.3 Optimal Number of Phases 3.1.2 Multi-path-based Schemes 3.2 Synchronization-worm-based Scheme 4 Barrier Synchronization Using Multiren- Dezvous Primitives 4.1 Single-phase Barrier Synchronization (1993) (0)
- The 50 Year History of the Microprocessor as Five Technology Eras (2021) (0)
- Research in VLSI Systems. (1982) (0)
- A Directory-Based Scalable General-Purpose Shared-Memory Multiprocessor (1998) (0)
- Microsupercomputers: design and implementation. Semiannual technical progress report, September 1987-March 1988 (1988) (0)
- NPartitioning Parallel Programs for Macro-Dataflow N D 3 TI C 0 E L . ECT (0)
- 9 – Parallel Processors (1994) (0)
- The formal definition of a real-time language (1981) (0)
- The febrile child: Clinical management of fever and other types of pyrexia (1983) (0)
- Liquid Meditation. Based on a Cave Virtual Reality Experience, the Liquid Architecture Was Created Using Water Reflections Captured on Video and Texture-mapped on a Virtual Cathedral. (courtesy Margaret Watson And (1997) (0)
- Interfacing Processors and Peripherals (1994) (0)
- 7 – Multicores, multiprocessadores e clusters (2014) (0)
- Microprocessors in the year 2000 (1993) (0)
- VLSI Processor Design Methodology* *The MIPS processor design, which is used as an example in this paper, has been supported by the Defense Advanced Research Projects Agency under grants MDA903-79-C-680 and MDA903-83-C-0335. (1986) (0)
- Languages and Compilers for Parallel Computing (1997) (0)
- The Processor: Datapath and Control (1994) (0)
- The Effects of Latency and Occupancy in Distributed Shared Memory Multiprocessors (2011) (0)
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What Schools Are Affiliated With John L. Hennessy?
John L. Hennessy is affiliated with the following schools:
What Are John L. Hennessy's Academic Contributions?
John L. Hennessy is most known for their academic work in the field of engineering. They are also known for their academic work in the fields of and computer science.
John L. Hennessy has made the following academic contributions:
