Juin‐jei Liou

Juin‐jei Liou's AcademicInfluence.com Rankings

Juin‐jei Liou

Engineering

#7315

World Rank

#8682

Historical Rank

Electrical Engineering

#2270

World Rank

#2376

Historical Rank

engineering Degrees

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Engineering

Juin‐jei Liou's Degrees

PhD Electrical Engineering University of California, Berkeley
Masters Electrical Engineering University of California, Berkeley
Bachelors Electrical Engineering National Taiwan University

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Juin‐jei Liou's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

A review of recent MOSFET threshold voltage extraction methods (2002) (767)
Revisiting MOSFET threshold voltage extraction methods (2013) (201)
Electrostatic discharge in semiconductor devices: an overview (1998) (135)
Modern Microwave Transistors: Theory, Design, and Performance (2002) (133)
A Review of Core Compact Models for Undoped Double-Gate SOI MOSFETs (2007) (125)
RF transistors: Recent developments and roadmap toward terahertz applications (2007) (116)
Advanced semiconductor device physics and modeling (1994) (99)
Novel Silicon-Controlled Rectifier (SCR) for High-Voltage Electrostatic Discharge (ESD) Applications (2008) (72)
On-Chip Spiral Inductors for RF Applications: An Overview (2004) (69)
Semiconductor devices for RF applications: evolution and current status (2001) (65)
Comparison and optimization of the performance of Si and GaAs solar cells (1992) (59)
An Improved Bidirectional SCR Structure for Low-Triggering ESD Protection Applications (2008) (59)
Forward-voltage capacitance and thickness of p-n junction space-charge regions (1987) (58)
Direct extraction of semiconductor device parameters using lateral optimization method (1999) (57)
A physics-based, analytical heterojunction bipolar transistor model, including thermal and high-current effects (1993) (57)
Parasitic series resistance-independent method for device-model parameter extraction (1996) (57)
RF MOSFET: recent advances, current status and future trends (2003) (56)
Analysis and Design of MOSFETs: Modeling, Simulation, and Parameter Extraction (1998) (56)
Electrostatic discharge in semiconductor devices: protection techniques (2000) (51)
Development of robust interconnect model based on design of experiments and multiobjective optimization (2001) (50)
Silicon-Controlled Rectifier Stacking Structure for High-Voltage ESD Protection Applications (2010) (48)
Analysis and design of MOSFETs (1998) (46)
An analytical model for current transport in AlGaAs/GaAs abrupt HBTs with a setback layer (1993) (46)
A New High Holding Voltage Dual-Direction SCR With Optimized Segmented Topology (2016) (45)
New simple procedure to determine the threshold voltage of MOSFETs (2000) (44)
High-Robustness and Low-Capacitance Silicon-Controlled Rectifier for High-Speed I/O ESD Protection (2013) (41)
TCAD Methodology for Design of SCR Devices for Electrostatic Discharge (ESD) Applications (2007) (40)
A physics-based current-dependent base resistance mode; for advanced bipolar transistors (1988) (39)
Design and integration of novel SCR-based devices for ESD protection in CMOS/BiCMOS technologies (2005) (38)
Forward-voltage capacitance of heterojunction space-charge regions (1988) (38)
Nanometer CMOS (2010) (37)
A generalized model for a two-terminal device and its applications to parameter extraction (1995) (36)
A novel dual-polarity device with symmetrical/asymmetrical S-type I-V characteristics for ESD protection design (2006) (34)
A Low-Power High-Speed Dynamic Comparator With a Transconductance-Enhanced Latching Stage (2019) (33)
Diffraction and transmission of a detonation into a bounding explosive layer (1988) (33)
A review of DC extraction methods for MOSFET series resistance and mobility degradation model parameters (2017) (32)
Silicon-Controlled Rectifier for Electrostatic Discharge Protection Solutions With Minimal Snapback and Reduced Overshoot Voltage (2015) (32)
Investigation of LOCOS- and Polysilicon-Bound Diodes for Robust Electrostatic Discharge (ESD) Applications (2010) (31)
Modeling the tunnelling current in reverse-biased p/n junctions (1990) (29)
An Explicit Surface Potential Calculation and Compact Current Model for AlGaN/GaN HEMTs (2015) (29)
Base and collector leakage currents of AlGaAs/GaAs heterojunction bipolar transistors (1994) (29)
Simple method for extracting the difference between the drain and source series resistances in MOSFETs (1994) (29)
Determination of lifetime and surface recombination velocity of p-n junction solar cells and diodes by observing transients (1987) (29)
Base-collector junction capacitance of bipolar transistors operating at high current densities (1987) (28)
A new approach to extract the threshold voltage of MOSFETs (1997) (28)
SPICE modeling and quick estimation of MOSFET mismatch based on BSIM3 model and parametric tests (2001) (27)
An improved definition for modeling the threshold voltage of MOSFETs (1998) (27)
Comparison of the new VBIC and conventional Gummel-Poon bipolar transistor models (2000) (27)
A method to extract mobility degradation and total series resistance of fully-depleted SOI MOSFETs (2002) (27)
Principles and Analysis of AlGaAs/GaAs Heterojunction Bipolar Transistors (1996) (26)
Improved and physics-based model for symmetrical spiral inductors (2006) (26)
An avalanche multiplication model for bipolar transistors (1990) (25)
High-Holding-Voltage Silicon-Controlled Rectifier for ESD Applications (2012) (25)
Bidirectional Devices for Automotive-Grade Electrostatic Discharge Applications (2012) (25)
Bidirectional Diode-Triggered Silicon-Controlled Rectifiers for Low-Voltage ESD Protection (2012) (25)
Eliminating parasitic resistances in parameter extraction of semiconductor device models (1995) (25)
A novel lossy and dispersive interconnect model for integrated circuit simulation (1990) (24)
Snapback and Postsnapback Saturation of Pseudomorphic High-Electron Mobility Transistor Subject to Transient Overstress (2010) (24)
Calculation of the base current components and determination of their relative importance in AlGaAs/GaAs and InAlAs/InGaAs heterojunction bipolar transistors (1991) (24)
Thickness of p/n junction space‐charge layers (1988) (23)
An Improved Compact Model of Silicon-Controlled Rectifier (SCR) for Electrostatic Discharge (ESD) Applications (2008) (23)
Physical models for predicting the performance of Si/Si, AlGaAs/GaAs, and Si/SiGe solar cells (1993) (22)
RC-Embedded LDMOS-SCR With High Holding Current for High-Voltage I/O ESD Protection (2015) (22)
MODELLING SOLAR CELL S-SHAPED I-V CHARACTERISTICS WITH DC LUMPED-PARAMETER EQUIVALENT CIRCUITS A REVIEW (2017) (22)
ESD Design and Analysis Handbook (2003) (22)
Design and Analysis of an Area-Efficient High Holding Voltage ESD Protection Device (2015) (21)
Analysis of Safe Operating Area of NLDMOS and PLDMOS Transistors Subject to Transient Stresses (2010) (21)
New approach for defining the threshold voltage of MOSFETs (2001) (21)
An analytical subthreshold current model for pocket-implanted NMOSFETs (2003) (20)
Comments on 'Early voltage in very-narrow-base bipolar transistors' by D.J. Roulston (1990) (20)
Gate oxide evaluation under very fast transmission line pulse (VFTLP) CDM-type stress (2008) (20)
Extraction of the threshold voltage of MOSFETs: an overview (1997) (20)
An analytical threshold voltage model of NMOSFETs with hot-carrier induced interface charge effect (2005) (19)
Two-dimensional numerical analysis for extracting the effective channel length of short-channel MOSFETs (1995) (19)
P—N Junction (1998) (19)
Indirect fitting procedure to separate the effects of mobility degradation and source-and-drain resistance in MOSFET parameter extraction (2009) (19)
Introductory invited paper On the extraction of the source and drain series resistances of MOSFETs (1999) (19)
Prediction and Modeling of Thin Gate Oxide Breakdown Subject to Arbitrary Transient Stresses (2010) (18)
Novel Capacitance Coupling Complementary Dual-Direction SCR for High-Voltage ESD (2012) (18)
Semiconductor Device Physics and Simulation (2013) (17)
A method for determining a transmission line pulse shape that produces equivalent results to human body model testing methods (2000) (17)
An improved method for extracting the difference between drain and source resistances in MOSFETs (1996) (16)
Growth of Tellurium Nanobelts on h-BN for p-type Transistors with Ultrahigh Hole Mobility (2022) (16)
Compact Thermal Failure Model for Devices Subject to Electrostatic Discharge Stresses (2015) (16)
Breakdown voltage of ultrathin dielectric film subject to electrostatic discharge stress (2011) (16)
Base and collector currents of pre- and post-burn-in AlGaAs/GaAs heterojunction bipolar transistors (1994) (16)
An analytical subthreshold current/swing model for junctionless cylindrical nanowire FETs (JLCNFETs) (2013) (15)
Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications (2002) (15)
Capacitance of semiconductor p-n junction space-charge layers: an overview (1988) (15)
Synergy Effect of a π-Conjugated Ionic Compound: Dual Interfacial Energy Level Regulation and Passivation to Promote VOC and Stability of Planar Perovskite Solar Cells. (2022) (15)
Optimized pMOS-Triggered Bidirectional SCR for Low-Voltage ESD Protection Applications (2014) (15)
A New Analytical Subthreshold Potential/Current Model for Quadruple-Gate Junctionless MOSFETs (2014) (15)
Electrostatic Discharge Robustness of Si Nanowire Field-Effect Transistors (2009) (15)
Hot-carrier reliability and breakdown characteristics of multi-finger RF MOS transistors (2009) (14)
A new model for four-terminal junction field-effect transistors (2006) (14)
Modeling of mismatch effect in submicron MOSFETs based on BSIM3 model and parametric tests (2001) (14)
Modeling the cutoff frequency of single‐heterojunction bipolar transistors subjected to high collector‐layer current (1990) (14)
Determination of gate-bias dependent source/drain series resistance and effective channel length for advanced MOS devices (2006) (14)
Surface oxidation of polycrystalline cadmium telluride thin films for Schottky barrier junction solar cells (1995) (14)
Effects of anode materials on resistive characteristics of NiO thin films (2013) (14)
An Unassisted, Low Trigger-, and High Holding-Voltage SCR (uSCR) for On-Chip ESD-Protection Applications (2007) (14)
An Enhanced MLSCR Structure Suitable for ESD Protection in Advanced Epitaxial CMOS Technology (2019) (14)
Prediction of Gate Dielectric Breakdown in the CDM timescale utilizing very fast transmission line pulsing (2009) (13)
Investigation of high-current effects on the current gain of AlxGa1−xAs/GaAs/GaAs abrupt heterojunction bipolar transistors (1989) (13)
Analytical model for the AlGaAs/GaAs multiemitter finger HBT including self-heating and thermal coupling effects (1994) (13)
DETERMINATION OF PHYSICAL MECHANISMS CONTRIBUTING TO THE DIFFERENCE BETWEEN DRAIN AND SOURCE RESISTANCES IN SHORT-CHANNEL MOSFETs (1996) (13)
Design of gratings and frequency selective surfaces using fuzzy ARTMAP neural networks (1995) (12)
A double snapback SCR ESD protection scheme for 28 nm CMOS process (2018) (12)
A new ESD design methodology for high voltage DMOS applications (2010) (12)
Analysis of non-uniform current and temperature distributions in the emitter finger of AlGaAs/GaAs heterojunction bipolar transistors (1996) (12)
Incomplete ionization in a semiconductor and its implications to device modeling (1999) (12)
Development of a New pHEMT-Based Electrostatic Discharge Protection Structure (2011) (12)
Novel and robust silicon controlled rectifier (SCR) based devices for on-chip ESD protection (2004) (12)
Quasistatic capacitance of p/n junction space-charge layers by the Leibnitz rule (1988) (12)
New Diode-Triggered Silicon-Controlled Rectifier for Robust Electrostatic Discharge Protection at High Temperatures (2019) (12)
Novel and robust silicon-controlled rectifier (SCR) based devices for on-chip ESD protection (2004) (11)
Status and Future Prospects of CMOS Scaling and Moore's Law - A Personal Perspective (2020) (11)
Series resistance and effective channel length extraction of n-channel MOSFET at 77 K (1994) (11)
Influence of polysilicon-gate depletion on the subthreshold behavior of submicron MOSFETs (2002) (11)
ESD protection structure with reduced capacitance and overshoot voltage for high speed interface applications (2017) (11)
An improved model for substrate current of submicron MOSFETs (2002) (11)
ESD Protection Device With Dual-Polarity Conduction and High Blocking Voltage Realized in CMOS Process (2014) (11)
Characteristics of ESD protection devices operated under elevated temperatures (2016) (11)
Robust ESD Protection Solutions in CMOS/BiCMOS Technologies (2007) (11)
Bidirectional silicon‐controlled rectifier for advanced ESD protection applications (2019) (11)
A Compact and Self-Isolated Dual-Directional Silicon Controlled Rectifier (SCR) for ESD Applications (2019) (11)
On-chip electrostatic discharge protection for CMOS gas sensor systems-on-a-chip (SoC) (2006) (11)
An efficient and practical MOS statistical model for digital applications (2000) (11)
A New Method to Estimate Failure Temperatures of Semiconductor Devices Under Electrostatic Discharge Stresses (2016) (11)
An improved electrostatic discharge protection structure for reducing triggering voltage and parasitic capacitance (2003) (10)
Nanoscale Bias-Annealing Effect in Postirradiated Thin Silicon Dioxide Films Observed by Conductive Atomic Force Microscopy (2007) (10)
Self-assembling SiC nanoflakes/MXenes composites embedded in polymers towards efficient electromagnetic wave attenuation (2021) (10)
High‐level injection in quasi‐neutral region of n/p junction devices: Numerical results and empirical model (1995) (10)
Development of an Electrostatic Discharge Protection Solution in GaN Technology (2013) (10)
JFET circuit simulation using SPICE implemented with an improved model (1994) (10)
Failure Analysis of Si Nanowire Field-Effect Transistors Subject to Electrostatic Discharge Stresses (2010) (10)
Substrate current, gate current and lifetime prediction of deep-submicron nMOS devices (2005) (10)
Compact failure modeling for devices subject to electrostatic discharge stresses - A review pertinent to CMOS reliability simulation (2015) (10)
Minimizing Multiple Triggering Effect in Diode-Triggered Silicon-Controlled Rectifiers for ESD Protection Applications (2012) (10)
Collector signal delay time and collector transit time of HBTs including velocity overshoot (1992) (10)
Segmented SCR for high voltage ESD protection (2012) (10)
Lifetime determination in p/n junction diodes and solar cells from open-circuit-voltage decay including junction capacitance effects (1987) (10)
A study of base built-in field effects on the steady-state current gain of heterojunction bipolar transistors (1990) (10)
Modulating the bipolar junction transistor subjected to neutron irradiation for integrated circuit simulation (1992) (10)
Investigation of diode geometry and metal line pattern for robust ESD protection applications (2008) (9)
MODELING THE POST-BURN-IN ABNORMAL BASE CURRENT IN ALGAAS/GAAS HETEROJUNCTION BIPOLAR TRANSISTORS (1996) (9)
Investigation of turn-on speeds of electrostatic discharge protection devices using transmission-line pulsing technique (2008) (9)
Correlation of Human Metal Model and Transmission Line Pulsing Testing (2011) (9)
Study of Organic Thin-Film Transistors Under Electrostatic Discharge Stresses (2011) (9)
Digital Volume Pulse Measured at the Fingertip as an Indicator of Diabetic Peripheral Neuropathy in the Aged and Diabetic (2019) (9)
A new integration-based procedure to separately extract series resistance and mobility degradation in MOSFETs (2009) (9)
Parameter extraction in polysilicon nanowire MOSFETs using new double integration-based procedure (2010) (9)
No-Snapback Silicon-Controlled Rectifier for Electrostatic Discharge Protection of High-Voltage ICs (2015) (9)
Investigation of Sub-10-nm Diameter, Gate-All-Around Nanowire Field-Effect Transistors for Electrostatic Discharge Applications (2010) (8)
A unified look at the use of successive differentiation and integration in MOSFET model parameter extraction (2015) (8)
A Reliable Si3N4/Al2O3-HfO2 Stack MIM Capacitor for High-Voltage Analog Applications (2014) (8)
Physics-based large-signal heterojunction bipolar transistor model for circuit simulation (1991) (8)
The effects of AlGaN quantum barriers on carrier flow in deep ultraviolet nanowire laser diode (2021) (8)
A surface-potential-based drain current compact model for a-InGaZnO thin-film transistors in Non-Degenerate conduction regime (2017) (8)
Augmented DTSCR With Fast Turn-On Speed for Nanoscale ESD Protection Applications (2020) (8)
An analytical insulated-gate bipolar transistor (IGBT) model for steady-state and transient applications under all free-carrier injection conditions (1996) (8)
Transient safe operating area (TSOA) definition for ESD applications (2009) (8)
Characterization of ESD protection devices under total ionizing dose irradiation (2017) (8)
Evaluating MOSFET harmonic distortion by successive integration of the I–V characteristics (2008) (8)
Non-quasi-static capacitance of p/n junction space-charge regions (1988) (8)
Correlation Between TLP, HMM, and System-Level ESD Pulses for Cu Metallization (2014) (8)
An Enhanced Gate-Grounded NMOSFET for Robust ESD Applications (2019) (8)
An improved experimental setup for electrostatic discharge (ESD) measurements based on transmission line pulsing technique (2001) (8)
An improved latching pulse design for dynamic sense amplifiers (1990) (8)
Analysis of the validity of methods for extracting the effective channel length of short-channel LDD MOSFETs (1996) (7)
Analytical base‐collector heterojunction capacitance model including collector current effects (1989) (7)
The Effects of Neutron Irradiation on the Current Gain of AlGaAs/GaAs Heterojunction Bipolar Transistors (1990) (7)
Parameter extraction using lateral and vertical optimization (2000) (7)
Improved forward‐voltage p/n junction space‐charge region capacitance based on time‐domain reasoning (1987) (7)
2.5-Dimensional simulation for analyzing power arrays subject to ESD stresses (2009) (7)
Characterization and modeling of flicker noise in junction field-effect transistor with source and drain trench isolation (2007) (7)
Reliability investigation of InGaP/GaAs HBTs under current and temperature stress (1999) (7)
A compact drain current model for heterostructure HEMTs including 2DEG density solution with two subbands (2016) (7)
Modeling of On-Chip Differential Inductors and Transformers/Baluns (2007) (7)
Calculating double-exponential diode model parameters from previously extracted single-exponential model parameters (1995) (7)
A Novel and Robust Un-Assisted, Low-Trigger and High-Holding Voltage SCR (uSCR) for Area-Efficient On-Chip ESD Protection (2007) (7)
A study of the validity of capacitance-based method for extracting the effective channel length of MOSFET's (1997) (7)
Design and characterization of ESD solutions with EMC robustness for automotive applications (2015) (7)
Modeling the non‐quasi‐static metal‐semiconductor space‐charge‐region capacitance (1989) (7)
Semiconductor Process Reliability in Practice (2012) (7)
An electrostatic discharge failure mechanism in semiconductor devices, with applications to electrostatic discharge measurements using transmission line pulsing technique (2000) (6)
Extraction of MOSFET Model Parameters from the Measured Source-to-drain Resistance (2009) (6)
Integration-based approach to evaluate the sub-threshold slope of MOSFETs (2010) (6)
An improved junction capacitance model for junction field-effect transistors (2006) (6)
Theoretical prediction of the performance of Si and SiC bipolar transistors operating at high temperatures (1993) (6)
Very small snapback silicon-controlled rectifier for electrostatic discharge protection in 28 nm processing (2016) (6)
p-AlInN electron blocking layer for AlGaN-based deep-ultraviolet light-emitting diode (2021) (6)
A novel DTSCR with a variation lateral base doping structure to improve turn-on speed for ESD protection (2014) (6)
Improving ESD Protection Robustness Using SiGe Source/Drain Regions in Tunnel FET (2018) (6)
Effects of high-level free-carrier injection on the base transit time of bipolar junction transistors (1996) (6)
Modeling and measurement approaches for electrostatic discharge in semiconductor devices and ICs: an overview (1999) (6)
A Novel Capacitance-Coupling-Triggered SCR for Low-Voltage ESD Protection Applications (2010) (6)
Robustness evaluation of ESD protection devices in NEMS using a novel TCAD methodology (2008) (6)
An Improved Silicon-Controlled Rectifier (SCR) for Low-Voltage ESD Application (2020) (6)
Relative Errors of Free-Carrier Density at Different Temperatures Calculated from Approximations for the Fermi-Dirac Integral (1995) (6)
A physics-based model for the substrate resistance of MOSFETs (2002) (6)
Challenges of designing electrostatic discharge (ESD) protection in modern and emerging CMOS technologies (2013) (6)
Theoretical Investigation of the Electrical Behavior of SiC MESFETs for Microwave Power Amplification (1997) (6)
Electrostatic discharge in semiconductor devices: overview of circuit protection techniques (2000) (6)
Study of turn-on characteristics of SCRs for ESD protection with TDR-O and TDR-S TLPs (2010) (6)
A robust polysilicon-assisted SCR in ESD protection application (2007) (5)
Challenges of electrostatic discharge (ESD) protection in silicon nanowire technology (2012) (5)
Multiple-finger turn-on uniformity in silicon-controlled rectifiers (2010) (5)
Evaluation of RF electrostatic discharge (ESD) protection in 0.18-µm CMOS technology (2008) (5)
InGaP/GaAs heterojunction bipolar transistor and RF power amplifier reliability (2008) (5)
A continuous semi-empiric transfer characteristics model for surrounding gate undoped polysilicon nanowire MOSFETs (2011) (5)
Electrostatic Discharge Protection : Advances and Applications (2017) (5)
Current-voltage characteristics of submicrom GaAs MESFETs with nonuniform channel doping profiles (1992) (5)
A generalized finite element method for hydrodynamic modeling of short-channel devices (2000) (5)
Circuit modeling of transient emitter crowding and dynamic resistance effects for advanced bipolar transistors (1989) (5)
A semi-numerical model for multi-emitter finger AlGaAs/GaAs HBTs (1994) (5)
Robust Protection Device for Electrostatic Discharge/Electromagnetic Interference in Industrial Interface Applications (2016) (5)
ESD protection techniques for semiconductor devices (2000) (5)
NLDMOS ESD Scaling Under Human Metal Model for 40-V Mixed-Signal Applications (2012) (5)
Overcoming multi finger turn-on in HV DIACs using local poly-ballasting (2014) (5)
A procedure for the extraction of the bulk-charge effect parameter in MOSFET models (1999) (5)
A unified four-terminal JFET static model for circuit simulation (1991) (5)
Extraction of the threshold voltage of MOSFETs (1998) (5)
A procedure to extract mobility degradation, series resistance and threshold voltage of SOI MOSFETs in the saturation region (2001) (5)
A physical model for the base transit time of advanced bipolar transistors (1995) (5)
Very fast transient simulation and measurement methodology for ESD technology development (2009) (5)
Modelling the channel-length modulation coefficient for junction field-effect transistors (1992) (5)
On the extraction of threshold voltage, effective channel length and series resistance of MOSFETs (2000) (5)
Statistical modeling of MOS devices for parametric yield prediction (2002) (5)
Design analysis of novel substrate-triggered GGNMOS in 65nm CMOS process (2010) (4)
vfTLP-VTH: A new method for quantifying the effectiveness of ESD protection for the CDM classification test (2013) (4)
Modeling the cutoff frequency of AlxGa1−xAs/GaAs/GaAs heterojunction bipolar transistors with proton-implanted collector region (1990) (4)
A Programmable Frequency Divider With a Full Modulus Range and 50% Output Duty Cycle (2020) (4)
Enhanced gated-diode-triggered silicon-controlled rectifier for robust electrostatic discharge (ESD) protection applications (2020) (4)
A 20-V CMOS-Based Monolithic Bidirectional Power Switch (2007) (4)
Analysis of metal routing technique in a novel dual direction multi-finger SCR ESD protection device (2008) (4)
Novel electrostatic discharge protection structure for a monolithic gas sensor systems-on-a-chip (2005) (4)
A new method to evaluate effectiveness of CDM ESD protection (2010) (4)
Drain and source resistances of short-channel LDD MOSFETs (1997) (4)
Embedded shunt diode pair to suppress overshoot voltage (2017) (4)
Two-dimensional numerical analysis of AlGaAsGaAs heterojunction bipolar transistors including the effects of graded layer, setback layer and self-heating (1996) (4)
Optimization of on-chip ESD protection structures for minimal parasitic capacitance (2003) (4)
Impact of the gate structure on ESD characteristic of tunnel field-effect transistors (2018) (4)
A Physics-Based Compact Model for Symmetrical Double-Gate Polysilicon Thin-Film Transistors (2017) (4)
Compositionally graded AlGaN hole source layer for deep-ultraviolet nanowire light-emitting diode without electron blocking layer (2021) (4)
Low-Capacitance SCR Structure for RF I/O Application (2013) (4)
MOSFET physics and modeling (1998) (4)
Study of power arrays in ESD operation regimes (2010) (4)
Statistical modeling of MOS devices based on parametric test data for improved IC manufacturing (2001) (4)
High‐forward‐voltage junction capacitance including effects of excess carrier storage in electron‐hole plasma (1987) (4)
A simplified and efficient numerical model for charge injection in acoustic charge transport devices (1992) (4)
Nanoscale MOS devices: device parameter fluctuations and low-frequency noise (Invited Paper) (2005) (4)
Effects of incomplete ionization of impurity dopants on the performance of bipolar junction transistors (1996) (4)
Statistical sensitivity analysis of MOSFET integrated circuits using process database (1989) (4)
A two-dimensional model for emitter-base junction capacitance of bipolar transistors (1988) (4)
Composition-graded quantum barriers improve performance in AlGaN-based deep ultraviolet laser diodes (2022) (3)
A spice-like reliability model for deep-submicron CMOS technology (2005) (3)
Silicon controlled rectifier (SCR) compact modeling based on VBIC and Gummel–Poon models (2009) (3)
Compact and Low Leakage Devices for Bidirectional Low-Voltage ESD Protection Applications (2021) (3)
Evaluation of electrostatic discharge (ESD) characteristics for bottom contact organic thin film transistor (2013) (3)
An improved transmission line pulsing (TLP) setup for electrostatic discharge (ESD) testing in semiconductor devices and ICs (2001) (3)
An analytical model for the current transport of graded heterojunction bipolar transistors (1995) (3)
A new method for extracting the effective channel length of MOSFETs (1998) (3)
Long-term base current instability in AlGaAs/GaAs HBTs: physical mechanisms, modeling, and SPICE simulation (1998) (3)
Thermal reliability of VCO using InGaP/GaAs HBTs (2011) (3)
Impact of oxide trap charge on performance of strained fully depleted SOI metal-gate MOSFET (2009) (3)
Effective channel length of submicron MOSFETs: numerical simulation, physical mechanisms, and extraction methods (1995) (3)
Semiconductor device physics and modelling. 1. Overview of fundamental theories and equations (1992) (3)
A model for reverse short-channel effects in MOSFETs (1995) (3)
Evaluation of Transient Behavior of Polysilicon-Bound Diode for Fast ESD Applications (2010) (3)
A Unified Quasi-3D Subthreshold Behavior Model for Multiple-Gate mosfets (2018) (3)
Self-protection capability of integrated NLDMOS power arrays in ESD pulse regimes (2011) (3)
Reliability Issues of Thin Film Transistors Subject to Electrostatic Discharge Stresses: An Overview (2021) (3)
Theoretical Study of Forward‐Voltage Heterojunction Space‐Charge‐Region Capacitance Including Interface‐State Effects (1989) (3)
Characterization of reverse recovery transient behavior of bipolar transistors for emitter parameters determination (1988) (3)
Reference voltage generation scheme enhancing speed and reliability for 1T1C-type FRAM (2014) (3)
An analytical MOSFET breakdown model including self-heating effect (2000) (3)
Metal-Semiconductor-Insulator-Metal Structure Field-Effect Transistors Based on Zinc Oxides and Doped Ferroelectric Thin Films (2014) (3)
A Novel Electrostatic Discharge (ESD) Protection Circuit in D-Mode pHEMT Technology (2012) (3)
Study on leakage current properties of BiFeO3 thin films with Pb(Zr,Ti)O3 buffer layer (2016) (3)
White Organic Light-emitting Diode Using Nano-double Ultrathin Carrier-trapping Materials in Performance Stability (2019) (3)
Analog circuit design and implementation of an adaptive resonance theory (ART) neural network architecture (1993) (3)
Electrostatic discharge (ESD) protection of RF integrated circuits (2012) (2)
A Model-Based Comparison of the Performance of AlGaAs/GaAs and Si/SiGe Heterojunction Bipolar Transistors (HBTs) Including Thermal Effects (1994) (2)
Devices with Adjustable Dual-Polarity Trigger - and Holding-Voltage/Current for High Level of Electrostatic Discharge Protection in Sub-Micron Mixed Signal (2009) (2)
Modeling of Low-Frequency Noise in Junction Field-Effect Transistor with Self-Aligned Planer Technology (2005) (2)
A new approach for SPICE simulation of AlGaAs/GaAs HBT subjected to burn-in test (1998) (2)
Determination of the fitting parameters for using uniform emitter and base doping profile in bipolar transistor modeling (1994) (2)
Design of gratings and frequency-selective surfaces using ARTMAP neural networks (1994) (2)
Failure mechanism and SPICE modeling of HBT long-term current instability (1997) (2)
Mixed analog/digital VLSI design and simulation of an adaptive resonance theory (ART) neural network architecture (1995) (2)
Back-End-of-Line-Based Resistive RAM in 0.13 μ m Partially-Depleted Silicon-on-Insulator Process for Highly Reliable Irradiation- Resistant Application (2020) (2)
A novel SCR for ESD protection in ICs (2007) (2)
Application of multiscale Poincaré short-time computation versus multiscale entropy in analyzing fingertip photoplethysmogram amplitudes to differentiate diabetic from non-diabetic subjects (2018) (2)
Low-power High-speed Dynamic Comparator Using a New Regenerative Stage (2018) (2)
Reliability study of ultrathin oxide films subject to irradiation-then-stress treatment using conductive atomic force microscopy (2007) (2)
Characterization of transient behavior and failure mechanism of polysilicon-bound diode under CDM-like very-fast transmission line pulsing (2010) (2)
Nano Devices and Sensors (2016) (2)
A Mixed Analog/Digital VLSI Design and Simulation of An Adaptive Resonance Theory (ART) Neural Network Architecture (1996) (2)
A model to monitor the current gain long-term instability in AlGaAs/GaAs HBTs based on noise and leakage current characteristics (1995) (2)
Acomprehensive compact SCR model for CDM ESD circuit simulation (2008) (2)
On the extraction of the threshold voltage of MOSFETs (1997) (2)
Improving robustness of GGNMOS with P-base layer for electrostatic discharge protection in 0.5-${\rm{\mu }}{\rm{m}}$ BCD process (2019) (2)
Whole chip ESD protection for 2.4 GHz LNA (2011) (2)
Modeling of temperature-dependent avalanche currents in advanced bipolar transistors (1991) (2)
Analyse of Protection Devices' Speed Performance against ESD under CDM Using TCAD (2007) (2)
Modelling of coupled interconnect lines for integrated circuits (1991) (2)
On the Reliability Issues of RF CMOS Devices (2006) (2)
Worst-case analysis and statistical simulation of MOSFET devices based on parametric test data (2001) (2)
A quasianalytical model for LT–GaAs and LT–Al0.3Ga0.7As MISFET devices (2000) (2)
Computer-Aided Design Methodology for Electrostatic Discharge (ESD) Protection Applications (2006) (2)
Optically driven photoconductive devices for power switching application. 1. Theory and experimental results (1992) (2)
Performance improvement of nitride semiconductor-based deep-ultraviolet laser diodes with superlattice cladding layers (2022) (2)
In Situ ESD Protection Structure for Variable Operating Voltage Interface Applications in 28-nm CMOS Process (2014) (2)
A Method to Model MOSFET's Second Breakdown Action for Circuit-Level ESD Simulation (2007) (2)
Novel electrostatic discharge (ESD) clamp circuit with low leakage current (2017) (2)
Integrated amorphous-Si TFT circuits for gate drivers on LCD panels (2013) (2)
Thermal-avalanche interacting behaviour of AlGaAs/GaAs multi-emitter finger heterojunction bipolar transistors (1995) (2)
Bias and temperature dependencies of base and collector leakage currents of AlGaAsGaAs heterojunction bipolar transistors (1996) (2)
Statistical and numerical method for MOSFET integrated-circuit sensitivity simulation using SPICE (1991) (2)
Study of Electrothermal Stress Effect on RF Performance of InGaP/GaAs Heterojunction Bipolar Transistor-Based Low-Noise Amplifier (2008) (2)
Evaluation of geometry layout and metal pattern to optimize ESD performance of silicon controlled rectifier (SCR) (2014) (2)
Effects of minority-carrier ballistic transport on the collector current of submicron BJT's (1993) (2)
Study on polarization characteristics of BiFeO3 thin films prepared by sol-gel spin-coating technology (2015) (2)
Effect of base grading on the early voltage of HBTs (1992) (2)
High holding voltage SCR with shunt-transistors to avoid the latch-up effect (2016) (2)
Kink effect on the base current of heterojunction bipolar transistors (1993) (2)
Electrostatic Discharge Protection For Embedded-Sensor Systems-On-a-Chip | NIST (2004) (2)
Low‐temperature p‐n junction space‐charge‐region thickness including the effects of doping‐dependent dielectric permittivity (1988) (2)
Empirical reliability modeling for 0.18-μm MOS devices (2003) (2)
Evolution and Current Status of RF Semiconductor Devices (2001) (2)
Novel voltage triggered electrostatic discharge (ESD) detection circuit (2017) (2)
A novel low-trigger and high-holding voltage SCR without externally- assisted circuitry for area-efficient on-chip ESD protection (2007) (1)
Modeling the abnormal base current in post-burn-in AlGaAs/GaAs heterojunction bipolar transistors (1996) (1)
The Evolution of Silicon Electronics (2010) (1)
ESD optimization with on-chip and on-board codesign ESD protection strategy for mixed signal system in package (2016) (1)
Extracting the model parameters of non-ideal junctions based on explicit analytical solutions of I-V characteristics (2004) (1)
On the extraction of the effective channel length of MOSFETs (1997) (1)
Heterogeneous stacking silicon controlled rectifier design with improved ESD performance (2017) (1)
ESD Breakdown of Parylene OFETs With Varying Contact Overlap Capacitance (2021) (1)
Design and modeling of on-chip electrostatic discharge (ESD) protection structures (2004) (1)
AlGaAs/GaAs heterojunction bipolar transistors for power applications: issues of thermal effect and reliability (2001) (1)
Model for the quasineutral region capacitance of p/n junction devices (1997) (1)
Current-voltage characteristics of bipolar transistors including quasi-saturation, finite collector lifetime, and high-low junction effects (1992) (1)
Extended-gate Field Effect Transistors with Zinc Oxide as sensing film for pH Sensing (2021) (1)
A Novel Product-Level Human Metal Model Characterization Methodology (2014) (1)
Electrical Conductivity and Thermal Sensing of CNTs/Polymer Nanocomposites (2021) (1)
Effects of using the more accurate intrinsic concentration on bipolar transistor modeling (1990) (1)
Failure analysis of Gate-all-around Nanowire Field Effect Transistor under TLP test (2014) (1)
Testing the impact of process defects on ECL power-delay performance (1991) (1)
A Novel Effective-Conducting-Path-Induced Scaling Length Model and Its Application for Assessing Short-Channel Performance of Multiple-Gate MOSFETs (2018) (1)
Optimization of AlGaAs/GaAs heterojunction bipolar transistors for current gain, cutoff frequency and maximum frequency (1993) (1)
Compact Modeling of Spiral Inductors for RF Applications (2006) (1)
Analysis of reliability of AlGaAs/GaAs HBTs based on device simulation (2001) (1)
Failure Analysis Techniques (2003) (1)
A fully on-chip ESD protection UWB-band low noise amplifier using GaAs enhancement-mode dual-gate pHEMT technology (2011) (1)
Array noise analysis for multi-megabit DRAM design (1993) (1)
Novel structure embedded with dual-diodes and silicon controlled rectifier for high speed I/O applications (2016) (1)
Defect engineering of two-dimensional materials towards next-generation electronics and optoelectronics (2022) (1)
Extraction of the bulk-charge effect parameter in MOSFETs (2000) (1)
A new approach to characterize and predict lifetime of deep-submicron nMOS devices (2004) (1)
TRANSITION FROM REGULAR TO MACH REFLECTION OF SHOCK WAVES IN PSEUDO-STATIONARY FLOW (1988) (1)
Thermal Characteristics of ESD Diode in FDSOI Technologies (2018) (1)
A Back-Gated Ferroelectric Field-Effect Transistor with an Al-Doped Zinc Oxide Channel (2015) (1)
Compact bipolar transistor model for circuit simulation (1988) (1)
Design optimization of SiGe BiCMOS Silicon Controlled Rectifier for Charged Device Model (CDM) protection applications (2014) (1)
A Physics-Based Bipolar-Transistor Model For Low-Temperature Circuit Simulation (1989) (1)
Investigation of forward transient characteristics of vertical GaN-on-GaN p-n diodes (2016) (1)
An analytical drain current model of short-channel MOSFETs including source/drain resistance effect (2006) (1)
Investigation of organic thin-film transistors for electrostatic discharge applications (2011) (1)
Analysis and design of a zero voltage switching dc-to-ac inverter (1995) (1)
A method to extract parameters in a generalized two-terminal device (1994) (1)
Challenges on designing electrostatic discharge protection solutions for low power electronics (2013) (1)
On the physical mechanism contributing to the difference between drain and source resistances in short-channel MOSFETs (1996) (1)
Characterization of oxide charge trapping in ultrathin N2O oxide using direct tunneling current (2006) (1)
Evaluation of nanowire field-effect transistors for electrostatic discharge (ESD) applications (2010) (1)
Improved LDMOS‐SCR for high‐voltage electrostatic discharge (ESD) protection applications (2020) (1)
Prediction of GaAs MESFET process-induced variations using a device-physics-based analytical model (1994) (1)
Comments on “theoretical C(V) equation of an amorphous-crystalline heterojunction at low frequency” (1988) (1)
Numerical analysis on determining the physical mechanisms contributing to the abnormal base current in post-burn-in AlGaAs/GaAs HBTs (1998) (1)
Investigation of the Filter Amplifiers using the TVS Diode for ESD Protection (2019) (1)
An improved velocity overshoot model for submicron-gate MESFETs (1996) (1)
On the design of tunable high-holding-voltage LVTSCR-based cells for on-chip ESD protection (2004) (1)
Improving the Quality and Electrical Properties of Poly(3,4-ethylenedioxythiophene):Poly(styrenesulfonate) (PEDOT:PSS) Film by Heating and Stirring the Solution (2019) (1)
Gate-oxide thickness dependence of LDD MOSFET parameters (1997) (1)
Failure of effective-channel length extraction methods due to the effect of the relative doping level of source and drain in short-channel LDD MOSFETs (1996) (1)
On the reverse short-channel effects of submicron MOSFETs (1996) (1)
A novel vertical SCR for ESD protection in 40 V HV bipolar process (2017) (0)
Design of A Novel Low Voltage Triggered Silicon Controlled Rectifier (SCR) for ESD Applications (2021) (0)
Challenges of electrostatic discharge (ESD) protection in emerging silicon nanowire technology (2011) (0)
Reliability of Poly-Si TFTs Under Voltage Pulse With Fast Transition Time (2021) (0)
[Keynote SpeechIV] Outlook and Challenges of Electrostatic Discharge (ESD) Protection of Modern and Future Integrated Circuits (2013) (0)
Chip Level Protection (2003) (0)
Physics-based bipolar transistor model for low-temperature circuit simulation (1989) (0)
EX-OFFICIO MEMBERS (Only includes Standing Committee Vice-Presidents, Technical Committee Chairs and Publication Editors-in-Chief, unless already listed above) (2009) (0)
On-Chip Structure for Electrostatic Discharge ( ESD ) Protection 4-10-2007 (2016) (0)
Study of graphene field-effect transistors under electrostatic discharge stresses (2013) (0)
Tutorial sessions: Electrostatic discharge protection of consumer electronics: Challenges and solutions (2017) (0)
Thin Gate Oxide Reliability Study Using Nano-Scaled Stress (2007) (0)
Calculation of the collector signal delay time of HBT's based on a piecewise-linear velocity profile (1993) (0)
Monitoring the AlGaAs/GaAs HBT Current Gain Long-Term Instability based on Noise and Leakage Current Characteristics (1995) (0)
Improving the Performance of AlGaN-Based Deep Ultraviolet Laser Diodes Using a Convex Waveguide Layer (2022) (0)
Charge storage in the quasineutral regions of Si homojunction, AlGaAs/GaAs heterojunction, and Si/SiGe heterojunction bipolar transistors (1992) (0)
Characterization of Low-Frequency Noise in Polycrystalline Silicon Thin-Film Transistors under Different Temperature (2021) (0)
Modeling high-level free carrier injection in advanced bipolar junction transistors (1995) (0)
Modern Phased Arrays and Their Hybrid Intelligent Processing (2014) (0)
An Overview of On-Chip ESD Protection in Modern Deep Sub-Micron CMOS Technology (2018) (0)
Parameter extraction of lightly-doped drain (LDD) MOSFETs (1998) (0)
Current transport in heterojunction bipolar transistors operating between 300 and 500 K (1995) (0)
Instability : Physical Mechanism and SPICE Simulation (1996) (0)
A numerical study of the effect of base and collector structures on the performance of {AlGaAs}/{GaAs} multi-finger HBTs (1995) (0)
Microwave Transistors - The Backbone of 5G and Beyond Communication Systems (2022) (0)
Optimization of Tunnel Field-Effect Transistor-Based ESD Protection Network (2021) (0)
Devices with Adjustable Dual-Polarity Trigger-and Holding-Voltage / Current for High Level of Electrostatic Discharge Protection in SubMicron Mixed Signal 7-28-2009 (2016) (0)
An upstream flux splitting method for hydrodynamic modeling of deep submicron devices (2000) (0)
Light-Illumination-Induced Degradation in Elevated-Metal Metal-Oxide Thin-Film Transistors without and with Fluorination (2021) (0)
Modeling the two-dimensional emitter-base and base-collector juction capacitances of bipolar junction transistors (1989) (0)
Analytical subthreshold current model of the dual-material tri-gate (DMTG) MOSFET and its application for subthreshold logic gate (2022) (0)
s, Frequency, and Area Dependencies of equency Noise in AlGaAs/GaAs HBT's (1996) (0)
Evolution and recent advances in RF/microwave transistors (2004) (0)
Numerical simulation of current–voltage characteristics of silicon photoconductive circuit elements (1993) (0)
Improved bipolar model equations for small-signal circuit simulation (1992) (0)
Comments on "A compact physical large-signal model for high-speed bipolar transistors at high current densities-part I: one-dimensional model" (by H.-M. Rein et al., with reply) (1988) (0)
Heterojunction Bipolar Transistors (1998) (0)
Effect of P-type Guard ring on the Turn-on Characteristics of Diode-triggered SCR (2019) (0)
A Compact Model for Reliability Simulation of Deep-Submicron MOS Devices and Circuits (2005) (0)
Thermal Analysis of ESD Diode in FDSOI Technology using COMSOL Multiphysics (2019) (0)
Reliability Issues of Thin Film Transistors Subject to Electrostatic Discharge Stresses: An Overview (Adv. Electron. Mater. 2/2022) (2022) (0)
SCR device for ESD protection in sub-micron triple well silicided CMOS processes (2004) (0)
WSL: ESD protection for RFIC's: Science or black magic? (2004) (0)
Novel ESD protection solution for single-ended mixer in GaAs pHEMT technology (2013) (0)
Electrostatic Discharge Protection Device for Digital Circuits and for Applications with Input/Output Bipolar Voltage Much Higher than the Core Circuit Power Supply (2019) (0)
Novel electrostatic discharge (ESD) protection solution in GaAs pHEMT technology (2012) (0)
Electrostatic discharge robustness on organic ring oscillator. (2013) (0)
Electrostatic discharge (ESD): A spoiler to development of next-generation technologies? (2010) (0)
A new methodology for human metal model characterization (2015) (0)
Overview of Nanometer CMOS Technology (2010) (0)
Response to “Comment on ‘A study of base built-in field effects on the steady-state current gain of heterojunction bipolar transistors’” (1991) (0)
On the application of a neural network in the design of cascaded gratings (1995) (0)
A comparisson of four parameter extraction methods for MOSFETs (2011) (0)
2×VDD-tolerant ESD detection circuit in a 90-nm low-voltage CMOS process (2018) (0)
All manuscripts, correspondence and communication should be directed to IEEE/EDS Publications Office (2010) (0)
Electrostatic Discharge (ESD) Protection Challenges of Gate-All-Around Nanowire Field-Effect Transistors (2011) (0)
MOSFET simulation using device Simulators (1998) (0)
A reliability-boosted ferroelectric random access memory with random-dynamic reference cells (2014) (0)
Numerical analysis of dc and transient characteristics on n+-i-n+ optically activated switches (1995) (0)
Electrostatic Discharge Protection Device for Digital Circuits and for Applications with Input / Output Bipolar Voltage Much Higher than the Core Circuit Power Supply 10-23-2007 (2016) (0)
Simple model for the saturation voltage and current of submicron MOSFETs (1992) (0)
A low power trimming-free CMOS relaxation oscillator with process and temperature compensation (2020) (0)
Combined effects of graded and setback layers on the HBT current-voltage characteristics (1995) (0)
Diode and RC Co-Triggered 2 × VDD-Tolerant Electrostatic Discharge Detection Circuit in Nanoscale Complementary Metal-Oxide-Semiconductor Technology (2019) (0)
Investigation and Suppression of Holding Voltage Deterioration in Multifinger SCR for Robust High-Voltage ESD Engineering (2021) (0)
On-Chip Structure for Electrostatic Discharge (ESD) Protection [DIV] (2016) (0)
Low Frequency Noise of the Tunneling Contact Thin-Film Transistors (2021) (0)
Bipolar Junction Transistors (1998) (0)
Enhanced performance in deep-ultraviolet laser diodes with an undoped BGaN electron blocking layer. (2022) (0)
Deep-ultraviolet Laser Diode Characterization Improvement by Inverted Trapezoidal Hole Blocking Layer (2023) (0)
Correlation between electrostatic approach and electrochemical approach for modeling band discontinuities (1991) (0)
An Improved LVTSCR Device with an Embedded BJT for ESD Protection (2021) (0)
Tribological properties of picosecond laser-textured titanium alloys under different lubrication conditions (2022) (0)
Statically triggered 3×VDD-Tolerant ESD detection circuit in a 90-nm low-voltage CMOS process (2018) (0)
Base transit time of submicron bipolar transistors including nonuniform base doping profile and high current effects (1994) (0)
A study of the current transport in AlGaAs/GaAs HBTs with graded and setback layers (1994) (0)
On-Chip Protection Solution for Radio Frequency Integrated Circuits in Standard CMOS Process (2015) (0)
A study of the collector-emitter offset voltage of InAlAs/InGaAs and AlGaAs/GaAs heterojunction bipolar transistors (1990) (0)
A novel and powerful TCAD methodology to evaluate performance of ESD protection devices (2007) (0)
A comprehensive and analytical drain current model for pocket-implanted NMOSFETs (2004) (0)
Novel drain-less multi-gate pHEMT for electrostatic discharge (ESD) protection in GaAs technology (2013) (0)
The Superior Responsivity Enhancement of Thin-Film Ge Photodetectors by AuNP Coatings (2020) (0)
On the Surface Recombination Current of HBTs. A Different Perspective (1994) (0)
TCAD Simulation Study of ESD Behavior of InGaAs/InP Heterojunction Tunnel FETs (2020) (0)
A semi-empirical model for the AlGaAs/GaAs HBT long- term current instability (2000) (0)
Monte Carlo Study on Anomalous Carrier Diffusion in Inhomogeneous Semiconductors (2015) (0)
Hardware implementation of an adaptive resonance theory (ART) neural network using compensated operational amplifiers (1994) (0)
Key factors affecting trigger voltage of SCRS for ESD protection (2014) (0)
Testing in Semiconductor Devices and ICs (2001) (0)
An optimal latching waveform design for dynamic sense amplifiers (1990) (0)
Advanced ESD Protection Solutions in CMOS/BiCMOS Technologies (2007) (0)
Compact Modeling of Four-Terminal Junction Field-Effect Transistors (2005) (0)
AlGaN-Based Deep-Ultraviolet Laser Diodes with Novel Superlattice Electron-Blocking Layers (2022) (0)
Characterization of Nanowire Devices Under Electrostatic Discharge Stress Conditions (2014) (0)
Optically driven photoconductive devices for power switching application. II. Thermal modelling including heat sink (1992) (0)
A Robust Dual Directional SCR without Current Saturation Effect for ESD Applications (2019) (0)
Design of SiGe SCR Devices for Radio Frequency Integrated Circuits in SiGe BiCMOS Process (2015) (0)
High-speed and low-power FRAM with a bitline-segmental array (2014) (0)
On the extraction methods for MOSFET series resistance and mobility degradation using a single test device (2017) (0)
Coupling Matrix Synthesis for the Cascaded Filters (2019) (0)
Avalanche multiplication in forward- and reverse-active mode bipolar junction transistors (1993) (0)
Performance optimization of deep ultraviolet laser diodes with superlattice hole blocking layer (2023) (0)
Analyse ofProtection Devices' Speed Performance against ESDunderCDM Using TCAD (2007) (0)
Four terminal junction field-effect transistor model for computer-aided design (2007) (0)
The Effects of Space-Charge-Layer Thickness Modulation on Diffusion Capacitance (1994) (0)
Optimization of thickness in hole blocking layer of AlGaN-based deep ultraviolet laser diodes (2023) (0)
Characteristics of Tunnel Field-effect Transistors under Power-on Electrostatic Discharge and Electrical Overstress Conditions (2020) (0)
THE THRESHOLD VOLTAGE FROM THE SUBTHRESHOLD TO STRONG INVERSION TRANSITION REGION OF MOSFET S (1999) (0)
Optimization and Characterization of RF Sputtered a-InSnZnO Thin-Film Transistors Fabricated at Low Temperature (2021) (0)
Effects of band-gap narrowing on common-emitter current gain of GaAs homojunction bipolar transistors (1989) (0)
Electro-thermal stress effect on InGaP/GaAs heterojunction bipolar low-noise amplifier performance (2010) (0)
On-Chip Radio Frequency ESD Protection Solution in GaAs pHEMT Process (2015) (0)
Performance enhancement of AlGaN deep-ultraviolet laser diodes with linear variation quantum barriers (2023) (0)
Evolution , Current Status and Future Trend of RF Transistors (2002) (0)
Study of AlGaN-based deep ultraviolet laser diodes using one-way step-shaped quantum barriers and symmetrical step-shaped electron and hole blocking layers (2022) (0)
Improvement of Optoelectronic Characteristics of Deep-ultraviolet Laser Diode with an Optimal Thickness of Electron Blocking Layer and Waveguide Layer (2023) (0)
Statistical sensitivity simulation for integrating design and testing of MOSFET integrated circuits (1991) (0)
A non-quasi-static small-signal model for metal-semiconductor junction diodes (1990) (0)
Basics in ESD Protection of Radio Frequency Integrated Circuits (2015) (0)
Compact modeling for drain current of short-channel MOSFETs including source/drain resistance effect (2004) (0)
Effect of Source/ Drain Electrode Fabrication Technology on the Electrical Properties of Solution-processed A-IGZO Based Transistors (2021) (0)
HIGH-LEVEL FREE-CARIZIER JBJECTION IN ADVANCE BIPOLAR JUNCTION TRANSISTORS (J"JXD). (1995) (0)
The thermal-avalanche interacting behavior of AlGaAs/GaAs HBTs (1994) (0)
Modeling the avalanche multiplication current of AlGaAs/GaAs heterojunction bipolar transistors (1993) (0)
A Special Section on: Next-Generation Electronics and Optoelectronics (2019) (0)
Introduction to Electrostatic Discharge Protection (2017) (0)
Performance improvement in AlGaN-based ultraviolet light diodes with superlattice hole reservoir layer (2023) (0)
Improvement of the optoelectronic characteristics in deep-ultraviolet laser diodes with tapered p-cladding layer and triangular electron blocking layer (2022) (0)
Dynamic Tunable Absorber Based on VO2 Pyramid Array Structure Working in Infrared Band (2021) (0)
Comparación de cuatro métodos de extracción de parámetros para transitares MOSFET (2011) (0)
CMOS technology-based spiral inductors for RF applications (2006) (0)
Miscorrelation Between Air Gap Discharge and Human Metal Model Stresses Due to Multi-Finger Turn-On Effect (2014) (0)
A Modified LDMOS-SCR with High Holding Voltage for high voltage ESD Protection (2019) (0)
On the Issues of Subnanometer EOT Gate Dielectric Scaling (2019) (0)
Failure analysis of long-distance power supply for a DC-DC converter micro-module (2016) (0)
Methods for extracting the effective channel length of MOSFETs (1998) (0)
Semiconductor device physics and modelling. 2. Overview of models and their applications (1992) (0)
MOSFETs for RF Applications (2010) (0)
Vertical bipolar junction transistor triggered silicon‐controlled rectifier for nanoscale ESD engineering (2020) (0)
Effect of RF Sputtering Power Density and Post Thermal Annealing Temperature on the Performance of Aluminium-Doped Zinc Oxide Thin-Film Transistor (2021) (0)
Characterization and failure analysis of Sub-10 nm diameter, gate-all-around nanowire field-effect transistors subject to electrostatic discharge (ESD) (2011) (0)
Enhancing the Holding Voltage by a Modified LVTSCR Structure for ESD Protection (2022) (0)
Correlation between Electrochemical approach for Modeling Band Discontinuities (1991) (0)
A low power trimming-free relaxation oscillator with process and temperature compensation (2019) (0)
Modeling the steady-state collector current of AlGaAs/GaAs heterojunction bipolar transistors using a generalized drift-diffusion. Equation (1990) (0)
Validation of bulk-charge effect parameter extraction in MOSFETs (2000) (0)
Physics and Models of an ESD Event (2003) (0)
Discharge(ESD) Protection Applications (2006) (0)
A LVTSCR-Based Compact Structure for Latch-up Immune (2021) (0)
Charge Storage In The Quasi-Neutral Regions Of Si Homojunction, Algaas/Gaas Heterojunction, And Si/Sige Heterojunction Bipolar-Transistors (2020) (0)
Growth of Tellurium Nanobelts on h-BN for p-type Transistors with Ultrahigh Hole Mobility (2022) (0)

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What Schools Are Affiliated With Juin‐jei Liou?

Juin‐jei Liou is affiliated with the following schools:

University of Central Florida
Zhengzhou University
Shenzhen University