Kevin Skadron
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American computer scientist
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Why Is Kevin Skadron Influential?
(Suggest an Edit or Addition)According to Wikipedia, Kevin Skadron is an American computer scientist, the Harry Douglas Forsyth Professor of Computer Science. He served as department chair and served as Director of the SRC JUMP Center for Research on Intelligent Storage and Processing in Memory , and the Center for Automata Processing , at the University of Virginia, Charlottesville, Virginia. His research focuses on computer processor design under physical constraints such as temperature, power, and reliability. He and his colleagues have contributed numerous tools now widely used in the research community, including the HotSpot family of tools and the Rodinia Benchmark Suite. Skadron also helped co-found IEEE Computer Architecture Letters and served as editor-in-chief from 2010 to 2012.
Kevin Skadron's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- Rodinia: A benchmark suite for heterogeneous computing (2009) (2598)
- Scalable parallel programming with CUDA (2008) (2246)
- Temperature-aware microarchitecture (2003) (1281)
- HotSpot: a compact thermal modeling methodology for early-stage VLSI design (2006) (962)
- Temperature-aware microarchitecture: Modeling and implementation (2004) (773)
- A performance study of general-purpose applications on graphics processors using CUDA (2008) (700)
- Bubble-up: Increasing utilization in modern warehouse scale computers via sensible co-locations (2011) (582)
- Control-theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management (2002) (423)
- Accelerating Compute-Intensive Applications with GPUs and FPGAs (2008) (360)
- Compact thermal modeling for temperature-aware design (2004) (347)
- HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects (2003) (305)
- Dynamic Voltage Scaling in Multitier Web Servers with End-to-End Delay Control (2007) (304)
- A characterization of the Rodinia benchmark suite with comparison to contemporary CMP workloads (2010) (294)
- Accelerating SQL database operations on a GPU with CUDA (2010) (280)
- Energy-efficient mechanisms for managing thread context in throughput processors (2011) (264)
- Dynamic warp subdivision for integrated branch and memory divergence tolerance (2010) (256)
- Power-aware QoS management in Web servers (2003) (251)
- A Case for Thermal-Aware Floorplanning at the Microarchitectural Level (2005) (207)
- Recent thermal management techniques for microprocessors (2012) (198)
- Performance, energy, and thermal considerations for SMT and CMP architectures (2005) (178)
- CMP design space exploration subject to physical constraints (2006) (176)
- Pannotia: Understanding irregular GPGPU graph applications (2013) (171)
- Impact of Process Variations on Multicore Performance Symmetry (2007) (166)
- Performance modeling and automatic ghost zone optimization for iterative stencil loops on GPUs (2009) (148)
- Scalable parallel programming (2008) (147)
- Odd/Even bus invert with two-phase transfer for buses with coupling (2002) (143)
- Dymaxion: Optimizing memory access patterns for heterogeneous systems (2011) (130)
- Temperature-Aware Computer Systems: Opportunities and Challenges (2003) (128)
- Power issues related to branch prediction (2002) (127)
- Challenges in Computer Architecture Evaluation (2003) (124)
- Using performance counters for runtime temperature sensing in high-performance processors (2005) (123)
- Multi-mode energy management for multi-tier server clusters (2008) (122)
- Scaling with Design Constraints: Predicting the Future of Big Chips (2011) (120)
- Control-theoretic dynamic frequency and voltage scaling for multimedia workloads (2002) (118)
- Many-core design from a thermal perspective (2008) (114)
- Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques (1999) (112)
- HotSpot 6.0: Validation, Acceleration and Extension (2015) (108)
- Monitoring temperature in FPGA based SoCs (2005) (108)
- HotSpot: a dynamic compact thermal model at the processor-architecture level (2003) (108)
- Power-aware computing (2003) (107)
- Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model (2008) (103)
- Enabling Task Parallelism in the CUDA Scheduler (2009) (92)
- Predictive Temperature-Aware DVFS (2010) (88)
- Design issues and tradeoffs for write buffers (1997) (87)
- Fine-grained resource sharing for concurrent GPGPU kernels (2012) (86)
- Reducing multimedia decode power using feedback control (2003) (85)
- Accelerating leukocyte tracking using CUDA: A case study in leveraging manycore coprocessors (2009) (85)
- Improving prediction for procedure returns with return-address-stack repair mechanisms (1998) (84)
- Hybrid architectural dynamic thermal management (2004) (84)
- Differentiating the roles of IR measurement and simulation for power and temperature-aware design (2009) (84)
- A flexible simulation framework for graphics architectures (2004) (82)
- Temperature-Aware Microarchitecture: Extended Discussion and Results (2003) (79)
- A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors (2007) (79)
- State-preserving vs. non-state-preserving leakage control in caches (2004) (79)
- Interconnect lifetime prediction under dynamic stress for reliability-aware design (2004) (79)
- An Improved Block-Based Thermal Model in HotSpot 4.0 with Granularity Considerations (2007) (70)
- Merging path and gshare indexing in perceptron branch prediction (2005) (67)
- Association Rule Mining with the Micron Automata Processor (2015) (67)
- CLEAR: Cross-layer exploration for architecting resilience: Combining hardware and software techniques to tolerate soft errors in processor cores (2016) (66)
- Memory reference reuse latency: Accelerated warmup for sampled microarchitecture simulation (2003) (66)
- Real-world design and evaluation of compiler-managed GPU redundant multithreading (2014) (65)
- Load balancing in a changing world: dealing with heterogeneity and performance variability (2013) (65)
- Architecture implications of pads as a scarce resource (2014) (61)
- SPEC ACCEL: A Standard Application Suite for Measuring Hardware Accelerator Performance (2014) (60)
- Increasing memory miss tolerance for SIMD cores (2009) (59)
- The need for a full-chip and package thermal model for thermally optimized IC designs (2005) (58)
- Minimal subset evaluation: rapid warm-up for simulated hardware state (2001) (57)
- Power-aware branch prediction: characterization and design (2004) (57)
- Avoiding cache thrashing due to private data placement in last-level cache for manycore scaling (2009) (57)
- ANMLzoo: a benchmark suite for exploring bottlenecks in automata processing engines and architectures (2016) (56)
- Impact of Parameter Variations on Multi-Core Chips (2006) (55)
- Understanding the energy efficiency of simultaneous multithreading (2004) (54)
- Dynamic Heterogeneous Scheduling Decisions Using Historical Runtime Data (2011) (54)
- Binary Interval Search: a scalable algorithm for counting interval intersections (2012) (54)
- Multipath execution: opportunities and limits (1998) (54)
- Using On-Chip Event Counters For High-Resolution, Real-Time Temperature Measurement (2006) (51)
- Improved thermal management with reliability banking (2005) (51)
- A Performance Study for Iterative Stencil Loops on GPUs with Ghost Zone Optimizations (2011) (50)
- Analytical model for sensor placement on microprocessors (2005) (50)
- Brill tagging on the Micron Automata Processor (2015) (49)
- Federation: Repurposing scalar cores for out-of-order instruction issue (2008) (48)
- Interconnect Lifetime Prediction for Reliability-Aware Systems (2007) (48)
- Parameterized physical compact thermal modeling (2005) (47)
- Studying Thermal Management for Graphics-Processor Architectures (2005) (46)
- Predictive design space exploration using genetically programmed response surfaces (2008) (45)
- Parallelization of particle filter algorithms (2010) (44)
- Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads (2011) (44)
- Memory Reference Reuse Latency: Accelerated Sampled Microarchitecture Simulation (2002) (44)
- Potential thermal security risks (2005) (43)
- Applying decay strategies to branch predictors for leakage energy savings (2002) (43)
- Sequential pattern mining with the Micron automata processor (2016) (42)
- Speculative Updates of Local and Global Branch History: A Quantitative Analysis (2000) (41)
- Accelerating Braided B+ Tree Searches on a GPU with CUDA (2011) (40)
- Increasing Utilization in Modern Warehouse-Scale Computers Using Bubble-Up (2012) (39)
- A Hierarchical Thread Scheduler and Register File for Energy-Efficient Throughput Processors (2012) (39)
- Optimal procrastinating voltage scheduling for hard real-time systems (2005) (38)
- Implications of the Power Wall: Dim Cores and Reconfigurable Logic (2013) (38)
- Interaction of scaling trends in processor architecture and cooling (2010) (38)
- HotSpot : Techniques for Modeling Thermal Effects at the Processor-Architecture Level (2002) (37)
- Managing leakage for transient data: decay and quasi-static 4T memory cells (2002) (36)
- An overview of micron's automata processor (2016) (35)
- Adaptive Cache Decay using Formal Feedback Control (2002) (34)
- ArchFP: Rapid prototyping of pre-RTL floorplans (2012) (33)
- REAPR: Reconfigurable engine for automata processing (2017) (32)
- Dark vs. Dim Silicon and Near-Threshold Computing (2013) (31)
- Experiences Accelerating MATLAB Systems Biology Applications (2009) (30)
- A taxonomy of branch mispredictions, and alloyed prediction as a robust solution to wrong-history mispredictions (2000) (30)
- Proceedings 29th Annual International Symposium on Computer Architecture (2002) (28)
- Exploring the thermal impact on manycore processor performance (2010) (27)
- Procrastinating voltage scheduling with discrete frequency sets (2006) (27)
- Exploiting inter-thread temporal locality for chip multithreading (2010) (27)
- The resilience wall: Cross-layer solution strategies (2014) (27)
- Nondeterministic Finite Automata in Hardware-the Case of the Levenshtein Automaton (2015) (26)
- Accelerated warmup for sampled microarchitecture simulation (2005) (26)
- The visual vulnerability spectrum: characterizing architectural vulnerability for graphics hardware (2006) (25)
- Temperature-to-power mapping (2010) (25)
- Entity resolution acceleration using the automata processor (2016) (25)
- BenchFriend: Correlating the performance of GPU benchmarks (2014) (25)
- The Sharing Tracker: Using Ideas from Cache Coherence Hardware to Reduce Off-Chip Memory Traffic with Non-Coherent Caches (2010) (24)
- Impala: Algorithm/Architecture Co-Design for In-Memory Multi-Stride Pattern Matching (2020) (24)
- A Scalable Solution for Rule-Based Part-of-Speech Tagging on Novel Hardware Accelerators (2018) (23)
- Searching for Potential gRNA Off-Target Sites for CRISPR/Cas9 Using Automata Processing Across Different Platforms (2018) (23)
- Evaluating Overheads of Multibit Soft-Error Protection in the Processor Core (2013) (22)
- RAPID Programming of Pattern-Recognition Processors (2016) (22)
- Some Limits of Power Delivery in the Multicore Era (2012) (22)
- Robust SIMD: Dynamically Adapted SIMD Width and Multi-Threading Depth (2012) (21)
- Enhancing Energy Efficiency in Multi-tier Web Server Clusters via Prioritization (2007) (21)
- eAP: A Scalable and Efficient In-Memory Accelerator for Automata Processing (2019) (21)
- MNCaRT: An Open-Source, Multi-Architecture Automata-Processing Research and Execution Ecosystem (2018) (20)
- Low-overhead Software Dynamic Translation (2001) (20)
- Characterizing and Mitigating Output Reporting Bottlenecks in Spatial Automata Processing Architectures (2018) (20)
- Frequent subtree mining on the automata processor: challenges and opportunities (2017) (19)
- Feasibility of Dynamic Binary Parallelization (2011) (19)
- A Novel Software Solution for Localized Thermal Problems (2006) (18)
- AutomataZoo: A Modern Automata Processing Benchmark Suite (2018) (18)
- Fulcrum: A Simplified Control and Access Mechanism Toward Flexible and Practical In-Situ Accelerators (2020) (17)
- Regular expression acceleration on the micron automata processor: Brill tagging as a case study (2015) (17)
- Implementing branch-predictor decay using quasi-static memory cells (2004) (17)
- FlexAmata: A Universal and Efficient Adaption of Applications to Spatial Automata Processing Accelerators (2020) (16)
- An ahead pipelined alloyed perceptron with single cycle access time (2004) (16)
- Grapefruit: An Open-Source, Full-Stack, and Customizable Automata Processing on FPGAs (2020) (16)
- Federation: Out-of-Order Execution using Simple In-Order Cores (2012) (16)
- Alloyed Branch History: Combining Global and Local Branch History for Robust Performance (2003) (16)
- Cost-effective safety and fault localization using distributed temporal redundancy (2011) (15)
- The effects of context switching on branch predictor performance (2001) (15)
- ASPEN: A Scalable In-SRAM Architecture for Pushdown Automata (2018) (15)
- Selecting a Single, Representative Sample for Accurate Simulation of SPECint Benchmarks (1999) (15)
- Generating efficient and high-quality pseudo-random behavior on Automata Processors (2016) (14)
- Federation: Boosting per-thread performance of throughput-oriented manycore architectures (2010) (14)
- Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience) (2017) (14)
- Characterizing and removing branch mispredictions (1999) (14)
- A computer-architecture approach to thermal management in computer systems: opportunities and challenges (2004) (14)
- Near-Memory Data Services (2016) (14)
- On-Demand Solution to Minimize I-Cache Leakage Energy with Maintaining Performance (2008) (14)
- Architecture-Level Compact Thermal R-C Modeling (2002) (13)
- Power and thermal effects of SRAM vs. latch-mux design styles and clock gating choices (2005) (13)
- HydraScalar: A Multipath-Capable Simulator (2001) (12)
- Caches As Filters: A Unifying Model for Memory Hierarchy Analysis (2000) (12)
- Microarchitectural Floorplanning for Thermal Management: A Technical Report (2005) (12)
- Experiences with Achieving Portability across Heterogeneous Architectures (2011) (12)
- Banking Chip Lifetime: Opportunities and Implementation (2005) (12)
- Walking pads: Managing C4 placement for transient voltage noise minimization (2014) (12)
- GraphTinker: A High Performance Data Structure for Dynamic Graph Processing (2019) (12)
- Sieve: Scalable In-situ DRAM-based Accelerator Designs for Massively Parallel k-mer Matching (2021) (11)
- Debugging Support for Pattern-Matching Languages and Accelerators (2019) (11)
- Transient voltage noise in charge-recycled power delivery networks for many-layer 3D-IC (2015) (11)
- Many Core Design from a Thermal Perspective: Extended Analysis and Results (2008) (11)
- Profile-based adaptation for cache decay (2004) (11)
- Automata-to-Routing: An Open-Source Toolchain for Design-Space Exploration of Spatial Automata Processing Architectures (2017) (11)
- A Break-Even Formulation for Evaluating Branch Predictor Energy Efcienc y (2005) (11)
- Impact of thermal constraints on multi-core architectures (2006) (11)
- Toward an Architectural Treatment of Parameter Variations (2005) (11)
- A Scalable and Efficient In-Memory Interconnect Architecture for Automata Processing (2019) (10)
- A cross-layer design exploration of charge-recycled power-delivery in many-layer 3D-IC (2015) (10)
- Applications of Small-Scale Reconfigurability to Graphics Processors (2006) (10)
- Revisiting the Perceptron Predictor Again (2004) (9)
- Walking pads: Fast power-supply pad-placement optimization (2014) (9)
- Evaluating the Thermal Efficiency of SMT and CMP Architectures (2004) (9)
- Inexpensive throughput enhancement in small-scale embedded microprocessors with block multithreading: extensions, characterization, and tradeoffs (2001) (9)
- Fine-grained graphics architectural simulation with Qsilver (2005) (8)
- Techniques for Accurate, Accelerated Processor Simulation: Analysis of Reduced Inputs and Sampling (2002) (8)
- Very Low Voltage (VLV) Design (2017) (8)
- Resilience and Real-Time Constrained Energy Optimization in Embedded Processor Systems (2014) (8)
- Reducing the cost of redundant execution in safety-critical systems using relaxed dedication (2011) (8)
- Control-theoretic dynamic frequency and voltage scaling (2002) (8)
- Thermal modeling and management of microprocessors (2009) (8)
- A reconfigurable simulator for large-scale heterogeneous multicore architectures (2011) (8)
- Hot Leakage: An Architectural, Temperature-Aware Model of Subthreshold and Gate Leakage (2012) (8)
- Evaluating trace cache energy efficiency (2006) (8)
- Acceleration of Frequent Itemset Mining on FPGA using SDAccel and Vivado HLS (2017) (8)
- Temperature-Aware Modeling and Banking of IC Lifetime Reliability (2005) (8)
- Hopscotch: a micro-benchmark suite for memory performance evaluation (2019) (7)
- ROCKY: A Robust Hybrid On-Chip Memory Kit for the Processors With STT-MRAM Cache Technology (2021) (7)
- Tolerating the Consequences of Multiple EM-Induced C4 Bump Failures (2016) (7)
- Yield-aware Performance-Cost Characterization for Multi-Core SIMT (2015) (7)
- Power-efficient embedded processing with resilience and real-time constraints (2015) (7)
- Architectural implications of spatial thermal filtering (2013) (7)
- Alloyed Global and Local Branch History : A Robust Solution to Wrong-History Mispredictions (1999) (7)
- The importance of computer architecture in microprocessor thermal design (2004) (7)
- Analysis of Temporal and Spatial Temperature Gradients for IC Reliability (2012) (7)
- Towards on-node Machine Learning for Ultra-low-power Sensors Using Asynchronous Σ Δ Streams (2020) (6)
- Using Branch Prediction Information for Near-Optimal I-Cache Leakage (2006) (6)
- Physically-Based Compact Thermal Modeling — Achieving Parametrization and Boundary Condition Independence (2004) (6)
- Revisiting the Perception Predictor Again (2004) (6)
- Sunder: Enabling Low-Overhead and Scalable Near-Data Pattern Matching Acceleration (2021) (6)
- A 16-Bit Reconfigurable Encryption Processor for p-Cipher (2016) (6)
- Hierarchical Pattern Mining with the Automata Processor (2018) (6)
- Design and Implementation of an Energy Efficient Multimedia Playback System (2006) (5)
- Portable Programming with RAPID (2019) (5)
- BLP: Applying ILP Techniques to Bytecode Execution (2000) (5)
- Dymaxion++: A Directive-Based API to Optimize Data Layout and Memory Mapping for Heterogeneous Systems (2014) (5)
- Trellis: Portability across architectures with a high-level framework (2013) (5)
- Cross-Layer Resilience: Challenges, Insights, and the Road Ahead (2019) (5)
- Pre-RTL Voltage and Power Optimization for Low-Cost, Thermally Challenged Multicore Chips (2017) (5)
- MNRL and MNCaRT An Open-Source , Multi-Architecture State Machine Research and Execution Ecosystem Technical Report TR # CS-2017-01 (2017) (5)
- Implementing Decay Techniques using 4T Quasi-Static Memory Cells (2002) (5)
- Measuring Parameter Variation on an FPGA Using Ring Oscillators (2012) (5)
- Low-Power Design and Temperature Management (2007) (5)
- Leveraging Memory Level Parallelism Using Dynamic Warp Subdivision (2009) (5)
- A general post-processing approach to leakage current reduction in SRAM-based FPGAs (2004) (4)
- Reducing Power and Area by Interconnecting Memory Controllers to Memory Ranks with RF Coplanar Waveguides on the Same Package (2011) (4)
- Characterization of transient error tolerance for a class of mobile embedded applications (2014) (4)
- Feature extraction and image retrieval on an automata structure (2016) (4)
- Temperature-aware GPU design (2004) (4)
- Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques (2006) (4)
- Accelerating Weeder: A DNA Motif Search Tool Using the Micron Automata Processor and FPGA (2017) (4)
- Reco-Pi: A reconfigurable Cryptoprocessor for π-Cipher (2017) (4)
- CLEAR: Cross-Layer Exploration for Architecting Resilience (2017) (4)
- Interconnect Lifetime Prediction with Temporal and Spatial Temperature Gradients for Reliability-Aware Design and Runtime Management: Modeling and Applications (2006) (4)
- Granularity of Microprocessor Thermal Management: A Technical Report (2012) (4)
- dMT: inexpensive throughput enhancement in small-scale embedded microprocessors with differential multithreading (2004) (4)
- Agile-AES: Implementation of configurable AES primitive with agile design approach (2022) (4)
- Enabling In-SRAM Pattern Processing With Low-Overhead Reporting Architecture (2020) (4)
- Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights (2017) (4)
- Alloying Global and Local Branch History: Taxonomy, Performance, and Analysis (1999) (4)
- Thermal benefit of multi-core floorplanning: A limits study (2011) (3)
- Lumos+: Rapid, pre-RTL design space exploration on accelerator-rich heterogeneous architectures with reconfigurable logic (2016) (3)
- A Scheme for Selective Squash and Re-issue for Single-Sided Branch Hammocks (2001) (3)
- PiMulator: a Fast and Flexible Processing-in-Memory Emulation Platform (2022) (3)
- Workshop on Advancing Computer Architecture Research ( ACAR-1 ) Failure is not an Option : Popular Parallel Programming (2010) (3)
- An Improved Hotspot Block-based Thermal Model with Granularity Considerations (Extended Discussion) (2012) (3)
- Optimal Procrastinating Voltage for Hard Real-Time Systems (2005) (3)
- Classifying images in a histopathological dataset using the cumulative distribution transform on an automata architecture (2017) (3)
- Hopscotch (2019) (3)
- A meta-algorithm for classification by feature nomination (2014) (3)
- Automata Processing in Reconfigurable Architectures (2019) (3)
- Image classification by multi-kernel dictionary learning (2014) (3)
- Hardware overhead analysis of programmability in ARX crypto processing (2015) (2)
- Exploring the Impact of Normality and Significance Tests in Architecture Experiments (2006) (2)
- Supporting Higher-Order Controllers for Magnetic Bearings in a High-Speed , Real-Time Platform Using General-Purpose Computers (2)
- Thermal Modeling for Processors and Systems-on-Chip (2010) (2)
- PPE-ARX: Area- and power-efficient VLIW programmable processing element for IoT crypto-systems (2017) (2)
- Uses for Random and Stochastic Input on Micron’s Automata Processor (2016) (2)
- A microprocessor survey course: exploring advanced computer architecture in practice (2000) (2)
- Thermal Simulation of Processing-in-Memory Devices using HotSpot 7.0 (2021) (2)
- Ultra Efficient Acceleration for De Novo Genome Assembly via Near-Memory Computing (2021) (2)
- Runtime Verification on FPGAs with LTLf Specifications (2020) (2)
- Hierarchical Domain Partitioning For Hierarchical Architectures (2008) (2)
- MTTF Enhancement Power-C4 Bump Placement Optimization (2019) (2)
- Quantifying Latency and Throughput Compromises in CMP Design (2012) (2)
- Programming with Relaxed Streams (2012) (2)
- Diierential Multithreading: Recapturing Pipeline Stall Cycles and Enhancing Throughput in Small-scale Embedded Microprocessors (2000) (2)
- Characterizing Thermal Behavior of Pentium-IV with Hyperthreading A Thesis (2004) (2)
- A microprocessor survey course for learning advanced computer architecture (2002) (1)
- Rapid Prototyping of CMP Floorplans: A Technical Report (2012) (1)
- TSpec: A Notation for Describing Memory Reference Traces (2000) (1)
- Recent Thermal Management Techniques for (2010) (1)
- Flexibility and Circuit Overheads in Reconfigurable SIMD/MIMD Systems (2013) (1)
- The Use of Mini-Vector Instructions for Implementing High-Speed Feedback Controllers on General-Purpose Computers (2001) (1)
- Highly Parallel Implementation of NeuroJet using Graphics Processing Units (2010) (1)
- Gearbox: a case for supporting accumulation dispatching and hybrid partitioning in PIM-based accelerators (2022) (1)
- Security Engineering Project (2015) (1)
- NOSTalgy: Near-Optimum Run-Time STT-MRAM Quality-Energy Knob Management for Approximate Computing Applications (2021) (1)
- Genetically Programmed Response Surfaces for Efficient Design Space Exploration (2007) (1)
- Editorial: Letter from the Editor-in-Chief (2010) (1)
- Low-Overhead Software Dynamic Translation Technical Report CS-2001-18 (2001) (1)
- Edge Crypt-Pi: Securing Internet of Things with Light and Fast Crypto-Processor (2020) (1)
- Dual-Data Rate Transpose-Memory Architecture Improves the Performance, Power and Area of Signal-Processing Systems (2017) (1)
- Potential of Dynamic Binary Parallelization (2012) (1)
- An Approach on Hardware Design for Computational Photography Applications Based on Light Field Refocusing Algorithm (2012) (1)
- Physically constrained architecture for chip multiprocessors (2006) (1)
- eAP (2019) (1)
- Breaking the memory wall for highly multi-threaded cores (2010) (1)
- Energy management in real-time multi-tier internet services (2008) (1)
- Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture (2001) (1)
- Speculative Code Compaction: Eliminating Dead Code via Speculative Microcode Transformations (2022) (1)
- Staff Listing (2012) (1)
- TMR : A Solution for Hardware Security Designs (2015) (1)
- DRAM-CAM: General-Purpose Bit-Serial Exact Pattern Matching (2022) (1)
- Closing the power delivery/heat removal cycle for heterogeneous multi-scale systems (2016) (1)
- BASIC FUNCTIONS AND OPERATIONAL UNITS (2012) (1)
- Experiences Using Fpgas for Temperature-aware Microarchitecture Research (1)
- Profile-Based Adaptation for Cache Decay: A Technical Report (2012) (1)
- Power Issues Related to Branch Prediction — University Of Virginia Tech . Report CS-2001-25 — (2001) (1)
- Supporting Moderate Data Dependency, Position Dependency, and Divergence in PIM-Based Accelerators (2022) (1)
- Fractal: A Software Toolchain for Mapping Applications to Diverse, Heterogeneous Architectures (2012) (0)
- Evaluating the Energy Efficiency of Trace Caches (2012) (0)
- ACTS: A Near-Memory FPGA Graph Processing Framework (2023) (0)
- Exploiting Dynamically Changing Parallelism with a Reconfigurable Array of Homogeneous Sub-cores (2010) (0)
- FreezeTime: Towards System Emulation through Architectural Virtualization (2023) (0)
- Multi-Granularity Redundancy in Multi-Core SIMT (2012) (0)
- GraphTango: A Hybrid Representation Format for Efficient Streaming Graph Updates and Analysis (2022) (0)
- Security Engineering Project - System Aware Cyber Security for an Autonomous Surveillance System On Board an Unmanned Aerial Vehicle (2014) (0)
- Deterministic vs. Non Deterministic Finite Automata in Automata Processing (2022) (0)
- Fast Searching for Potential gRNA Off-Target Sites for CRISPR / Cas 9 using Automata Processing (2017) (0)
- Rodinia: A benchmark suite for heterogeneous computing — Source link (0)
- Introducing the New Editor-in-Chief of the IEEE Computer Architecture Letters (2013) (0)
- Scalable Manycore Computing with CUDA (2011) (0)
- Cross-Layer Resilience Exploration (2015) (0)
- Algorithms - Scheduling I On Scheduling Dags to Maximize Area (2009) (0)
- 2021 IEEE International Symposium on Workload Characterization (2021) (0)
- Area-Speed-Efficient Transpose-Memory Architecture for Signal-Processing Systems (2016) (0)
- BigMap: Future-proofing Fuzzers with Efficient Large Maps (2021) (0)
- Cellular Automata on the Micron Automata Processor (2015) (0)
- Dynamic Way Allocation for High Performance , Low Power Caches (2001) (0)
- Pulley: An Algorithm/Hardware Co-Optimization for In-Memory Sorting (2022) (0)
- (Invited) Cross-Layer Resilience: Challenges, Insights, and the Road Ahead (2019) (0)
- From 2.5D to 3D Chiplet Systems: Investigation of Thermal Implications with HotSpot 7.0 (2022) (0)
- Performance Evaluation of Regular Expression Matching Engines Across Different Computer Architectures (2016) (0)
- New Findings on Using Queue Occupancy to Integrate Runtime Power-Saving Techniques Across the Pipeline (2003) (0)
- The Importance of Temporal and Spatial Temperature Gradients in IC Reliability Analysis (2012) (0)
- Gearbox (2022) (0)
- Inexpensive Throughput Enhancement in Small-Scale Embedded Microprocessors with Differential Multithreading: Extended Results (2012) (0)
- Physical challenges in reliable graphics hardware design (2007) (0)
- Urban Centralization in U.S. Cities prior to World War II: Experience with a New Metric (2017) (0)
- Interconnect Lifetime Prediction for Temperature-Aware Design (2012) (0)
- Comparing Doom 3, Warcraft III, PBRT and MESA Using Micro-architecturally Independent Characteristics (2012) (0)
- Letter from the Editor (2009) (0)
- Synthesizing Legacy String Code for FPGAs Using Bounded Automata Learning (2022) (0)
- Understanding Energy Efficiency Multithreading Simultaneous (2004) (0)
- Experience with a New Metric (2007) (0)
- PRECISELY PREDICTING PERFORMANCE DEGRADATION DUE TO COLOCATING MULTIPLE EXECUTING APPLICATIONS ON A SINGLE MACHINE IS CRITICAL FOR IMPROVING UTILIZATION IN MODERN (2012) (0)
- The Role of Processor Architecture in Computer Science (0)
- A New Method for Measurement of Urban Decentralization (2007) (0)
- Small-scale reconfigurability for improved performance and double-precision in graphics hardware (2007) (0)
- Prefix Scan and Minimum Spanning Tree with OpenCL (2014) (0)
- Table of Contents Design, Automation and Test in Europe Conference and Exhibition DATE 2004 (2005) (0)
- Topic 7 - Parallel Computer Architecture and ILP (2005) (0)
- RAPID: Accelerating Pattern Search Applications with Reconfigurable Hardware (2016) (0)
- Efficient throughput cores for asymmetric manycore processors (2009) (0)
- ProxyVM: A Scalable and Retargetable Compiler Framework for Privacy-Aware Proxy Workload Generation (2022) (0)
- Potential for Branch Predictor Adaptation of the Program and Phase Level for Performance and Energy-Efficiency (2012) (0)
- Automata Processor Automata Designs ( Patterns ) Automata Processor Subset-Encoded Automata Designs ( Encoded Patterns ) Subset Encoding Application (2017) (0)
- 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), Seattle, Washington, USA, September 16-20, 2006 (2006) (0)
- Subset Encoding: Increasing Pattern Density for Finite Automata (2016) (0)
- Foreword (2006) (0)
- ArchFP: Rapid prototyping of pre-RTL floorplans (2012) (0)
- Dual-Data Rate Transpose-Memory Architecture Improves the Performance, Power and Area of Signal-Processing Systems (2016) (0)
- Evaluating Soft Error Protection Mechanisms in the Context of Multi-bit Errors at the Scope of a Processor (0)
- Path-Based Target Prediction for File System Prefetching (2012) (0)
- Designing energy-efficient fetch engines (2006) (0)
- Circuit Design and Configuration for Low Power FPGAs (2015) (0)
- A Discussion on the Thermal Benefit of Multicore Floorplanning at the Microarchitectural Level (2012) (0)
- Hierarchical Pattern Mining with the Automata Processor (2017) (0)
- Advances in GPU reliability research (2017) (0)
- Prototype for Meta-Algorithmic, Content-Aware Image Analysis (2015) (0)
- Teaching processor architecture with a VLSI perspective (2002) (0)
- Cross-Layer Modeling Framework for Energy-Efficient Resilience (2014) (0)
- Asynchronous Checkpointing for PVM Requires Message-Logging (2007) (0)
- Accelerating Genomic Analyses with Parallel Sliding Windows (2010) (0)
- Disjunctive rule mining with finite automaton hardware (2017) (0)
- An Approach on Hardware Design for Computationally Intensive Image Processing Applications based on Light Field Refocusing Algorithm (2010) (0)
- Automata Processor Accelerates Association Rule Mining (2014) (0)
- Bridging the Gap Between Theory and Hardware (2010) (0)
- FOR CLASSIFICATION BY FEATURE NOM (2014) (0)
- A Roadmap for Enabling a Future-Proof In-Network Computing Data Plane Ecosystem (2021) (0)
- Federation: RepurposingScalarCoresforOut-of-Order InstructionIssue (2008) (0)
- 1 Lightweight version of π-Cipher (2015) (0)
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