Mahmut Taylan Kandemir

Mahmut Taylan Kandemir's AcademicInfluence.com Rankings

Engineering

#3724

World Rank

#4840

Historical Rank

Applied Physics

#753

World Rank

#775

Historical Rank

Electrical Engineering

#863

World Rank

#934

Historical Rank

engineering Degrees

Download Badge

Engineering

Mahmut Taylan Kandemir's Degrees

PhD Electrical and Electronics Engineering Bilkent University
Masters Electrical and Electronics Engineering Bilkent University
Bachelors Electrical and Electronics Engineering Middle East Technical University

Why Is Mahmut Taylan Kandemir Influential?

(Suggest an Edit or Addition)

(See a Problem?)

Mahmut Taylan Kandemir's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Leakage Current: Moore's Law Meets Static Power (2003) (1259)
The design and use of simplePower: a cycle-accurate energy estimation tool (2000) (517)
Evaluating STT-RAM as an energy-efficient main memory alternative (2013) (447)
DRPM: dynamic speed control for power management in server class disks (2003) (419)
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory (2006) (415)
Energy-driven integrated hardware-software optimizations using SimplePower (2000) (341)
Reducing memory interference in multicore systems via application-aware memory channel partitioning (2011) (284)
OWL: cooperative thread array aware scheduling techniques for improving GPGPU performance (2013) (278)
Dynamic management of scratch-pad memory space (2001) (272)
Neither more nor less: Optimizing thread-level parallelism for GPGPUs (2013) (242)
Using complete machine simulation for software power estimation: the SoftWatt approach (2002) (234)
Fault tolerant algorithms for network-on-chip interconnect (2004) (230)
Influence of compiler optimizations on system power (2000) (219)
On the Detection of Clones in Sensor Networks Using Random Key Predistribution (2007) (203)
Orchestrated scheduling and prefetching for GPGPUs (2013) (193)
DRAM energy management using software and hardware directed power mode control (2001) (190)
Organizing the last line of defense before hitting the memory wall for CMPs (2004) (182)
Scheduling techniques for GPU architectures with processing-in-memory capabilities (2016) (166)
Studying energy trade offs in offloading computation/compilation in Java-enabled mobile devices (2004) (161)
Compiler-directed scratch pad memory hierarchy design and management (2002) (152)
Scheduler-based DRAM energy management (2002) (148)
Reducing leakage energy in FPGAs using region-constrained placement (2004) (142)
Soft error and energy consumption interactions: a data cache perspective (2004) (135)
ICR: in-cache replication for enhancing data cache reliability (2003) (134)
Managing GPU Concurrency in Heterogeneous Architectures (2014) (131)
Compilers and Operating Systems for Low Power (2012) (128)
Adaptive set pinning: managing shared caches in chip multiprocessors (2008) (127)
The Sleep Deprivation Attack in Sensor Networks: Analysis and Methods of Defense (2006) (125)
Improving Cache Locality by a Combination of Loop and Data Transformation (1999) (120)
Hardware and Software Techniques for Controlling DRAM Power Modes (2001) (119)
Revisiting widely held SSD expectations and rethinking system-level implications (2013) (114)
Improving locality using loop and data transformations in an integrated framework (1998) (113)
Reducing Disk Power Consumption in Servers with DRPM (2003) (106)
A Dual-VDD Low Power FPGA Architecture (2004) (105)
A case for Core-Assisted Bottleneck Acceleration in GPUs: Enabling flexible data compression with assist warps (2015) (105)
Energy optimization techniques in cluster interconnects (2003) (99)
Leakage energy management in cache hierarchies (2002) (98)
Thermal-aware task allocation and scheduling for embedded systems (2005) (97)
Energy-conscious compilation based on voltage scaling (2002) (95)
Application mapping for chip multiprocessors (2008) (94)
Reliability-aware Co-synthesis for Embedded Systems (2004) (89)
Compiler-directed instruction cache leakage optimization (2002) (89)
Exploiting shared scratch pad memory space in embedded multiprocessor systems (2002) (87)
Automatic data migration for reducing energy consumption in multi-bank memory systems (2002) (86)
Masking the Energy Behavior of DES Encryption (2003) (84)
METE: meeting end-to-end QoS in multicores through system-wide resource management (2011) (81)
Exploiting barriers to optimize power consumption of CMPs (2005) (80)
Physically addressed queueing (PAQ): Improving parallelism in solid state disks (2012) (80)
HIOS: A host interface I/O scheduler for Solid State Disks (2014) (79)
Increasing register file immunity to transient errors (2005) (78)
Reducing power with performance constraints for parallel sparse applications (2005) (78)
A compiler-based approach for dynamically managing scratch-pad memories in embedded systems (2004) (78)
Anatomy of GPU Memory System for Multi-Application Execution (2015) (77)
Soft errors issues in low-power caches (2005) (75)
Improving soft-error tolerance of FPGA configuration bits (2004) (74)
Exploiting VLIW schedule slacks for dynamic and leakage energy reduction (2001) (72)
An Evaluation of Different Page Allocation Strategies on High-Speed SSDs (2012) (71)
Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance (2015) (69)
Reliability-centric high-level synthesis (2005) (69)
CPM in CMPs: Coordinated Power Management in Chip-Multiprocessors (2010) (68)
Compiler-directed instruction duplication for soft error detection (2005) (68)
A novel migration-based NUCA design for Chip Multiprocessors (2008) (68)
Heap compression for memory-constrained Java environments (2003) (67)
Interplay of energy and performance for disk arrays running transaction processing workloads (2003) (67)
vEC: virtual energy counters (2001) (66)
Adaptive error protection for energy efficiency (2003) (64)
Software-directed disk power management for scientific applications (2005) (64)
SHARP control: Controlled shared cache management in chip multiprocessors (2009) (63)
Energy-oriented compiler optimizations for partitioned memory architectures (2000) (63)
A compiler algorithm for optimizing locality in loop nests (1997) (62)
Sprinkler: Maximizing resource utilization in many-chip solid state disks (2014) (59)
A crosstalk aware interconnect with variable cycle transmission (2004) (59)
Exploiting Core Criticality for Enhanced GPU Performance (2016) (58)
Application-aware Memory System for Fair and Efficient Execution of Concurrent GPGPU Applications (2014) (58)
An integer linear programming based approach for parallelizing applications in on-chip multiprocessors (2002) (57)
Synergistic TLBs for High Performance Address Translation in Chip Multiprocessors (2010) (57)
Tuning garbage collection in an embedded Java environment (2002) (55)
Designing a 3-D FPGA: Switch Box Architecture and Thermal Issues (2008) (55)
A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts (1999) (55)
MROrchestrator: A Fine-Grained Resource Orchestration Framework for MapReduce Clusters (2012) (54)
FlashShare: Punching Through Server Storage Stack from Kernel to Firmware for Ultra-Low Latency SSDs (2018) (53)
Compiler support for reducing leakage energy consumption (2003) (52)
Memory system optimization of embedded software (2003) (52)
Energy-aware data prefetching for multi-speed disks (2006) (52)
Incidental Computing on IoT Nonvolatile Processors (2017) (51)
CaSym: Cache Aware Symbolic Execution for Side Channel Detection and Mitigation (2019) (51)
Disk layout optimization for reducing energy consumption (2005) (51)
NANDFlashSim: Intrinsic latency variation aware NAND flash memory system modeling and simulation at microarchitecture level (2012) (50)
A matrix-based approach to the global locality optimization problem (1998) (50)
Spock: Exploiting Serverless Functions for SLO and Cost Aware Resource Procurement in Public Cloud (2019) (49)
Taking Garbage Collection Overheads Off the Critical Path in SSDs (2012) (48)
Compiler-directed scratch pad memory optimization for embedded multiprocessors (2004) (48)
Exploiting processor workload heterogeneity for reducing energy consumption in chip multiprocessors (2004) (47)
Instruction Scheduling for Low Power (2004) (47)
Compiler-guided leakage optimization for banked scratch-pad memories (2005) (47)
Exploiting Intra-Request Slack to Improve SSD Performance (2017) (47)
A compiler framework for extracting superword level parallelism (2012) (46)
Power protocol: reducing power dissipation on off-chip data buses (2002) (46)
Compiler-assisted soft error detection under performance and energy constraints in embedded systems (2009) (45)
A parallel architecture for secure FPGA symmetric encryption (2004) (45)
Influence of Loop Optimizations on Energy Consumption of Multi-bank Memory Systems (2002) (45)
MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy (2011) (45)
Adapting instruction level parallelism for optimizing leakage in VLIW architectures (2003) (44)
Total power optimization through simultaneously multiple-vDD multiple-vTH assignment and device sizing with stack forcing (2004) (44)
Reducing memory requirements of nested loops for embedded systems (2001) (44)
Data Movement Aware Computation Partitioning (2017) (44)
Dynamic Scratch-Pad Memory Management for Irregular Array Access Patterns (2006) (44)
Controlled Kernel Launch for Dynamic Parallelism in GPUs (2017) (44)
A hyperplane based approach for optimizing spatial locality in loop nests (1998) (43)
A global communication optimization technique based on data-flow analysis and linear algebra (1999) (43)
Shared scratch-pad memory space management (2006) (43)
PEPON: Performance-aware hierarchical power budgeting for NoC based multicores (2012) (42)
Exploiting program hotspots and code sequentiality for instruction cache leakage management (2003) (42)
Improving bank-level parallelism for irregular applications (2016) (42)
Generating physical addresses directly for saving instruction TLB energy (2002) (42)
Energy Behavior of Java Applications from the Memory Perspective (2001) (41)
Masking the energy behavior of DES encryption [smart cards] (2003) (41)
Compiler optimizations for low power systems (2002) (41)
Steep-Slope Devices: From Dark to Dim Silicon (2013) (41)
μC-States: Fine-grained GPU datapath power management (2016) (40)
A helper thread based EDP reduction scheme for adapting application execution in CMPs (2008) (40)
Process variation aware thread mapping for Chip Multiprocessors (2009) (40)
GemDroid: a framework to evaluate mobile platforms (2014) (39)
Provisioning a Multi-tiered Data Staging Area for Extreme-Scale Machines (2011) (39)
Race-To-Sleep + Content Caching + Display Caching: A Recipe for Energy-efficient Video Streaming on Handhelds (2017) (38)
Compiler-directed array interleaving for reducing energy in multi-bank memories (2002) (38)
Exploring the Potentials of Parallel Garbage Collection in SSDs for Enterprise Storage Systems (2016) (37)
Boosting Access Parallelism to PCM-Based Main Memory (2016) (37)
Addressing End-to-End Memory Access Latency in NoC-Based Multicores (2012) (37)
Phoenix: A Constraint-Aware Scheduler for Heterogeneous Datacenters (2017) (36)
Optimizing shared cache behavior of chip multiprocessors (2009) (36)
Compiler-directed thermal management for VLIW functional units (2006) (36)
Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework (2003) (36)
Minimizing Energy Consumption of Banked Memories Using Data Recomputation (2006) (36)
Domain knowledge based energy management in handhelds (2015) (36)
Power-aware partitioned cache architectures (2001) (36)
Discretionary Caching for I/O on Clusters (2003) (36)
Tuning garbage collection for reducing memory system energy in an embedded java environment (2002) (36)
Exploiting scratch-pad memory using Presburger formulas (2001) (35)
NVMMU: A Non-volatile Memory Management Unit for Heterogeneous GPU-SSD Architectures (2015) (35)
Nonuniform banking for reducing memory energy consumption (2005) (35)
Panacea: towards holistic optimization of MapReduce applications (2012) (35)
PEN: Design and Evaluation of Partial-Erase for 3D NAND-Based High Density SSDs (2018) (35)
Partitioned instruction cache architecture for energy efficiency (2003) (35)
Cache topology aware computation mapping for multicores (2010) (34)
Opportunistic Computing in GPU Architectures (2019) (34)
Changing Interaction of Compiler and Architecture (1997) (33)
Triple-A: a Non-SSD based autonomic all-flash array for high performance storage systems (2014) (33)
Banked scratch-pad memory management for reducing leakage energy consumption (2004) (33)
A compiler-directed data prefetching scheme for chip multiprocessors (2009) (33)
A case for integrated processor-cache partitioning in chip multiprocessors (2009) (33)
Analyzing the soft error resilience of linear solvers on multicore multiprocessors (2010) (32)
Dynamic partitioning of processing and memory resources in embedded MPSoC architectures (2006) (32)
A holistic approach to designing energy-efficient cluster interconnects (2005) (32)
Data management for large‐scale scientific computations in high performance distributed systems (1999) (32)
Reliability-centric hardware/software co-design (2005) (31)
Amber*: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources (2018) (31)
Design of a large-scale storage-class RRAM system (2013) (31)
Fifer: Tackling Resource Underutilization in the Serverless Era (2020) (30)
SimpleSSD: Modeling Solid State Drives for Holistic System Simulation (2017) (30)
VIP: Virtualizing IP chains on handheld platforms (2015) (30)
Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors (2007) (30)
Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems (2013) (29)
Meeting midway: Improving CMP performance with memory-side prefetching (2013) (29)
SOML Read: Rethinking the Read Operation Granularity of 3D NAND SSDs (2019) (29)
Data space-oriented tiling for enhancing locality (2005) (29)
Improving Offset Assignment for Embedded Processors (2000) (29)
Compiler-directed channel allocation for saving power in on-chip networks (2006) (29)
Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores (2012) (29)
Hardware-Software Co-design to Mitigate DRAM Refresh Overheads: A Case for Refresh-Aware Process Scheduling (2017) (28)
Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores (2011) (28)
Instruction scheduling based on energy and performance constraints (2000) (28)
A Unified Framework for Optimizing Locality, Parallelism, and Communication in Out-of-Core Computations (2000) (28)
Tuning in-sensor data filtering to reduce energy consumption in wireless sensor networks (2004) (28)
Reducing NoC energy consumption through compiler-directed channel voltage scaling (2006) (27)
Compilation Techniques for Out-of-Core Parallel Computations (1998) (27)
Volatile STT-RAM Scratchpad Design and Data Allocation for Low Energy (2014) (27)
A Layout-Conscious Iteration Space Transformation Technique (2001) (27)
Process-Variation-Aware Adaptive Cache Architecture and Management (2009) (27)
A compiler technique for improving whole-program locality (2001) (27)
An ILP formulation for reliability-oriented high-level synthesis (2005) (27)
Markov Model Based Disk Power Management for Data Intensive Workloads (2009) (27)
Memory Row Reuse Distance and its Role in Optimizing Application Performance (2015) (26)
EAC: a compiler framework for high-level energy estimation and optimization (2002) (26)
PennBench: a benchmark suite for embedded Java (2002) (26)
Compiler-directed high-level energy estimation and optimization (2005) (25)
Compiler algorithms for optimizing locality and parallelism on shared and distributed memory machines (1997) (25)
Parallelizing garbage collection with I/O to improve flash resource utilization (2018) (25)
Data access reorganizations in compiling out-of-core data parallel programs on distributed memory machines (1997) (25)
Enhancing Spatial Locality via Data Layout Optimizations (1998) (25)
Energy savings through compression in embedded Java environments (2002) (25)
Application-aware prefetch prioritization in on-chip networks (2012) (25)
Optimizing Data Layouts for Parallel Computation on Multicores (2011) (25)
An energy saving strategy based on adaptive loop parallelization (2002) (25)
Exploring the future of out-of-core computing with compute-local non-volatile memory (2013) (25)
Improving Java performance using dynamic method migration on FPGAs (2004) (24)
An integer linear programming based approach to simultaneous memory space partitioning and data allocation for chip multiprocessors (2006) (24)
Improving I/O Performance of Applications through Compiler-Directed Code Restructuring (2008) (24)
CHAMELEON: A Dynamically Reconfigurable Heterogeneous Memory System (2018) (24)
A compiler approach for reducing data cache energy (2003) (24)
Improving scratch-pad memory reliability through compiler-guided data block duplication (2005) (24)
Re-NUCA: A Practical NUCA Architecture for ReRAM Based Last-Level Caches (2016) (24)
Stochastic Modeling and Optimization of Stragglers (2018) (24)
Compiler-directed code restructuring for reducing data TLB energy (2004) (24)
Memory system energy: Influence of hardware-software optimizations (2000) (24)
Design and evaluation of smart disk architecture for DSS commercial workloads (2000) (23)
GCN meets GPU: Decoupling "When to Sample" from "How to Sample" (2020) (22)
Kube-Knots: Resource Harvesting through Dynamic Container Orchestration in GPU-based Datacenters (2019) (22)
Dynamic on-chip memory management for chip multiprocessors (2004) (22)
Kraken: Adaptive Container Provisioning for Deploying Dynamic DAGs in Serverless Platforms (2021) (22)
Locality-conscious workload assignment for array-based computations in MPSOC architectures (2005) (21)
Optimizing off-chip accesses in multicores (2015) (21)
Memory Systems and Compiler Support for MPSoC Architectures (2005) (21)
On-chip cache hierarchy-aware tile scheduling for multicore machines (2011) (21)
TraceTracker: Hardware/software co-evaluation for large-scale I/O workload reconstruction (2017) (21)
Intra-application cache partitioning (2010) (21)
Feedback control for providing QoS in NoC based multicores (2010) (21)
Multiple access caches: Energy implications (2000) (20)
Optimizing bus energy consumption of on-chip multiprocessors using frequent values (2004) (20)
Locality-aware process scheduling for embedded MPSoCs (2005) (20)
Selective code/data migration for reducing communication energy in embedded MpSoC architectures (2006) (20)
An ilp based approach to reducing energy consumption in nocbased CMPS (2007) (20)
Formulation and validation of an energy dissipation model for the clock generation circuitry and distribution networks (2001) (20)
Compiler-directed selective data protection against soft errors (2005) (20)
Studying inter-core data reuse in multicores (2011) (20)
Optimal topology exploration for application-specific 3D architectures (2006) (20)
Estimating influence of data layout optimizations on SDRAM energy consumption (2003) (20)
Improving memory energy using access pattern classification (2001) (19)
Dynamic compilation for energy adaptation (2002) (19)
Effect of compiler optimizations on memory energy (2000) (19)
Comparative evaluation of overlap strategies with study of I/O overlap in MPI-IO (2008) (19)
Compiler-directed selection of dynamic memory layouts (2001) (19)
Déjà View: Spatio-Temporal Compute Reuse for‘ Energy-Efficient 360° VR Video Streaming (2020) (19)
Improving the performance of out-of-core computations (1997) (19)
Courteous cache sharing: Being nice to others in capacity management (2012) (19)
Reducing energy consumption of parallel sparse matrix applications through integrated link/CPU voltage scaling (2007) (19)
APRIL: A Run-Time Library for Tape-Resident Data (2000) (19)
Configuration-sensitive process scheduling for FPGA-based computing platforms (2004) (19)
Customized on-chip memories for embedded chip multiprocessors (2005) (18)
Enhancing computation-to-core assignment with physical location information (2018) (18)
Solving the Register Allocation Problem for Embedded Systems Using a Hybrid Evolutionary Algorithm (2007) (18)
A Matrix-Based Approach to Global Locality Optimization (1999) (18)
Short-Circuiting Memory Traffic in Handheld Platforms (2014) (18)
A graph based framework to detect optimal memory layouts for improving data locality (1999) (18)
Compiler-directed voltage scaling on communication links for reducing power consumption (2005) (18)
Multi-level on-chip memory hierarchy design for embedded chip multiprocessors (2006) (18)
Studying storage-recomputation tradeoffs in memory-constrained embedded processing (2005) (18)
Towards energy efficient scaling of scientific codes (2008) (18)
Using dynamic branch behavior for power-efficient instruction fetch (2003) (18)
Array regrouping and its use in compiling data-intensive, embedded applications (2004) (17)
Understanding Energy Efficiency in IoT App Executions (2019) (17)
Exploring the Potential for Collaborative Data Compression and Hard-Error Tolerance in PCM Memories (2017) (17)
Optimizing inter-nest data locality (2002) (17)
A framework for interprocedural locality optimization using both loop and data layout transformations (1999) (17)
Optimizing address code generation for array-intensive DSP applications (2005) (17)
ILP-Based energy minimization techniques for banked memories (2008) (17)
Reducing instruction cache energy consumption using a compiler-based strategy (2004) (17)
An integer linear programming approach for optimizing cache locality (1999) (17)
Network footprint reduction through data access and computation placement in NoC-based manycores (2015) (17)
A hybrid NoC design for cache coherence optimization for chip multiprocessors (2012) (17)
An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization (2009) (17)
A data layout optimization framework for NUCA-based multicores (2011) (17)
Data compression for improving SPM behavior (2004) (17)
IOPin: Runtime Profiling of Parallel I/O in HPC Systems (2012) (17)
Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems (2005) (17)
Dynamic storage cache allocation in multi-server architectures (2009) (16)
Evaluating the Combined Impact of Node Architecture and Cloud Workload Characteristics on Network Traffic and Performance/Cost (2015) (16)
Compiler Support for Optimizing Memory Bank-Level Parallelism (2014) (16)
Data relation vectors: a new abstraction for data optimizations (2000) (16)
Reducing Data TLB Power via Compiler-Directed Address Generation (2007) (16)
Dynamic thread and data mapping for NoC based CMPs (2009) (16)
Use of local memory for efficient Java execution (2001) (16)
ZombieNAND: Resurrecting Dead NAND Flash for Improved SSD Longevity (2014) (16)
Compiler-directed application mapping for NoC based chip multiprocessors (2007) (16)
FD-HGAC: a hybrid heuristic/genetic algorithm hardware/software co-synthesis framework with fault detection (2005) (16)
Integrated link/CPU voltage scaling for reducing energy consumption of parallel sparse matrix applications (2006) (16)
Improving Offset Assignment on Embedded Processors Using Transformations (2000) (15)
Minimizing data and synchronization costs in one-way communication (1998) (15)
Locality-aware mapping and scheduling for multicores (2013) (15)
Enhancing Compiler Techniques for Memory Energy Optimizations (2002) (15)
Compiler-directed physical address generation for reducing dTLB power (2004) (15)
Process variation-aware routing in NoC based multicores (2011) (15)
Adaptive Garbage Collection for Battery-Operated Environments (2002) (14)
Improving Java virtual machine reliability for memory-constrained embedded systems (2005) (14)
Enhancing L2 organization for CMPs with a center cell (2006) (14)
Static and Dynamic Locality Optimizations Using Integer Linear Programming (2001) (14)
Using loop invariants to fight soft errors in data caches (2005) (14)
Profile-driven energy reduction in network-on-chips (2007) (14)
Cashing in on hints for better prefetching and caching in PVFS and MPI-IO (2010) (14)
Analyzing energy behavior of spatial access methods for memory-resident data (2001) (14)
Compiler-Directed Energy Optimization for Parallel Disk Based Systems (2007) (14)
An integer linear programming-based tool for wireless sensor networks (2005) (14)
Exploiting frequent field values in java objects for reducing heap memory requirements (2005) (14)
Analyzing data reuse for cache reconfiguration (2005) (13)
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms (2007) (13)
Reducing data cache leakage energy using a compiler-based approach (2005) (13)
Phase-aware adaptive hardware selection for power-efficient scientific computations (2007) (13)
Exploiting Inter-File Access Patterns Using Multi-Collective I/O (2002) (13)
An Evolutionary Path to Object Storage Access (2012) (13)
A novel application development environment for large-scale scientific computations (2000) (13)
Profiler and compiler assisted adaptive I/O prefetching for shared storage caches (2008) (13)
Exploring heterogeneous NoC design space (2011) (13)
Influence of array allocation mechanisms on memory system energy (2001) (13)
Efficient Function Evaluations with Lookup Tables for Structured Matrix Operations (2007) (13)
Memory system energy (poster session): influence of hardware-software optimizations (2000) (13)
Optimizing array-intensive applications for on-chip multiprocessors (2005) (13)
ResiRCA: A Resilient Energy Harvesting ReRAM Crossbar-Based Accelerator for Intelligent Embedded Processors (2020) (13)
Cache-Aware Approximate Computing for Decision Tree Learning (2016) (13)
Performance implications of architectural and software techniques on I/O-intensive applications (1998) (13)
A helper thread based dynamic cache partitioning scheme for multithreaded applications (2011) (13)
Prolonging 3D NAND SSD lifetime via read latency relaxation (2021) (13)
REMAP: a reliability/endurance mechanism for advancing PCM (2017) (13)
Energy-aware code cache management for memory-constrained Java devices (2003) (13)
Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors (2015) (13)
A Scratch-Pad Memory Aware Dynamic Loop Scheduling Algorithm (2008) (13)
Instruction compression and encoding for low-power systems (2002) (12)
Improving variable placement for embedded processors (2000) (12)
Memory Energy Management Using Software and Hardware Directed Power Mode Control (2000) (12)
Design and Evaluation of a Smart Disk Cluster for DSS Commercial Workloads (2001) (12)
An I/O-Conscious Tiling Strategy for Disk-Resident Data Sets (2002) (12)
Multicollective I/O: A technique for exploiting inter-file access patterns (2006) (12)
NANDFlashSim: High-Fidelity, Microarchitecture-Aware NAND Flash Memory Simulation (2016) (12)
NEOFog: Nonvolatility-Exploiting Optimizations for Fog Computing (2018) (12)
SRP: Symbiotic Resource Partitioning of the Memory Hierarchy in CMPs (2010) (12)
Trace-based affine reconstruction of codes (2016) (12)
Optimizing instruction TLB energy using software and hardware techniques (2005) (12)
MDACache: Caching for Multi-Dimensional-Access Memories (2018) (12)
Access pattern restructuring for memory energy (2004) (12)
EECache: Exploiting design choices in energy-efficient last-level caches for chip multiprocessors (2014) (12)
Securing Disk-Resident Data through Application Level Encryption (2007) (12)
Runtime code parallelization for on-chip multiprocessors (2003) (12)
An ILP based approach to address code generation for digital signal processors (2006) (12)
Temperature-sensitive loop parallelization for chip multiprocessors (2005) (12)
Thread vulnerability in parallel applications (2012) (12)
Processor-embedded distributed smart disks for I/O-intensive workloads: architectures, performance models and evaluation (2004) (12)
Experimental Evaluation of Energy Behavior of Iteration Space Tiling (2000) (12)
A Holistic Approach to System Level Energy Optimization (2000) (12)
Energy-performance trade-offs for spatial access methods on memory-resident data (2002) (12)
Reducing energy consumption of multiprocessor SoC architectures by exploiting memory bank locality (2006) (12)
Compiler-directed proactive power management for networks (2005) (12)
Effect of Distributed Directories in Mesh Interconnects (2019) (11)
A special-purpose compiler for look-up table and code generation for function evaluation (2010) (11)
Performance, energy, and reliability tradeoffs in replicating hot cache lines (2003) (11)
Characterizing diverse handheld apps for customized hardware acceleration (2017) (11)
Compiler-Directed Code Restructuring for Improving Performance of MPSoCs (2008) (11)
POSTER: Location-Aware Computation Mapping for Manycore Processors (2017) (11)
An evaluation of code and data optimizations in the context of disk power reduction (2005) (11)
Automated Tracing of I/O Stack (2010) (11)
Kernel-level caching for optimizing I/O by exploiting inter-application data sharing (2002) (11)
Reducing energy consumption of queries in memory-resident database systems (2004) (11)
MPISec I/O: Providing Data Confidentiality in MPI-I/O (2009) (11)
Strategies for improving data locality in embedded applications (2002) (11)
Energy-aware computation duplication for improving reliability in embedded chip multiprocessors (2006) (11)
Compiler optimizations for I/O-intensive computations (1999) (11)
Access pattern-based code compression for memory-constrained embedded systems (2005) (11)
Improving MPI Independent Write Performance Using A Two-Stage Write-Behind Buffering Method (2007) (11)
Compiler-directed power density reduction in NoC-based multicore designs (2006) (11)
Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression (2005) (11)
Leakage-aware SPM management (2006) (11)
Compiler-directed cache polymorphism (2002) (11)
An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors (2006) (11)
Improving I/O performance using soft-QoS-based dynamic storage cache partitioning (2009) (10)
Exploiting Staleness for Approximating Loads on CMPs (2015) (10)
Quasidynamic layout optimizations for improving data locality (2004) (10)
Designing energy-efficient software (2002) (10)
Data replication in banked DRAMs for reducing energy consumption (2006) (10)
A heuristic for clock selection in high-level synthesis (2002) (10)
REEact: a customizable virtual execution manager for multicore platforms (2012) (10)
A data-driven approach for embedded security (2005) (10)
DEMM: A Dynamic Energy-Saving Mechanism for Multicore Memories (2017) (10)
Energy-aware compilation and execution in Java-enabled mobile devices (2003) (10)
Distilling the Essence of Raw Video to Reduce Memory Usage and Energy at Edge Devices (2019) (10)
Locality-conscious process scheduling in embedded systems (2002) (10)
A Constraint Network Based Approach to Memory Layout Optimization (2005) (10)
Estimating and reducing the memory requirements of signal processing codes for embedded systems (2006) (10)
Compilation for Distributed Memory Architectures (2002) (10)
Will They Blend?: Exploring Big Data Computation Atop Traditional HPC NAS Storage (2014) (10)
A Framework for Accelerating Bottlenecks in GPU Execution with Assist Warps (2016) (10)
A unified compiler algorithm for optimizing locality, parallelism and communication in out-of-core computations (1997) (10)
Integer linear programming based energy optimization for banked DRAMs (2005) (10)
Reducing dynamic and leakage energy in VLIW architectures (2006) (10)
Array Unification: A Locality Optimization Technique (2001) (10)
Impact of data transformations on memory bank locality (2004) (10)
Reducing memory requirements through task recomputation in embedded multi-CPU systems (2006) (10)
Co-optimizing memory-level parallelism and cache-level parallelism (2019) (10)
Verifiable annotations for embedded java environments (2005) (9)
Quantifying and Optimizing Data Access Parallelism on Manycores (2018) (9)
Data locality enhancement for CMPs (2007) (9)
Design of a Host Interface Logic for GC-Free SSDs (2020) (9)
FLOSS: FLOw Sensitive Scheduling on Mobile Platforms (2018) (9)
A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality (1998) (9)
Modeling and Optimization of Straggling Mappers (2014) (9)
A Unified Tiling Approach for Out-Of-Core Computations (1996) (9)
Modeling and improving data cache reliability: 1 (2007) (9)
TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platform (2007) (9)
MLC PCM main memory with accelerated read (2016) (9)
Neighborhood-aware data locality optimization for NoC-based multicores (2011) (9)
Geometric Tiling for Reducing Power Consumption in Structured Matrix Operations (2006) (9)
Cache Miss Clustering for Banked Memory Systems (2006) (9)
Improving Off-Chip Memory Energy Behavior in a Multi-processor, Multi-bank Environment (2001) (9)
VLIW scheduling for energy and performance (2001) (9)
Invalid Data-Aware Coding to Enhance the Read Performance of High-Density Flash Memories (2018) (9)
Energy-efficient Java execution using local memory and object co-location (2004) (9)
Improving disk reuse for reducing power consumption (2007) (9)
Energy management schemes for memory-resident database systems (2004) (9)
Maximizing data reuse for minimizing memory space requirements and execution cycles (2006) (9)
The Curious Case of Container Orchestration and Scheduling in GPU-based Datacenters (2018) (9)
Power-efficient trace caches (2002) (9)
Masking the energy behaviour of encryption algorithms (2003) (8)
Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework (2003) (8)
A high-performance application data environment for large-scale scientific computations (2003) (8)
A framework for energy estimation of VLIW architecture (2001) (8)
Managing Leakage Energy in Cache Hierarchies (2003) (8)
Integrating loop and data optimizations for locality within a constraint network based framework (2005) (8)
Total Power Optimization for Combinational Logic Using Genetic Algorithms (2010) (8)
An adaptive locality-conscious process scheduler for embedded systems (2005) (8)
Challenges in Getting Flash Drives Closer to CPU (2013) (8)
Quantifying the Potential Benefits of On-chip Near-Data Computing in Manycore Processors (2017) (8)
Improving Locality in Out-of-Core Computations Using Data Layout Transformations (1998) (8)
Adaptive prefetching for shared cache based chip multiprocessors (2009) (8)
Code restructuring for improving cache performance of MPSoCs (2005) (8)
Middleware - firmware cooperation for high-speed solid state drives (2012) (8)
Locality-Aware Distributed Loop Scheduling for Chip Multiprocessors (2007) (8)
Virtual I/O caching: Dynamic storage cache management for concurrent workloads (2011) (8)
Using data replication to reduce communication energy on chip multiprocessors (2005) (8)
CCC: crossbar connected caches for reducing energy consumption of on-chip multiprocessors (2003) (8)
Adapting application execution in CMPs using helper threads (2009) (8)
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors (2008) (8)
Adaptive multi-level cache allocation in distributed storage architectures (2010) (8)
Exploiting software pipelining for network-on-chip architectures (2006) (8)
Optimizing Spatial Locality in Loop Nests using Linear Algebra (1998) (8)
Disk-Cache and Parallelism Aware I/O Scheduling to Improve Storage System Performance (2013) (8)
Computing with Near Data (2018) (8)
Analyzing heap error behavior in embedded JVM environments (2004) (8)
Data layout optimization for GPGPU architectures (2013) (8)
SPM conscious loop scheduling for embedded chip multiprocessors (2006) (8)
An Iteration Space Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality (1999) (8)
Using Data Compression for Increasing Memory System Utilization (2009) (8)
Scalable Parallelization Strategies to Accelerate NuFFT Data Translation on Multicores (2010) (8)
Exploiting inter-processor data sharing for improving behavior of multi-processor SoCs (2005) (8)
HL-PCM: MLC PCM Main Memory with Accelerated Read (2017) (8)
Evaluating the impact of architectural-level optimizations on clock power (2001) (8)
Reducing dynamic compilation overhead by overlapping compilation and execution (2006) (8)
Exploiting Data Longevity for Enhancing the Lifetime of Flash-based Storage Class Memory (2017) (8)
Enhancing Address Translations in Throughput Processors via Compression (2020) (7)
Thermal-Aware Application Scheduling on Device-Heterogeneous Embedded Architectures (2015) (7)
Field level analysis for heap space optimization in embedded java environments (2004) (7)
Coordinated power management of voltage islands in CMPs (2010) (7)
Automatic Feedback Control of Shared Hybrid Caches in 3D Chip Multiprocessors (2011) (7)
CritICs Critiquing Criticality in Mobile Apps (2018) (7)
SPM management using Markov chain based data access prediction (2008) (7)
A hardware-software codesign strategy for Loop intensive applications (2009) (7)
SpIitServe: Efficiently Splitting Complex Workloads Across FaaS and IaaS (2019) (7)
MROrchestrator : A Fine-Grained Resource Orchestration Framework for Hadoop MapReduce (2012) (7)
MaxTracker: Continuously Tracking the Maximum Computation Progress for Energy Harvesting ReRAM-based CNN Accelerators (2021) (7)
VL-CDRAM: variable line sized cached DRAMs (2003) (7)
Address Register Assignment for Reducing Code Size (2003) (7)
Predictive Precharging for Bitline Leakage Energy Reduction (2002) (7)
Reducing dTLB energy through dynamic resizing (2003) (7)
An Experimental Evaluation of I/O Optimizations on Different Applications (2002) (7)
Erratum: An experimental evaluation of I/O optimizations on different applications (IEEE Transactions on Parallel and Distributed Systems) (2002) (7)
Holistic Management of the GPGPU Memory Hierarchy to Manage Warp-level Latency Tolerance (2018) (7)
A Unified Energy Estimation Framework with Integrated Hardware-Software Optimizations (2000) (7)
Compiler-Directed Code Restructuring for Operating with Compressed Arrays (2007) (7)
Evaluating the role of scratchpad memories in chip multiprocessors for sparse matrix computations (2008) (7)
Fifer: Tackling Underutilization in the Serverless Era (2020) (7)
Energy-Aware Instruction Scheduling (2000) (7)
A data-centric approach to checksum reuse for array-intensive applications (2005) (7)
A compiler-based approach for improving intra-iteration data reuse (2002) (7)
Reactive tiling (2015) (7)
IAA: Incidental Approximate Architectures for Extremely Energy-Constrained Energy Harvesting Scenarios using IoT Nonvolatile Processors (2018) (7)
Quantifying Data Locality in Dynamic Parallelism in GPUs (2018) (7)
Ring data location prediction scheme for Non-Uniform Cache Architectures (2008) (7)
Integrated Data Reorganization and Disk Mapping for Reducing Disk Energy Consumption (2007) (7)
Exploring parallelization strategies for NUFFT data translation (2009) (7)
2D data locality: definition, abstraction, and application (2005) (7)
LODS: locality-oriented dynamic scheduling for on-chip multiprocessors (2004) (7)
Improved cache utilization and preconditioner efficiency through use of a space-filling curve mesh element- and vertex-reordering technique (2014) (7)
Implications of Public Cloud Resource Heterogeneity for Inference Serving (2020) (7)
Optimization and Evaluation of Hartree-Fock Application's I/O with PASSION (1997) (6)
Maximizing data reuse for minimiz-ing space requirements and executive cycles (2006) (6)
CachedGC: Cache-Assisted Garbage Collection in Modern Solid State Drives (2018) (6)
Improving last level cache locality by integrating loop and data transformations (2012) (6)
Reducing code size through address register assignment (2006) (6)
Compiler-Directed Collective-I/O (2001) (6)
A Data Layout Optimization Technique Based on Hyperplanes (1997) (6)
Locality Optimization Algorithms for Compilation of Out-of-Core Codes (1998) (6)
Interprocedural optimizations for improving data cache performance of array-intensive embedded applications (2003) (6)
Memory Bank Aware Dynamic Loop Scheduling (2007) (6)
Energy-efficient instruction cache using page-based placement (2001) (6)
Intra-application shared cache partitioning for multithreaded applications (2010) (6)
Affine Modeling of Program Traces (2019) (6)
Dynamic Speed Control for Server Class Disks (2003) (6)
Compiler-directed management of leakage power in software-managed memories (2006) (6)
A Study on Performance and Power Efficiency of Dense Non-Volatile Caches in Multi-Core Systems (2017) (6)
Improving whole-program locality using intra-procedural and inter-procedural transformations, (2005) (6)
Performance and energy evaluation of data prefetching on intel Xeon Phi (2015) (6)
Workload Clustering for Increasing Energy Savings on Embedded MPSoCs (2005) (6)
Enhancing the performance of MPI-IO applications by overlapping I/O, computation and communication (2008) (6)
Compiler-Directed Variable Latency Aware SPM Management to CopeWith Timing Problems (2007) (6)
Compiler support for near data computing (2021) (6)
Switch Box Architectures for Three-Dimensional FPGAs (2006) (6)
Congestion-aware memory management on NUMA platforms: A VMware ESXi case study (2017) (6)
Power and performance in I/O for scientific applications (2005) (5)
Compiler-directed I/O optimization (2002) (5)
Implementation and evaluation of a migration-based NUCA design for chip multiprocessors (2008) (5)
Reliability-centric system design for embedded systems (2005) (5)
A Memory-Conscious Code Parallelization Scheme (2007) (5)
Energy and performance considerations in work partitioning for mobile spatial queries (2003) (5)
Exploiting large on-chip memory space through data recomputation (2010) (5)
CApRI: CAche-conscious data reordering for irregular codes (2014) (5)
Feedback control based cache reliability enhancement for emerging multicores (2011) (5)
Symmetric encryption in reconfigurable and custom hardware (2005) (5)
Tuning data replication for improving behavior of MPSoC applications (2004) (5)
Scheduling reusable instructions for power reduction (2004) (5)
Tracking object life cycle for leakage energy optimization (2003) (5)
Optimizing sparse matrix vector multiplication on emerging multicores (2013) (5)
A Collective I/O Scheme Based on Compiler Analysis (2000) (5)
Design and Evaluation of a Compiler-Directed Collective I/O Technique (2000) (5)
Towards Energy-Aware Iteration Space Tiling (2000) (5)
Exploiting last idle periods of links for network power management (2005) (5)
On the performance of the POSIX I/O interface to PVFS (2004) (5)
Compiler-directed management of instruction accesses (2003) (5)
Optimizing Leakage Energy Consumption in Cache Bitlines (2004) (5)
ReveNAND: A Fast-Drift-Aware Resilient 3D NAND Flash Design (2018) (5)
Reshaping cache misses to improve row-buffer locality in multicore systems (2013) (5)
Optimizing Out-of-Core Computations in Uniprocessors (1997) (5)
Loop Transformations for Reducing Data Space Requirements of Resource-Constrained Applications (2003) (5)
Object duplication for improving reliability (2006) (5)
Reducing memory energy consumption of embedded applications that process dynamically allocated data (2006) (5)
Techniques for Designing Energy-Aware MPSoCs (2005) (5)
Energy management in software-controlled multi-level memory hierarchies (2005) (5)
Morphable Cache Architectures: Potential Benefits (2001) (5)
Software-Directed Data Access Scheduling for Reducing Disk Energy Consumption (2011) (5)
DSM: A Case for Hardware-Assisted Merging of DRAM Rows with Same Content (2020) (5)
Machine learning techniques for improved data prefetching (2015) (5)
A generalized framework for global communication optimization (1998) (5)
Compiler-guided data compression for reducing memory consumption of embedded applications (2006) (5)
An integrated approach for improving cache behavior (2003) (5)
Address code and arithmetic optimizations for embedded systems (2002) (5)
EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors (2015) (5)
Hybrid-comp: A criticality-aware compressed last-level cache (2018) (4)
Prefetching-aware cache line turnoff for saving leakage energy (2006) (4)
Increasing FPGA resilience against soft errors using task duplication (2005) (4)
GSSA: A Resource Allocation Scheme Customized for 3D NAND SSDs (2021) (4)
Pro-active Page Replacement for Scientific Applications: A Characterization (2005) (4)
Software-directed combined cpu/link voltage scaling fornoc-based cmps (2008) (4)
Quantifying Thread Vulnerability for Multicore Architectures (2011) (4)
I/O-Conscious Tiling for Disk-Resident Data Sets (1999) (4)
Dataflow analysis for energy-efficient scratch-pad memory management (2005) (4)
A Process Scheduler-Based Approach to NoC Power Management (2007) (4)
Trading cache hit rate for memory performance (2014) (4)
Data Space Oriented Tiling (2002) (4)
Exploring the impact of memory block permutation on performance of a crossbar ReRAM main memory (2017) (4)
Content Popularity-Based Selective Replication for Read Redirection in SSDs (2018) (4)
Optimising power efficiency in trace cache fetch unit (2007) (4)
Exploiting bank locality in multi-bank memories (2003) (4)
Global I/O optimizations for out-of-core computations (1997) (4)
Optimizing code parallelization through a constraint network based approach (2006) (4)
Ring Prediction for Non-Uniform Cache Architectures (2007) (4)
Improving memory performance of embedded Java applications by dynamic layout modifications (2004) (4)
Data space oriented scheduling in embedded systems (2003) (4)
BB-GC: basic-block level garbage collection (2005) (4)
Computation mapping for multi-level storage cache hierarchies (2010) (4)
Energy-Aware Code Replication for Improving Reliability in Embedded Chip Multiprocessors (2006) (4)
Performance and Energy Efficient Asymmetrically Reliable Caches for Multicore Architectures (2015) (4)
Increasing GPU Translation Reach by Leveraging Under-Utilized On-Chip Resources (2021) (4)
Performance and Power-Efficient Design of Dense Non-Volatile Cache in CMPs (2018) (4)
Enhancing Spatial Locality using Data Layout Optimizations (1997) (4)
An ILP Approach for Optimizing Cache Locality (1998) (4)
Performance Aware Secure Code Partitioning (2007) (4)
Memory Space Conscious Loop Iteration Duplication for Reliable Execution (2005) (4)
Multilayer Cache Partitioning for Multiprogram Workloads (2011) (4)
Revamping Storage Class Memory With Hardware Automated Memory-Over-Storage Solution (2021) (4)
Optimizing energy consumption in GPUS through feedback-driven CTA scheduling (2017) (4)
Using data compression in an MPSoC architecture for improving performance (2005) (4)
Exploiting value locality for secure-energy aware communication (2003) (4)
Efficient K nearest neighbor algorithm implementations for throughput-oriented architectures (2018) (4)
Multi-compilation: capturing interactions among concurrently-executing applications (2006) (4)
A unified energy framework with integrated hardware-software optimizations (2000) (4)
Compiler directed network-on-chip reliability enhancement for chip multiprocessors (2010) (4)
SimplePower : A Cycle-Accurate Energy Simulator (2000) (4)
Reliability-aware core partitioning in chip multiprocessors (2012) (4)
Exploring performance-power tradeoffs in providing reliability for NoC-based MPSoCs (2011) (4)
Enhancing Locality in Two-Dimensional Space through Integrated Computation and Data Mappings (2007) (4)
Predictive precharging for bitline leakage energy reduction [microprocessor caches] (2002) (4)
Energy savings through embedded processing on disk system (2006) (4)
Memory energy characterization and optimization for the SPEC2000 benchmarks (2001) (4)
Compiler Support for Voltage Islands (2006) (4)
An ILP-Based Approach to Locality Optimization (2004) (4)
FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads (2019) (4)
Cache Hierarchy-Aware Query Mapping on Emerging Multicore Architectures (2017) (4)
A Selective Hardware / Compiler Approach for Improving (1999) (4)
Architecture-Centric Bottleneck Analysis for Deep Neural Network Applications (2019) (4)
Clone Detection in Sensor Networks with Ad Hoc and Grid Topologies (2009) (4)
Design space exploration of workload-specific last-level caches (2012) (4)
Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs Sri (2006) (3)
Protecting Code Regions on Asymmetrically Reliable Caches (2016) (3)
Reuse distance based performance modeling and workload mapping (2012) (3)
Register-Oriented Optimizations for Embedded Processors (2007) (3)
Optimizing embedded applications using programmer-inserted hints (2005) (3)
Performance and memory space optimizations for embedded systems (2011) (3)
Runtime system support for software-guided disk power management (2007) (3)
Performance-reliability tradeoff analysis for multithreaded applications (2012) (3)
Data windows: a data-centric approach for query execution in memory-resident databases (2004) (3)
Computing with Near Data (2019) (3)
Adaptive QoS Decomposition and Control for Storage Cache Management in Multi-server Environments (2011) (3)
CASH: compiler assisted hardware design for improving DRAM energy efficiency in CNN inference (2019) (3)
Access pattern-based code compression for memory-constrained systems (2008) (3)
Constraint-based Code mapping for heterogeneous Chip multiprocessors (2005) (3)
I/O Optimizations for Compiling Out-of Core Programs on Distributed-Memory Machines (1997) (3)
An Experimental Evaluation of Smart Disk Architectures Using DSS Commercial Workloads (1999) (3)
HoloAR: On-the-fly Optimization of 3D Holographic Processing for Augmented Reality (2021) (3)
An Energy-Oriented Evaluation of Communication Optimizations for Microcensor Networks (2003) (3)
Exploiting Data Longevity for Enhancing the Lifetime of Flash-based Storage Class Memory (2017) (3)
Leakage-aware compilation for VLIW architectures (2005) (3)
Improving the performance of k-means clustering through computation skipping and data locality optimizations (2012) (3)
A compiler-guided approach for reducing disk power consumption by exploiting disk access locality (2006) (3)
Centaur (2020) (3)
Design of power-aware FPGA fabrics (2007) (3)
A Learning-Guided Hierarchical Approach for Biomedical Image Segmentation (2018) (3)
Characterizing Bottlenecks in Scheduling Microservices on Serverless Platforms (2020) (3)
Reducing Power through Compiler-Directed Barrier Synchronization Elimination (2006) (3)
Optimizing inter-processor data locality on embedded chip multiprocessors (2005) (3)
Fair Write Attribution and Allocation for Consolidated Flash Cache (2020) (3)
Using Data Compression to Increase Energy Savings in Multi-bank Memories (2004) (3)
A window-based approach to retrieving memory-resident data for query execution (2004) (3)
NEOFog (2018) (2)
Studying interactions between prefetching and cache line turnoff (2005) (2)
A Hybrid Evolutionary Algorithm for Solving the Register Allocation Problem (2004) (2)
Increasing data TLB resilience to transient errors (2005) (2)
Characterization of memory energy behavior (2001) (2)
Traffic steering between a low-latency unswitched TL ring and a high-throughput switched on-chip interconnect (2013) (2)
Hybrid Techniques for Fast Multicore Simulation (2009) (2)
Prefetch throttling and data pinning for improving performance of shared caches (2008) (2)
A Scale-Out Enterprise Storage Architecture (2017) (2)
Automatic Parallel Code Generation for NUFFT Data Translation on multicores (2012) (2)
Investigating Memory System Energy Behavior Using Software and Hardware Optimizations (2001) (2)
IOPro: a parallel I/O profiling and visualization framework for high-performance storage systems (2015) (2)
Modeling and improving data cache reliability (2007) (2)
In-Network Caching for Chip Multiprocessors (2008) (2)
Quantifying Data Locality in Dynamic Parallelism in GPUs (2019) (2)
Compiler-Based Code Partitioning for Intelligent Embedded Disk Processing (2003) (2)
Reducing Energy Consumption of On-Chip Networks Through a Hybrid Compiler-Runtime Approach (2007) (2)
Fifer (2020) (2)
Capturing and optimizing the interactions between prefetching and cache line turnoff (2008) (2)
Masking the Energy Behavior of Encryption Algorithms (2003) (2)
Examining Thread Vulnerability analysis using fault-injection (2013) (2)
Code Scheduling for Optimizing Parallelism and Data Locality (2010) (2)
Restructuring I/O-Intensive Computations for Locality (1999) (2)
An in-depth study of next generation interface for emerging non-volatile memories (2016) (2)
System Level Meta-data for High-Performance Data management (1999) (2)
Dynamic Compilation for Reducing Energy Consumption of I/O-Intensive Applications (2005) (2)
An access pattern based energy management strategy for instruction caches (2003) (2)
Using Task Recomputation During Application Mapping in Parallel Embedded Architectures (2006) (2)
Integrated code and data placement in two-dimensional mesh based chip multiprocessors (2008) (2)
Towards Designing a Self-Managed Machine Learning Inference Serving System inPublic Cloud (2020) (2)
An Experimental Study to Analyze and Optimize Hartree-Fock Application's I/O with Passion (1998) (2)
Alleviating Bottlenecks for DNN Execution on GPUs via Opportunistic Computing (2019) (2)
SpecSafe: detecting cache side channels in a speculative world (2021) (2)
Leveraging value locality for efficient design of a hybrid cache in multicore processors (2017) (2)
Cooperative parallelization (2011) (2)
DSM (2020) (2)
Efficient synthesis of array intensive computations onto FPGA based accelerators (2001) (2)
A cache topology-aware multi-query scheduler for multicore architectures (2014) (2)
An Approach for Enhancing Inter-processor Data Locality on Chip Multiprocessors (2007) (2)
Secure Execution of Computations in Untrusted Hosts (2006) (2)
Influence of communication optimizations on on-chip multi-processor energy (2003) (2)
AMOEBA: a coarse grained reconfigurable architecture for dynamic GPU scaling (2019) (2)
Fair Resource Allocation in Consolidated Flash Systems (2019) (2)
Code protection for resource-constrained embedded devices (2004) (2)
Tolerating Write Disturbance Errors in PCM: Experimental Characterization, Analysis, and Mechanisms (2018) (2)
Scheduling opportunities for asymmetrically reliable caches (2019) (2)
On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression (2005) (2)
SplitServe: Efficiently Splitting Apache Spark Jobs Across FaaS and IaaS (2020) (2)
Studying error propagation on application data structure and hardware (2022) (2)
APP: Minimizing Interference Using Aggressive Pipelined Prefetching in Multi-level Buffer Caches (2011) (2)
T-NUCA - a novel approach to non-uniform access latency cache architectures for 3D CMPs (2010) (2)
Energy-Conscious Memory Allocation and Deallocation for Pointer-Intensive Applications (2003) (2)
Compiler support for block buffering (2001) (1)
Off-chip access localization for NoC-based multicores (2012) (1)
Improving performance of Java applications using a coprocessor (2004) (1)
QoS aware storage cache management in multi-server environments (2011) (1)
Prefetch Tuning Optimizations (2016) (1)
Improving Locality Using a Graph-Based Technique for Detecting Memory Layouts of Arrays (1999) (1)
A dynamic locality optimization algorithm for linear algebra codes (2001) (1)
SpIitServe (2019) (1)
Array composition and decomposition for optimizing embedded applications (2003) (1)
Dynamic core partitioning for energy efficiency (2010) (1)
Optimizing data locality using array tiling (2011) (1)
The control, communication, and computation language (c3l): completing the design cycle in complex distributed system development (2009) (1)
GYAN: Accelerating Bioinformatics Tools in Galaxy with GPU-Aware Computation Mapping (2021) (1)
Optimization of Intercache Traffic Entanglement in Tagless Caches With Tiling Opportunities (2020) (1)
Optimizing Communication Using Global Dataflow Analysis (1997) (1)
Using dynamic compilation for continuing execution under reduced memory availability (2009) (1)
Architecture-Aware Approximate Computing (2019) (1)
Network and Parallel Computing (2017) (1)
A Combined Communication and Synchronization Optimization Algorithm for One-Way Communication (1997) (1)
Hardware and software techniques for DRAM energy management (2001) (1)
Security issues in embedded system design (2005) (1)
Addressing Fast-Detrapping for Reliable 3 D NAND Flash Design (2019) (1)
Quantifying Data Locality in Dynamic Parallelism in GPUs (2019) (1)
Minimizing interference through application mapping in multi-level buffer caches (2011) (1)
Activity Clustering for Leakage Management in SPMs (2006) (1)
QoS aware dynamic time-slice tuning (2014) (1)
Load elimination for low-power embedded processors (2005) (1)
Asymmetrically reliable caches for multicore architectures under performance and energy constraints (2016) (1)
CASH (2019) (1)
Fault recovery designs for processor-embedded distributed storage architectures with I/O-intensive DB workloads (2005) (1)
Reducing memory requirements of resource-constrained applications (2009) (1)
Input‐Output Programs (1999) (1)
Reducing cache access energy in array-intensive applications (2002) (1)
EECache (2015) (1)
Reducing Energy Consumption in Chip Multiprocessors Using Workload Variations (2004) (1)
Design and Evaluation of Smart Disk Architecture for Data-Intensive Applications (2000) (1)
Cypress: input size-sensitive container provisioning and request scheduling for serverless platforms (2022) (1)
Data Space Oriented Scheduling (2003) (1)
On Urgency of I/O Operations (2012) (1)
Architecture-Aware Approximate Computing (2019) (1)
Exploiting memory bank locality in multiprocessor SoC architectures (2004) (1)
Compiler techniques for enhancing data locality (1999) (1)
Particle simulation on the Cell BE architecture (2011) (1)
Cross-Platform Performance Evaluation of Stateful Serverless Workflows (2021) (1)
Improving shared cache behavior of multithreaded object-oriented applications in multicores (2011) (1)
Soft Error Characterization on Scientific Applications (2018) (1)
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, LCTES 2009, Dublin, Ireland, June 19-20, 2009 (2009) (1)
Reliability-conscious process scheduling under performance constraints in FPGA-based embedded systems (2005) (1)
A selective protection scheme of applications using asymmetrically reliable caches (2017) (1)
Storage consolidation: Not always a panacea, but can we ease the pain? (2016) (1)
Topology-Aware I/O Caching for Shared Storage Systems (2009) (1)
Optimization of Out-of-Core Computations Using Chain Vectors (1997) (1)
Multi-resource fair allocation for consolidated flash-based caching systems (2022) (1)
Compiler-directed file layout optimization for hierarchical storage systems (2012) (1)
Hardware-software co-adaptation for data-intensive embedded applications (2002) (1)
Memory-Conscious Reliable Execution on Embedded Chip Multiprocessors (2006) (1)
Tree Cache – A Novel Approach to Non-Uniform Access Latency Cache Architectures for 3 D CMPs (2009) (1)
Algorithm-Architecture Codesign for Structured Matrix Operations on Reconfigurable Systems (1)
Exploiting temporal loads for low latency and high bandwidth memory (2005) (1)
Splice: An Automated Framework for Cost-and Performance-Aware Blending of Cloud Services (2022) (1)
I/O Programming Paradigms: Past and Future: Theory and Practice (2000) (0)
Bandwidth Constrained Coordinated HW/SW Prefetching for Multicores (2011) (0)
Mix and Match: Reorganizing Tasks for Enhancing Data Locality (2021) (0)
Message from the NPC 2017 chairs (2017) (0)
Managing power, performance and reliability trade-offs (2008) (0)
Exploiting On-Chip Data Transfers for Improving Performance of Chip-Scale Multiprocessors (2003) (0)
PART : A Run-Time Library for Tape-Resident Data (1999) (0)
Studying inter-core data reuse in multicores (2011) (0)
Reviving Zombie Pages on SSDs (2018) (0)
Cache-aware application parallelization and optimization for multicores (2011) (0)
A Hybrid Strategy Based on Data Distribution and Migration for Optimizing Memory Locality (2002) (0)
Generalized data transformations for enhancing cache behavior (2003) (0)
IPDPS 2011 Organization (2011) (0)
Mix and Match: Reorganizing Tasks for Enhancing Data Locality (2021) (0)
Cypress (2022) (0)
Tota I Power 0 pt i m izat i o n t h rough Si mu Ita neous I y Multiple-V,, Multiple-V,, Assignment and Device Sizing with Stack Forcing (2004) (0)
Improving I/O performance through compiler-directed code restructuring and adaptive prefetching (2008) (0)
Interference Resolver in Shared Storage Systems to Provide Fairness to I/O Intensive Applications (2013) (0)
Distance-in-time versus distance-in-space (2021) (0)
Parallel Read Partitioning for Concurrent Assembly of Metagenomic Data (2018) (0)
Visual Search Optimization (2016) (0)
Paralellism-Based Techniques for Slowing Down Soft Error Propagation (2022) (0)
Communication Based Proactive Link Power Management (2009) (0)
Experiments with Data Layouts (1997) (0)
Sensor Network Security with Random Key Predistribution (2012) (0)
A Systematic Approach to Automatically Generate Multiple Semantically Equivalent Program Versions (2008) (0)
Architectural exploration of heterogeneous memory systems (2018) (0)
A Compiler-Based Approach to Data Security (2005) (0)
Slicing based code parallelization for minimizing inter-processor communication (2009) (0)
Reconstructing affine codes from their memory traces (2015) (0)
Architecture-Aware Approximate Computing (2019) (0)
Locality-Aware Dynamic Mapping for Multithreaded Applications (2012) (0)
Athena (2022) (0)
Fine-grain instruction scheduling for low energy (2002) (0)
Power Aware Disk Allocation (2009) (0)
Session details: Design space exploration and scheduling for embedded software (2004) (0)
Interprocedural optimizations for improving data cache performance of array-sensitive embedded applications (2003) (0)
Energy-Aware Parameter Passing (2003) (0)
Energy Optimization Using Object Co-Location in Java (2007) (0)
Improving Multicore System Performance through Data Compression (2017) (0)
Process Variation Aware Thread Mapping for Chip (2009) (0)
Improving the energy behavior of block buffering using compiler optimizations (2006) (0)
An architecture interface and offload model for low-overhead, near-data, distributed accelerators (2022) (0)
Asymmetrically reliable caches for multicore architectures under performance and energy constraints (2016) (0)
Remap (1995) (0)
An Energy-Aware Approach for Sensor Data Communication (2012) (0)
Alleviating Bottlenecks for DNN Execution on (2020) (0)
Athena: An Early-Fetch Architecture to Reduce on-Chip Page Walk Latencies (2022) (0)
Software power optimisation (2006) (0)
Data Convection (2022) (0)
BrickX: building hybrid systems for recursive computations (2011) (0)
The Pennsylvania State University The Graduate School Department of Computer Science and Engineering CHARACTERIZING AND OPTIMIZING ON-CHIP SHARED MEMORY RESOURCES USING MARKET-DRIVEN MECHANISMS (2019) (0)
Hardware/Software Techniques for Improving Cache Performance in Embedded Systems (2003) (0)
Centaur: A Novel Architecture for Reliable, Low-Wear, High-Density 3D NAND Storage (2020) (0)
ISQED'20 Best Papers (2020) (0)
Data access skipping for recursive partitioning methods (2018) (0)
Centaur: A Novel Architecture for Reliable, Low-Wear, High-Density 3D NAND Storage (2020) (0)
Designing Energy-Aware Sensor Systems (2012) (0)
FastDrain: Removing Page Victimization Overheads in NVMe Storage Stack (2020) (0)
Memory Row Reuse Distance and its Role in Optimizing Application Performance (2015) (0)
Collective Affinity Aware Computation Mapping (2020) (0)
International Conference on Computational Science, ICCS 2012 Dynamic Tracing of Parallel I/O Activity in HPC Applications (2012) (0)
Memory Partitioning in the Limit (2016) (0)
Shared scratch pad memory space management across applications (2009) (0)
Fluid: a framework for approximate concurrency via controlled dependency relaxation (2021) (0)
Quantum Circuit Resizing (2022) (0)
Storage Consolidation on SSDs: Not Always a Panacea, but Can We Ease the Pain? (2015) (0)
Compiler-Directed Code Restructuring for Reducing Data TLB Energy (2004) (0)
Compiler Directed Data Locality Optimization for Multicore Architectures (2011) (0)
Symbolic Execution Based Data Flow Analysis for Optimizing Compilers : Proof of Semantic Equivalence of a Program and Code Generated from the Symbolic Execution Based Data Flow Analysis (2009) (0)
Erratum to "Processor-embedded distributed smart disks for I/O-intensive workloads: architectures, performance models and evaluation" [J. Parallel Distrib. Comput. 64(2004) 427-446] (2005) (0)
Memory Bank Locality and Its Usage in Reducing Energy Consumption (2007) (0)
PowerPrep: A power management proposal for user-facing datacenter workloads (2021) (0)
Memory Space Recycling (2022) (0)
Compiler-Enhanced Reliability for Network-on-Chip Architectures (2017) (0)
A Prefetching Algorithm for Multi-speed Disks (2007) (0)
Improving the Performance of the POSIX I / O Interface to PVFS (2002) (0)
Redefining the term ‘ Reconfigurable-Chips ’ : Un solving the Rubik ’ s Cube (2013) (0)
- Compiler-Directed Communication Energy Optimizations for Microsensor Networks (2012) (0)
X-REEact: Fighting Runtime Variances across Time and Space (2012) (0)
Generalized Data Transformations (2003) (0)
Local i ty-Conscious Process Sched u I i ng in Embedded Systems' . (2003) (0)
HCW 2016 Keynote Talk (2016) (0)
SplitServe (2020) (0)
Concurrency Management in Heterogeneous Architectures (2014) (0)
Power-aware code scheduling for clusters of active disks (2005) (0)
Session details: Compilation techniques for embedded applications (2004) (0)
Analyzing heap error behavior in embedded JVM environments (2004) (0)
Improving Memory Space Utilization in Multi-core Embedded Systems using Task Recomputation (2012) (0)
Minimizing EnergyConsumption ofBankedMemories UsingDataRecomputation (2006) (0)
An Integer Linear Programming Approach for Optirnizing Cache Locality (1999) (0)
Improved cache utilization and preconditioner efficiency through use of a space-filling curve mesh element- and vertex-reordering technique (2014) (0)
Quantifying the impact of data replication on error propagation (2022) (0)
Dataflow Analysis for Energy-Efficient Memory Management (2005) (0)
On-chip memory space partitioning for chip multiprocessors using polyhedral algebra (2010) (0)
Selective Event Processing for Energy Efficient Mobile Gaming with SNIP (2020) (0)
Ghost Thread: Effective User-Space Cache Side Channel Protection (2021) (0)
An Efficient Edge-Cloud Partitioning of Random Forests for Distributed Sensor Networks (2022) (0)
Memory Space Recycling (2022) (0)
ReveNAND (2018) (0)
Reliability-Aware OS Support for FPGA-Based Systems (2004) (0)
Memory Partitioning in the Limit (2015) (0)
Compiler optimizations for simd/gpu/multicore architectures (2013) (0)
HAMS: Hardware Automated Memory-over-Storage for Large-scale Memory Expansion (2022) (0)
Data Convection: A GPU-Driven Case Study for Thermal-Aware Data Placement in 3D DRAMs (2022) (0)
Dynamic Parallelization of Array Based On-Chip Multiprocessor Applications (2003) (0)
Compiling for memory emergency (2005) (0)
GraphGuess: Approximate Graph Processing System with Adaptive Correction (2021) (0)
1 Reliability-Centric High-Level Synthesis (2004) (0)
Session details: System level modeling for early design space exploration, simulation, and synthesis (2011) (0)
Software based techniques for robust computing on chip multiprocessors (2008) (0)
Energy management for multibanked memory architectures (2003) (0)
Multiverse: Dynamic VM Provisioning for Virtualized High Performance Computing Clusters (2020) (0)
Automated Parallelization of Non-uniform Convolutions on Chip Multiprocessors (2009) (0)
Using Memory Compression for Energy Reduction in an Embedded Java System (2002) (0)
Optimizing Array-Intensive Applications for (2005) (0)
Tools and Techniques for Integrated Hardware-Software Energy Optimizations (2002) (0)
Fine-Granular Computation and Data Layout Reorganization for Improving Locality (2022) (0)
Implications of future technologies on the design of fpgas (2006) (0)
Total power optimization through simultaneously multiple-V/sub DD/ multiple-V/sub TH/ assignment and device sizing with stack forcing (2004) (0)
IMPACT OF SOFT ERRORS ON SCIENTIFIC SIMULATIONS (2011) (0)
Experimental evaluation of a compiler-based cache energy optimization strategy (2002) (0)
TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability (2015) (0)
Quantifying and Optimizing the Impact of Victim Cache Line Selection in Manycore Systems (2014) (0)
Dynamic Storage Cache Partitioning Using Feedback Control Theory (2009) (0)
Runtime integrity checking for inter-object connections (2005) (0)
Reducing interference in memory hierarchy resources using application aware management (2011) (0)
Compiler-Guided Code Restructuring for Improving Instruction TLB Energy Behavior (2004) (0)
The What ’ s Next Computing Architecture (2018) (0)
Memory-Aware Warp Scheduling (2013) (0)
Minimizing end-to-end interference in i/o stacks spanning shared multi-level buffer caches (2011) (0)
DSM (2020) (0)
ORCA: Operating system and Runtime system support for arChitectural diversity and Application dynamicity (2012) (0)
Answers to the Questions for NSF XPS Workshop 2015 (2015) (0)
FLOSS (2018) (0)
Data recomputation based optimizations in embedded systems (2008) (0)
IOPro: a parallel I/O profiling and visualization framework for high-performance storage systems (2014) (0)
Link Idle Period Exploitation for Network Power Management (2007) (0)
Dynamic resource management for energy-efficiency and quality-of-service in chip multiprocessors (2010) (0)
Compiler-directed energy estimation and optimization for uniprocessors and multiprocessor systems-on-a-chip architectures (2003) (0)
Java virtual machine for resource constrained environments (2006) (0)
A Scheduling Framework for Decomposable Kernels on Energy Harvesting IoT Edge Nodes (2022) (0)
Implementation and evaluation of an on-demand parameter-passing strategy for reducing energy (2003) (0)
Computing with Near Data (2019) (0)
Kraken (2021) (0)
On a Caching System with Object Sharing (2019) (0)
Selective Caching: Avoiding Performance Valleys in Massively Parallel Architectures (2020) (0)
EFFECTOFCOMPILEROPTIMIZATIONS ON MEMORY ENERGY (2000) (0)
An Optimizing Compiler for Petascale I/O on Leadership-Class Architectures (2015) (0)
Exploring the Possibility of Operating in the Compressed Domain (2004) (0)
Memory-Constrained Machine Reliability for Embedded Systems (2005) (0)
Session details: Poster exhibit summaries (2007) (0)

This paper list is powered by the following services:

What Schools Are Affiliated With Mahmut Taylan Kandemir?

Mahmut Taylan Kandemir is affiliated with the following schools:

Pennsylvania State University

Mahmut Taylan Kandemir's Academic­Influence.com Rankings

Mahmut Taylan Kandemir's Degrees

Why Is Mahmut Taylan Kandemir Influential?

Mahmut Taylan Kandemir's Published Works

Published Works

What Schools Are Affiliated With Mahmut Taylan Kandemir?

Mahmut Taylan Kandemir's AcademicInfluence.com Rankings