Máire O'Neill
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Irish data encryption academic
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Máire O'Neillcomputer-science Degrees
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Computer Science
Máire O'Neill's Degrees
- Bachelors Electrical and Electronic Engineering Queen's University Belfast
- PhD Electrical and Electronic Engineering Queen's University Belfast
Why Is Máire O'Neill Influential?
(Suggest an Edit or Addition)According to Wikipedia, Máire O'Neill is an Irish Professor of Information Security and inventor based at the Centre for Secure Information Technologies Queen's University Belfast. She was named the 2007 British Female Inventors & Innovators Network Female Inventor of the Year. She was the youngest person to be made a professor of engineering at Queen's University Belfast and youngest person to be inducted into the Irish Academy of Engineering.
Máire O'Neill's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- High Performance Single-Chip FPGA Rijndael Algorithm Implementations (2001) (179)
- A First Step Toward Cost Functions for Quantum-Dot Cellular Automata Designs (2014) (169)
- Neural network based attack on a masked implementation of AES (2015) (114)
- Hardware Elliptic Curve Cryptographic Processor Over$rm GF(p)$ (2006) (101)
- FPGA Implementations of the Round Two SHA-3 Candidates (2010) (100)
- Design rules for Quantum-dot Cellular Automata (2011) (100)
- Are QCA cryptographic circuits resistant to power analysis attack? (2012) (97)
- QCA Systolic Array Design (2013) (79)
- Low-Cost SHA-1 Hash Function Architecture for RFID Tags (2008) (77)
- On Practical Discrete Gaussian Samplers for Lattice-Based Cryptography (2018) (71)
- Public Key Cryptography and RFID Tags (2007) (69)
- Practical homomorphic encryption: A survey (2014) (69)
- Rijndael FPGA Implementations Utilising Look-Up Tables (2003) (62)
- Insecurity by Design: Today's IoT Device Security Problem (2016) (62)
- Efficient single-chip implementation of SHA-384 and SHA-512 (2002) (60)
- Design of Semiconductor QCA Systems (2013) (57)
- Hardware Comparison of the ISO/IEC 29192-2 Block Ciphers (2012) (56)
- Practical Lattice-Based Digital Signature Schemes (2015) (53)
- A Tunable Encryption Scheme and Analysis of Fast Selective Encryption for CAVLC and CABAC in H.264/AVC (2013) (53)
- Common Control Channel Security Framework for Cognitive Radio Networks (2009) (51)
- A machine learning attack resistant multi-PUF design on FPGA (2018) (48)
- FPGA implementation and analysis of random delay insertion countermeasure against DPA (2008) (46)
- Improved Reliability of FPGA-Based PUF Identification Generator Design (2017) (44)
- Single-Chip FPGA Implementation of the Advanced Encryption Standard Algorithm (2001) (43)
- Optimized Schoolbook Polynomial Multiplication for Compact Lattice-Based Cryptography on FPGA (2019) (42)
- FPGA Montgomery multiplier architectures - a comparison (2004) (42)
- XOR-Based Low-Cost Reconfigurable PUFs for IoT Security (2019) (38)
- Low-cost digital signature architecture suitable for radio frequency identification tags (2010) (38)
- Accelerating Fully Homomorphic Encryption over the Integers with Super-size Hardware Multiplier and Modular Reduction (2013) (37)
- Lattice-based encryption over standard lattices in hardware (2016) (37)
- High-Speed Fully Homomorphic Encryption Over the Integers (2014) (37)
- High-radix systolic modular multiplication on reconfigurable hardware (2005) (37)
- Design and Analysis of Inexact Floating-Point Adders (2016) (36)
- Evaluation of Large Integer Multiplication Methods on Hardware (2017) (35)
- Differential Power Analysis of CAST-128 (2010) (32)
- Ultra-compact and robust FPGA-based PUF identification generator (2015) (31)
- Design and Analysis of Majority Logic-Based Approximate Adders and Multipliers (2019) (31)
- Design of quantum-dot cellular automata circuits using cut-set retiming (2011) (31)
- Low-cost configurable ring oscillator PUF with improved uniqueness (2016) (30)
- Optimised Multiplication Architectures for Accelerating Fully Homomorphic Encryption (2016) (28)
- Cost-efficient decimal adder design in Quantum-dot cellular automata (2012) (27)
- Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE (2013) (27)
- Data Compression Device Based on Modified LZ4 Algorithm (2018) (27)
- RO PUF design in FPGAs with new comparison strategies (2015) (26)
- A Modeling Attack Resistant Deception Technique for Securing Lightweight-PUF-Based Authentication (2020) (25)
- A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation (2019) (24)
- A Hardware Wrapper for the SHA-3 Hash Algorithms (2010) (24)
- New Architectures for Low-Cost Public Key Cryptography on RFID Tags (2007) (23)
- Optimized Modular Multiplication for Supersingular Isogeny Diffie-Hellman (2019) (23)
- XOR gate based low-cost configurable RO PUF (2017) (23)
- Random clock against differential power analysis (2010) (22)
- An Efficient and Parallel R-LWE Cryptoprocessor (2020) (21)
- Ten years of hardware Trojans: a survey from the attacker's perspective (2020) (21)
- QCA Systolic Matrix Multiplier (2010) (20)
- The improved sign bit encryption of motion vectors for H.264/AVC (2012) (20)
- A unique and robust single slice FPGA identification generator (2014) (20)
- Ultra-Lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design (2018) (19)
- Ultra-lightweight true random number generators (2010) (19)
- High-speed hardware architectures of the Whirlpool hash function (2005) (19)
- Novel lightweight FF-APUF design for FPGA (2016) (19)
- An Adaptable And Scalable Asymmetric Cryptographic Processor (2006) (18)
- Evaluation of Random Delay Insertion against DPA on FPGAs (2010) (18)
- A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication (2019) (17)
- Lattice-based cryptography: From reconfigurable hardware to ASIC (2016) (17)
- FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p) (2004) (17)
- Inexact floating-point adder for dynamic image processing (2014) (17)
- Coarsely integrated operand scanning (CIOS) architecture for high-speed Montgomery modular multiplication (2004) (16)
- Lattice-based Cryptography for IoT in A Quantum World: Are We Ready? (2019) (15)
- WLAN security processor (2006) (15)
- Design of Majority Logic (ML) Based Approximate Full Adders (2018) (15)
- A Compact SHA-256 Architecture for RFID Tags (2011) (15)
- Accelerating integer-based fully homomorphic encryption using Comba multiplication (2014) (15)
- Time-independent discrete Gaussian sampling for post-quantum cryptography (2016) (14)
- High Performance Modular Multiplication for SIDH (2020) (14)
- Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography (2018) (14)
- Security in Approximate Computing and Approximate Computing for Security: Challenges and Opportunities (2020) (14)
- FPGA-based strong PUF with increased uniqueness and entropy properties (2017) (13)
- Cryptography and Coding (2017) (13)
- Application-oriented SHA-256 hardware design for low-cost RFID (2012) (13)
- A large-scale comprehensive evaluation of single-slice ring oscillator and PicoPUF bit cells on 28-nm Xilinx FPGAs (2019) (13)
- F-HB: An Efficient Forward Private Protocol (2011) (13)
- Approximate Computing and Its Application to Hardware Security (2018) (13)
- An Improved Automatic Hardware Trojan Generation Platform (2019) (12)
- Security of AES Sbox designs to power analysis (2010) (12)
- Montgomery modular multiplier design in quantum-dot cellular automata using cut-set retiming (2010) (12)
- Physical Protection of Lattice-Based Cryptography: Challenges and Solutions (2018) (11)
- Privacy region protection for H.264/AVC with enhanced scrambling effect and a low bitrate overhead (2015) (11)
- Compact and provably secure lattice-based signatures in hardware (2017) (11)
- BEARZ Attack FALCON: Implementation Attacks with Countermeasures on the FALCON signature scheme (2019) (11)
- Plaintext: A Missing Feature for Enhancing the Power of Deep Learning in Side-Channel Analysis? Breaking multiple layers of side-channel countermeasures (2020) (10)
- A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations (2019) (10)
- Empirical evaluation of multi-device profiling side-channel attacks (2014) (10)
- Lightweight Modeling Attack-Resistant Multiplexer-Based Multi-PUF (MMPUF) Design on FPGA (2020) (9)
- Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography (2018) (9)
- Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs (2018) (9)
- On Foundation and Construction of Physical Unclonable Functions (2010) (9)
- A Novel Feature Extraction Strategy for Hardware Trojan Detection (2020) (9)
- MONET Special Issue on Next Generation Hardware Architectures for Secure Mobile Computing (2007) (8)
- Fast DRAM PUFs on Commodity Devices (2020) (8)
- Partial encryption by randomized zig-zag scanning for video encoding (2013) (8)
- Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3 (2020) (8)
- A review of QCA adders and metrics (2012) (8)
- Ultra High-Speed Polynomial Multiplications for Lattice-Based Cryptography on FPGAs (2022) (8)
- Differential Power Analysis of a SHACAL-2 hardware implementation (2008) (8)
- Design and Optimization of Modular Multiplication for SIDH (2018) (8)
- Limitations of existing wireless networks authentication and key management techniques for MANETs (2006) (8)
- A Dynamically Configurable PUF and Dynamic Matching Authentication Protocol (2021) (7)
- Practical comparison of differential power analysis techniques on an ASIC implementation of the AES algorithm (2009) (7)
- A High-Performance SIKE Hardware Accelerator (2022) (7)
- Adaptive binary mask for privacy region protection (2012) (7)
- Very High Speed 17 Gbps SHACAL Encryption Architecture (2003) (7)
- Privacy region protection for H.264/AVC by encrypting the intra prediction modes without drift error in I frames (2013) (7)
- High-speed & Low Area Hardware Architectures of the Whirlpool Hash Function (2007) (6)
- On the Security of Balanced Encoding Countermeasures (2015) (6)
- Secure architectures of future emerging cryptography SAFEcrypto (2016) (6)
- Is the differential frequency-based attack effective against random delay insertion? (2009) (6)
- Performance Analysis of Novel Randomly Shifted Certification Authority Authentication Protocol for MANETs (2007) (6)
- A novel common control channel security framework for cognitive radio networks (2012) (6)
- A Reconfigurable Memory PUF Based on Tristate Inverter Arrays (2016) (5)
- Theoretical Analysis of Delay-Based PUFs and Design Strategies for Improvement (2019) (5)
- A high-speed, low latency RSA decryption silicon core (2003) (5)
- Programmable Ring Oscillator PUF Based on Switch Matrix (2020) (5)
- Pre-processing power traces to defeat random clocking countermeasures (2015) (5)
- Self-Timed Physically Unclonable Functions (2012) (5)
- Security Analysis of Hardware Trojans on Approximate Circuits (2020) (5)
- AxRLWE: A Multilevel Approximate Ring-LWE Co-Processor for Lightweight IoT Applications (2022) (5)
- How Resistant are Sboxes to Power Analysis Attacks? (2011) (4)
- A tunable selective encryption scheme for H.264/AVC (2013) (4)
- Lightweight DPA resistant solution on FPGA to counteract power models (2010) (4)
- Security Issues in QCA Circuit Design - Power Analysis Attacks (2014) (4)
- Improving RO PUF design using frequency distribution characteristics (2015) (4)
- Differential Power Analysis resistance of Camellia and countermeasure strategy on FPGAs (2009) (4)
- Variable window power spectral density attack (2011) (4)
- Pre-processing power traces with a phase-sensitive detector (2013) (3)
- A Dynamic Highly Reliable SRAM-Based PUF Retaining Memory Function (2021) (3)
- Introduction for Embedded Platforms for Cryptography in the Coming Decade (2015) (3)
- ASIC evaluation of ECHO hash function (2009) (3)
- Lightweight Configurable Ring Oscillator PUF Based on RRAM/CMOS Hybrid Circuits (2020) (3)
- GLITCH: A Discrete Gaussian Testing Suite for Lattice-based Cryptography (2017) (3)
- DTA-PUF: Dynamic Timing-aware Physical Unclonable Function for Resource-constrained Devices (2021) (3)
- High-Performance Systolic Array Montgomery Multiplier for SIKE (2021) (3)
- Power Spectral Density Side Channel Attack Overlapping Window Method (2011) (3)
- Attacking Arbiter PUFs Using Various Modeling Attack Algorithms: A Comparative Study (2018) (3)
- Towards CRYSTALS-Kyber: A M-LWE Cryptoprocessor with Area-Time Trade-Off (2021) (3)
- SEED masking implementations against power analysis attacks (2010) (2)
- Quantum-safe HIBE: does it cost a Latte? (2021) (2)
- Security Analysis on RFID Mutual Authentication Protocol (2015) (2)
- Reconfigurable instruction interface architecture for private-key cryptography on the Altera Nios-II processor (2005) (2)
- F-HB+: A Scalable Authentication Protocol for Low-Cost RFID Systems (2011) (2)
- Bit erasure analysis of binary adders in Quantum-dot Cellular Automata (2014) (2)
- Power analysis attack of QCA circuits: A case study of the Serpent cipher (2013) (2)
- Live demonstration: An automatic evaluation platform for physical unclonable function test (2016) (1)
- Design and analysis of hardware Trojans in approximate circuits (2021) (1)
- Plaintext: A Missing Feature for Enhancing the Power of DL in SCA? (2020) (1)
- A High Performance SIKE Accelerator With High Frequency and Low Area-Time Product (2022) (1)
- New FMO type to flag ROI in H.264/AVC (2014) (1)
- Error Samplers for Lattice-Based Cryptography -Challenges, Vulnerabilities and Solutions (2018) (1)
- 2 Quantum-dot Cellular Automata (2013) (1)
- Efficient Pipelining Exploration for A High-performance CRYSTALS-Kyber Accelerator (2022) (1)
- A high-speed key exchange multi-core SoC architecture for IPSec real-time Internet traffic (2010) (1)
- Can leakage models be more efficient? non-linear models in side channel attacks (2014) (1)
- Multi-Incentive Delay-Based (MID) PUF (2019) (1)
- Deep Learning-Based Hardware Trojan Detection With Block-Based Netlist Information Extraction (2022) (1)
- A Secure Algorithm for Rounded Gaussian Sampling (2020) (0)
- Guest Editorial: New Frontiers in Signal Processing Applications and Embedded Processing Technologies (2016) (0)
- B EARZ Attack F ALCON : Implementation Attacks with Countermeasures on the F ALCON signature scheme (2019) (0)
- Identity Based Public Key Exchange (IDPKE) for Wireless Ad Hoc Networks (2007) (0)
- An Efficient Ring Oscillator PUF Using Programmable Delay Units on FPGA (2023) (0)
- A Private and Scalable Authentication for RFID Systems Using Reasonable Storage (2011) (0)
- Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware (2022) (0)
- Exploring technology related design-space limitations of high performance network processing (2007) (0)
- High Performance FPGA-based Post Quantum Cryptography Implementations (2022) (0)
- A forward private protocol based on PRNG and LPN for low-cost RFID (2011) (0)
- Addressing Side-Channel Vulnerabilities in the Discrete Ziggurat Sampler (2018) (0)
- WLAN Security Processing Architectures (2007) (0)
- Generic silicon architectures for encryption algorithm (2002) (0)
- Guest Editorial: New Frontiers in Signal Processing Applications and Embedded Processing Technologies (2016) (0)
- Samplers for Lattice-Based Cryptography-Challenges, Vulnerabilities Solutions. (2018) (0)
- A Generic Dynamic Responding Mechanism and Secure Authentication Protocol for Strong PUFs (2022) (0)
- Scaling Modular Exponentiation Hardware to the Minimum (2012) (0)
- Editorial Special Issue on Circuits and Systems for Emerging Computing Paradigms (2021) (0)
- Investigation into Hardware/Software Partitioning within the IKE-V2 System (2007) (0)
- Security for Approximate Computing, Approximate Computing for Security (2020) (0)
- An Improved Second-Order Power Analysis Attack Based on a New Refined Expecter - - Case Study on Protected AES - (2015) (0)
- Guest Editorial: Introduction to the Special Issue on Emerging Technologies and Designs for Application-Specific Computing (2017) (0)
- Better Security Estimates for Approximate, IoT-Friendly R-LWE Cryptosystems (2022) (0)
- Security Vulnerabilities and Countermeasures for Approximate Circuits (2022) (0)
- HPMA-NTRU: High-Performance Polynomial Multiplication Accelerator for NTRU (2022) (0)
- Lightweight cryptographic identity solutions for the Internet of Things (2016) (0)
- Guest Editorial: Cryptography algorithms and architectures for System-on-Chip (2005) (0)
- Stacked Ensemble Model for Enhancing the DL based SCA (2022) (0)
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