Margaret Martonosi

Margaret Martonosi's AcademicInfluence.com Rankings

Margaret Martonosi

Computer Science

#1781

World Rank

#1846

Historical Rank

#849

USA Rank

Computer Architecture

World Rank

Historical Rank

USA Rank

Parallel Computing

#22

World Rank

#22

Historical Rank

#19

USA Rank

Database

#2041

World Rank

#2145

Historical Rank

#483

USA Rank

computer-science Degrees

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Computer Science

Margaret Martonosi's Degrees

PhD Electrical Engineering and Computer Science Stanford University
Masters Electrical Engineering and Computer Science Stanford University
Bachelors Electrical Engineering and Computer Science Cornell University

Why Is Margaret Martonosi Influential?

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According to Wikipedia, Margaret Martonosi is an American computer scientist who is currently the Hugh Trumbull Adams '35 Professor of Computer Science at Princeton University. Martonosi is noted for her research in computer architecture and mobile computing with a particular focus on power-efficiency.

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Margaret Martonosi's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Wattch: a framework for architectural-level power analysis and optimizations (2000) (3008)
Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet (2002) (2296)
Dynamic thermal management for high-performance microprocessors (2001) (874)
Cache decay: exploiting generational behavior to reduce cache leakage power (2001) (763)
An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget (2006) (653)
Runtime power monitoring in high-end processors: methodology and empirical data (2003) (630)
Hardware design experiences in ZebraNet (2004) (627)
Techniques for Multicore Thermal Management: Classification and New Exploration (2006) (534)
Erasure-coding based routing for opportunistic networks (2005) (514)
Data compression algorithms for energy-constrained devices in delay tolerant networks (2006) (468)
Impala: a middleware system for managing autonomic, parallel sensor systems (2003) (435)
Identifying Important Places in People's Lives from Cellular Network Data (2011) (414)
SignalGuru: leveraging mobile phones for collaborative traffic signal schedule advisory (2011) (394)
Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management (2006) (315)
Dynamically exploiting narrow width operands to improve processor power and performance (1999) (311)
Human mobility characterization from cellular network data (2013) (305)
Human mobility modeling at metropolitan scales (2012) (301)
Cache miss equations: a compiler framework for analyzing and tuning memory behavior (1999) (300)
Run-time power estimation in high performance microprocessors (2001) (298)
Power prediction for Intel XScale/spl reg/ processors using performance monitoring unit events (2005) (283)
Noise-Adaptive Compiler Mappings for Noisy Intermediate-Scale Quantum Computers (2019) (263)
Power prediction for Intel XScale processors using performance monitoring unit events (2005) (260)
Implementing software on resource-constrained mobile sensors: experiences with Impala and ZebraNet (2004) (256)
Graphicionado: A high-performance and energy-efficient accelerator for graph analytics (2016) (256)
Computer Architecture Techniques for Power-Efficiency (2008) (237)
SHiP: Signature-based Hit Predictor for high performance caching (2011) (229)
A dynamic compilation framework for controlling microprocessor energy and performance (2005) (224)
Cache miss equations: an analytical representation of cache misses (1997) (224)
Formal online methods for voltage/frequency control in multiple clock domain microprocessors (2004) (194)
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors (2009) (191)
MemSpy: analyzing memory system bottlenecks in programs (1992) (187)
Capping the brown energy consumption of Internet services at low cost (2010) (175)
Timekeeping in the memory system: predicting and optimizing memory behavior (2002) (172)
Compile-time dynamic voltage scaling settings: opportunities and limits (2003) (156)
Software Mitigation of Crosstalk on Noisy Intermediate-Scale Quantum Computers (2019) (155)
Programming languages and compiler design for realistic quantum hardware (2017) (155)
MRPB: Memory request prioritization for massively parallel processors (2014) (154)
Cost-and Energy-Aware Load Distribution Across Data Centers (2009) (154)
Characterizing and improving the use of demand-fetched caches in GPUs (2012) (147)
Control techniques to eliminate voltage emergencies in high performance processors (2003) (144)
ScaffCC: a framework for compilation and analysis of quantum computing programs (2014) (141)
Shared last-level TLBs for chip multiprocessors (2011) (139)
Location-based trust for mobile user-generated content: applications, challenges and implementations (2008) (138)
Precise miss analysis for program transformations with caches of arbitrary associativity (1998) (132)
Static Timing Analysis Of Embedded Software (1997) (125)
Characterizing and improving the performance of Intel Threading Building Blocks (2008) (125)
DP-WHERE: Differentially private modeling of human mobility (2013) (125)
Challenges in Computer Architecture Evaluation (2003) (124)
Full-Stack, Real-System Quantum Computer Studies: Architectural Comparisons and Design Insights (2019) (121)
Phase characterization for power: evaluating control-flow-based and event-counter-based techniques (2006) (120)
ScaffCC: Scalable compilation and analysis of quantum programs (2015) (116)
Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques (1999) (112)
Reducing GPU offload latency via fine-grained CPU-GPU synchronization (2013) (112)
Formal control techniques for power-performance management (2005) (109)
PACMan: Prefetch-Aware Cache Management for high performance caching (2011) (109)
XTREM: a power simulator for the Intel XScale® core (2004) (107)
Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors (2009) (102)
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors (1996) (101)
TCP: tag correlating prefetchers (2003) (99)
Stargazer: Automated regression-based GPU design space exploration (2012) (99)
Minimizing State Preparations in Variational Quantum Eigensolver by Partitioning into Commuting Families (2019) (98)
Coordinated, distributed, formal energy management of chip multiprocessors (2005) (98)
Predicting link quality using supervised learning in wireless sensor networks (2007) (96)
Leveraging Smartphone Cameras for Collaborative Road Advisories (2012) (93)
Accelerating Pipelined Integer and Floating-Point Accumulations in Configurable Hardware with Delayed Addition Techniques (2000) (92)
Managing the cost, energy consumption, and carbon footprint of internet services (2010) (90)
Long-term workload phases: duration predictions and applications to DVFS (2005) (89)
Realizing the potential of data science (2018) (87)
Accelerating Boolean satisfiability with configurable hardware (1998) (87)
Inter-core cooperative TLB for chip multiprocessors (2010) (86)
Improving prediction for procedure returns with return-address-stack repair mechanisms (1998) (84)
Voltage and frequency control with adaptive reaction time in multiple-clock-domain processors (2005) (83)
Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance (2000) (83)
Identifying program power phase behavior using power vectors (2003) (80)
Ranges of human mobility in Los Angeles and New York (2011) (79)
Statistical Assertions for Validating Patterns and Finding Bugs in Quantum Programs (2019) (78)
LOCALE: Collaborative Localization Estimation for Sparse Mobile Sensor Networks (2008) (74)
Power Efficiency for Variation-Tolerant Multicore Processors (2006) (71)
TLB Improvements for Chip Multiprocessors: Inter-Core Cooperative Prefetchers and Shared Last-Level TLBs (2013) (69)
MeltdownPrime and SpectrePrime: Automatically-Synthesized Attacks Exploiting Invalidation-Based Coherence Protocols (2018) (62)
CutQC: using small Quantum computers for large Quantum circuit evaluations (2020) (62)
Using reconfigurable computing techniques to accelerate problems in the CAD domain: a case study with Boolean satisfiability (1998) (59)
Tuning Memory Performance of Sequential and Parallel Programs (1995) (59)
Using configurable computing to accelerate Boolean satisfiability (1999) (58)
Effectiveness of trace sampling for performance debugging tools (1993) (57)
PipeCheck: Specifying and Verifying Microarchitectural Enforcement of Memory Consistency Models (2014) (57)
Let caches decay: reducing leakage energy via exploitation of cache generational behavior (2002) (56)
$O(N^3)$ Measurement Cost for Variational Quantum Eigensolver on Molecular Hamiltonians (2019) (56)
Next Steps in Quantum Computing: Computer Science's Role (2019) (54)
Integrating performance monitoring and communication in parallel computers (1996) (54)
Characterization and dynamic mitigation of intra-application cache interference (2011) (54)
Proceedings of the 6th ACM conference on Embedded network sensor systems (2008) (54)
Multipath execution: opportunities and limits (1998) (54)
Trends in Shared Memory Multiprocessing (1997) (54)
Design choices in the SHRIMP system: an empirical study (1998) (53)
Experience with an adaptive globally-synchronizing clock algorithm (1999) (52)
Reducing Register File Power Consumption by Exploiting Value Lifetime Characteristics (2000) (50)
Temperature-Aware Design Issues for SMT and CMP Architectures (2004) (50)
Compiler Management of Communication and Parallelism for Quantum Computation (2015) (50)
DeSC: Decoupled supply-compute communication management for heterogeneous architectures (2015) (50)
Full-system chip multiprocessor power evaluations using FPGA-based emulation (2008) (49)
An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation (2006) (49)
COATCheck: Verifying Memory Ordering at the Hardware-OS Interface (2016) (47)
TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA (2016) (46)
Intraprogram dynamic voltage scaling: Bounding opportunities with analytic modeling (2004) (46)
CheckMate: Automated Synthesis of Hardware Exploits and Security Litmus Tests (2018) (46)
Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance (2006) (45)
Solving Boolean Satisfiability with Dynamic Hardware Configurations (1998) (44)
Applying decay strategies to branch predictors for leakage energy savings (2002) (43)
Optimized Surface Code Communication in Superconducting Quantum Computers (2017) (43)
Bounds on power savings using runtime dynamic voltage scaling: an exact algorithm and a linear-time heuristic approximation (2005) (42)
A supervised learning approach for routing optimizations in wireless sensor networks (2006) (42)
Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor (2000) (41)
Speculative Updates of Local and Global Branch History: A Quantitative Analysis (2000) (41)
Hardware-modulated parallelism in chip multiprocessors (2005) (37)
Starchart: Hardware and software optimization using recursive partitioning regression trees (2013) (37)
SupermarQ: A Scalable Quantum Benchmark Suite (2022) (37)
Managing leakage for transient data: decay and quasi-static 4T memory cells (2002) (36)
Live, Runtime Power Measurements as a Foundation for Evaluating Power/Performance Tradeoffs (2001) (36)
Distributed rating prediction in user generated content streams (2011) (36)
ArMOR: Defending against memory consistency model mismatches in heterogeneous architectures (2015) (36)
CCICheck: Using μhb graphs to verify the coherence-consistency interface (2015) (34)
Embedded systems in the wild: ZebraNet software, hardware, and deployment experiences (2006) (34)
Architecting Noisy Intermediate-Scale Trapped Ion Quantum Computers (2020) (33)
Informing memory operations: memory performance feedback mechanisms and their applications (1998) (32)
The XTREM power and performance simulator for the Intel XScale core: Design and experiences (2007) (32)
QDB: From Quantum Algorithms Towards Correct Quantum Programs (2018) (30)
A taxonomy of branch mispredictions, and alloyed prediction as a robust solution to wrong-history mispredictions (2000) (30)
Adaptive parallelism in compiler‐parallelized code (1998) (30)
Extracting useful computation from error-prone processors for streaming applications (2013) (30)
Adaptive parallelism in compiler-parallelized code (1998) (29)
Wavelet analysis for microprocessor design: experiences with wavelet-based dI/dt characterization (2004) (28)
Adaptive timekeeping replacement: Fine-grained capacity management for shared CMP caches (2011) (28)
Power-Efficient Computer Architectures: Recent Advances (2014) (27)
Efficient behavior-driven runtime dynamic voltage scaling policies (2005) (27)
Inter-Core Cooperative TLB Prefetchers for Chip Multiprocessors (2010) (27)
Performance monitoring in a Myrinet-connected SHRIMP cluster (1998) (27)
FPGA-based SAT solver architecture with near-zero synthesis and layout overhead (2000) (26)
Potential for collaborative caching and prefetching in largely-disconnected villages (2008) (25)
Parallelization libraries: Characterizing and reducing overheads (2011) (25)
Tradeoffs in Message Passing and Shared Memory Implementations of a Standard Cell Router (1989) (25)
Automated cache optimizations using CME driven diagnosis (2000) (25)
Adaptive usage of cellular and WiFi bandwidth: an optimal scheduling formulation (2012) (24)
The SHRIMP performance monitor: design and applications (1996) (24)
Limits and Graph Structure of Available Instruction-Level Parallelism (Research Note) (2000) (23)
Evaluating the impact of advanced memory systems on compiler-parallelized codes (1995) (23)
Formal Constraint-based Compilation for Noisy Intermediate-Scale Quantum Systems (2019) (23)
Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings (2016) (23)
The C-LINK System for Collaborative Web Usage: A Real-World Deployment in Rural Nicaragua (2009) (23)
Magic-State Functional Units: Mapping and Scheduling Multi-Level Distillation Circuits for Fault-Tolerant Quantum Architectures (2018) (23)
Low-infrastructure methods to improve internet access for mobile users in emerging regions (2011) (22)
Characterizing the Memory Behavior of Compiler-Parallelized Applications (1996) (20)
RTLCheck: Verifying the Memory Consistency of RTL Designs (2017) (20)
A Comparison of Capacity Management Schemes for Shared CMP Caches (2008) (19)
Transport layer approaches for improving idle energy in challenged sensor networks (2006) (18)
Detecting recurrent phase behavior under real-system variability (2005) (18)
Dynamic adaptive techniques for learning application delay tolerance for mobile data offloading (2015) (18)
A new scheme on link quality prediction and its applications to metric-based routing (2005) (18)
Exploring the Potential of CMP Core Count Management on Data Center Energy Savings (2011) (18)
Term Grouping and Travelling Salesperson for Digital Quantum Simulation (2020) (17)
Implementing branch-predictor decay using quasi-static memory cells (2004) (17)
CommGuard: Mitigating Communication Errors in Error-Prone Parallel Execution (2015) (16)
Resource-Efficient Quantum Computing by Breaking Abstractions (2020) (16)
Tailoring quantum architectures to implementation style: a quantum computer for mobile and persistent qubits (2007) (16)
Monitoring shared virtual memory performance on a Myrinet-based PC cluster (1998) (15)
EPROF: An energy/performance/reliability optimization framework for streaming applications (2012) (15)
Dali: a communication-centric data abstraction layer for energy-constrained devices in mobile sensor networks (2007) (15)
Power-performance simulation: design and validation strategies (2004) (15)
RegReS: Adaptively maintaining a target density of regional services in opportunistic vehicular networks (2011) (15)
SQUARE: Strategic Quantum Ancilla Reuse for Modular Quantum Programs via Cost-Effective Uncomputation (2020) (15)
Selecting a Single, Representative Sample for Accurate Simulation of SPECint Benchmarks (1999) (15)
Designing Calibration and Expressivity-Efficient Instruction Sets for Quantum Computing (2021) (14)
Repeatable and Realistic Experimentation in Mobile Wireless Networks (2009) (14)
Security Verification via Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach (2019) (13)
Analyzing and tuning memory performance in sequential and parallel programs (1994) (13)
GPU Performance and Power Tuning Using Regression Trees (2015) (13)
SARANA: language, compiler and run-time system support for spatially aware and resource-aware mobile computing (2008) (13)
Spectral analysis for characterizing program power and performance (2004) (12)
Informing Loads: Enabling Software to Observe and React to Memory Behavior (1995) (12)
Architecting Noisy Intermediate-Scale Quantum Computers: A Real-System Study (2020) (11)
Optimization of Simultaneous Measurement for Variational Quantum Eigensolver Applications (2020) (11)
PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications (2018) (10)
Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous Architectures (2017) (9)
Supervised Learning in Sensor Networks: New Approaches with Routing, Reliability Optimizations (2006) (9)
On Availability of Bit-Narrow Operations in General-Purpose Applications (2000) (9)
SurfBoard - A Hardware Performance Monitor for SHRIMP (1999) (8)
Timekeeping techniques for predicting and optimizing memory behavior (2003) (8)
Logical abstractions for noisy variational Quantum algorithm simulation (2021) (8)
Alloyed Global and Local Branch History : A Robust Solution to Wrong-History Mispredictions (1999) (7)
Optimizing the use of request distribution and stored energy for cost reduction in multi-site internet services (2012) (7)
A Mathematical Cache Miss Analysis for Pointer Data Structures (2001) (7)
Augmenting Modern Superscalar Architectures with Configurable Extended Instructions (2000) (7)
Deterministic error model for quantum computer simulation (2007) (7)
Report for the NSF Workshop on Cross ‐ layer Power Optimization and Management (2012) (7)
Characterizing the performance effect of trials and rotations in applications that use Quantum Phase Estimation (2014) (7)
Improving Cache Power EÆciency with an Asymmetric Set-Associative Cache (2001) (7)
ILA-MCM: Integrating Memory Consistency Models with Instruction-Level Abstractions for Heterogeneous System-on-Chip Verification (2018) (7)
MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems (2020) (7)
Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers (2011) (7)
Resource optimized quantum architectures for surface code implementations of magic-state distillation (2019) (7)
Adaptive delay-tolerant scheduling for efficient cellular and WiFi usage (2014) (7)
Efficient Data Supply for Parallel Heterogeneous Architectures (2019) (6)
Improving Power Efficiency with an Asymmetric Set-Associative Cache (2004) (6)
An edge-endpoint-based configurable hardware architecture for VLSI CAD layout design rule checking (1999) (6)
Quantum Codesign (2021) (6)
MARio: mobility-adaptive routing using route lifetime abstractions in mobile ad hoc networks (2004) (6)
Middleware for long-term deployment of delay-tolerant sensor networks (2006) (6)
Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems (2002) (6)
Techniques for Real-System Characterization of Java Virtual Machine Energy and Power Behavior (2006) (6)
Implementing Boolean Satisfiability in Configurable Hardware (1997) (6)
GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures (2021) (5)
Solving Boolean Satissability with Dynamic Hardware Conngurations (1998) (5)
! ! CheckMate : Automated Exploit Program Generation for Hardware Security Verification (2018) (5)
A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration (2020) (5)
Keynotes: Internet of Things: History and hype, technology and policy (2016) (5)
NSF Computer Performance Evaluation Workshop: Summary and Action Items (2002) (5)
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems (2006) (5)
Workshop on Advancing Computer Architecture Research ( ACAR-II ) Laying a New Foundation for IT : Computer Architecture for 2025 and Beyond (2011) (5)
Energy adaptation techniques to optimize data delivery in store-and-forward sensor networks (2006) (5)
Implementing Decay Techniques using 4T Quasi-Static Memory Cells (2002) (5)
Tiny but mighty: designing and realizing scalable latency tolerance for manycore SoCs (2022) (5)
Alloying Global and Local Branch History: Taxonomy, Performance, and Analysis (1999) (4)
of in performance the (2004) (4)
Using Recon gurable Computing Techniques to Accelerate Problems in the CAD Domain : A Case Study with Boolean Satis ability (1998) (4)
Verifying Correct Microarchitectural Enforcement of Memory Consistency Models (2015) (4)
CA-TSL: Energy Adaptation for Targeted System Lifetime in Sparse Mobile Ad Hoc Networks (2010) (4)
Situation-Aware Caching Strategies in Highly Varying Mobile Networks (2006) (4)
Contention and Queueing in an Experimental Multicomputer: Analytical and Simulation-based Results (1996) (4)
An updated LLVM-based quantum research compiler with further OpenQASM support (2020) (4)
Concurrent predicates: a debugging technique for every parallel programmer (2013) (4)
Use of delayed addition techniques to accelerate integer and floating-point calculations in configurable hardware (1998) (4)
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware (1999) (4)
ScaleQC: A Scalable Framework for Hybrid Computation on Quantum and Classical Processors (2022) (4)
Architectures for Multinode Superconducting Quantum Computers (2022) (4)
OKAPI: In Support of Application Correctness in Smart Home Environments (2019) (3)
Exploring the Trisection of Software, Hardware, and ISA in Memory Model Design (2016) (3)
Full-Stack Memory Model Verification with TriCheck (2018) (3)
Adaptive spatiotemporal node selection in dynamic networks (2010) (3)
Specifying and testing GPU workgroup progress models (2021) (3)
Locomotive: Optimizing mobile web traffic using selective compression (2017) (3)
MOBILE SENSING: Retrospectives and Trends (2016) (3)
Potential for Quantum Computing (2019) (3)
Optimized Quantum Program Execution Ordering to Mitigate Errors in Simulations of Quantum Systems (2021) (3)
Accelerating Boolean Satis ability with Con gurable (1998) (3)
RealityCheck: Bringing Modularity, Hierarchy, and Abstraction to Automated Microarchitectural Memory Consistency Verification (2020) (2)
ZebraNet and beyond: applications and systems support for mobile, dynamic networks (2008) (2)
Using reconfigurable hardware to customize memory hierarchies (1996) (2)
PerpLE: Improving the Speed and Effectiveness of Memory Consistency Testing (2020) (2)
AutoSVA: Democratizing Formal Verification of RTL Module Interactions (2021) (2)
Graphfire: Synergizing Fetch, Insertion, and Replacement Policies for Graph Analytics (2023) (2)
Parallel Streaming Computation on Error-Prone Processors (2014) (2)
Transforming science through cyberinfrastructure (2022) (2)
Foundations of empirical memory consistency testing (2020) (2)
Transistency Models: Memory Ordering at the Hardware-OS Interface (2017) (2)
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (2009) (2)
Design and modeling of power-efficient computer architectures (2001) (2)
TransForm: Formally Specifying Transistency Models and Synthesizing Enhanced Litmus Tests (2020) (2)
Proceedings of the 4th Annual Symposium on Computing for Development (2013) (2)
The Implications of Page Size Management on Graph Analytics (2022) (1)
Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications (2022) (1)
Shared Memory versus Message Passing Architectures: An Application Based Study (1988) (1)
Characterization and cross-platform analysis of high-throughput accelerators (2015) (1)
Performance monitoring infrastructure in Shrimp multicomputers (1999) (1)
TriCheck (2017) (1)
Science, policy, and service (2018) (1)
New Metrics and Models for a Post-ISA Era: Managing Complexity and Scaling Performance in Heterogeneous Parallelism and Internet-of-Things (2018) (1)
Navigating the Seismic Shift of Post-Moore Computer Systems Design (2021) (1)
Boolean Satisfiability: Creating Solvers Optimized for Specific Problem Instances (2008) (1)
Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006 (2006) (1)
Toward systematic architectural design of near-term trapped ion quantum computers (2022) (1)
Cutting Quantum Circuits to Run on Quantum and Classical Platforms (2022) (1)
Optimizing IoT and Web Traffic Using Selective Edge Compression (2020) (0)
Session 1: Phase Behavior (2005) (0)
QDB: From Quantum Algorithms Towards Correct (2019) (0)
Distributed collaborative filtering over social networks (2011) (0)
Number 8 (2017) (0)
Broadening participation (2018) (0)
Massive Data-Centric Parallelism in the Chiplet Era (2023) (0)
Trapping Light for Quantum Computers (2019) (0)
AD-A 210 312 Shared Memory vs . Message Passing Architectures : D TIC An Application Based Study ELECTE (0)
A Combinatorial Noise Model for Quantum Computer Simulation (2007) (0)
2018 ACM SIGMOBILE ROCKSTAR AWARD: Kyle Jamieson, PRINCETON UNIVERSITY (2018) (0)
Session details: Special session II (2009) (0)
Architectural Design of Quantum Computers (2019) (0)
Power-Efficient Computer Architectures (2015) (0)
Cache Replacement Policies for Improving LLC Performance in Multi-Core Processors (2015) (0)
The MosaicSim Simulator (Full Technical Report) (2020) (0)
MARS : Portable Support for Community-Based Research Using Cellular Phones (2007) (0)
Using Conngurable Computing to Accelerate Boolean Satissability (1999) (0)
GraphAttack (2021) (0)
A configurable hardware/software system for design rule checking (2001) (0)
SPAA'21 Panel Paper: Architecture-Friendly Algorithms versus Algorithm-Friendly Architectures (2021) (0)
EduPar-20 Invited Panel (2020) (0)
Session details: Virtual caches and hierarchies (2007) (0)
2013 International Symposium on Computer Architecture Influential Paper Award (2014) (0)
PPU: A Control Error-Tolerant Processor for Streaming Applications with Formal Guarantees (2017) (0)
Term Grouping Techniques for VQE and Quantum Dynamics Circuits (2020) (0)
TriCheck (2017) (0)
Shared-memory multiprocessing: Current state and future directions (2000) (0)
Memory Referencing Behavior in Compiler-Parallelized Applications (1996) (0)
An adaptive globally-synchronizing clock algorithm and its implementation on a Myrinet-based PC cluster (1999) (0)
Proceedings of the 6th International Conference on Embedded Networked Sensor Systems, SenSys 2008, Raleigh, NC, USA, November 5-7, 2008 (2008) (0)
Pairing Software-Managed Caching with Decay Techniques to Balance Reliability and Static Power in Next-Generation Caches (2009) (0)
Tiling for Optimal Resource Utilization (2008) (0)
Margaret Martonosi, National Science Foundation (2022) (0)
42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA (2009) (0)
A Block Based Trace Cache Simulation (2002) (0)
New Metrics and Models for a Post-ISA Era: Managing Complexity and Scaling Performance in Heterogeneous Parallelism and Internet-of-Things (2019) (0)
Dynamic Adaptation in Server-Class Microprocessors : Workload Phase and Duration Predictions with Live Counter Measurements (2004) (0)
2016 Maurice Wilkes Award Given to Timothy Sherwood (2017) (0)
Thread criticality and tlb enhancement techniques for chip multiprocessors (2010) (0)
Keynote I: Parallelism, heterogeneity, communication: Emerging challenges for performance analysis (2012) (0)
Modeling the impact of human mobility: mobile devices as sensors and content vectors (2012) (0)
Emerging energy management techniques for chip multiprocessors (2006) (0)
2011 IEEE International Symposium on Performance Analysis of Systems and Software ISPASS 2011 (2011) (0)
Optimizing Memory Behavior (2003) (0)
PPU (2017) (0)
MARio (2004) (0)
Multidimensional Optical Tech (2019) (0)
Optimizing and bounding software-controlled dynamic voltage/frequency scaling: analysis for uniprocessors and multiprocessors (2006) (0)
Implementing Boolean Satis ability in Con gurable Hardware (1997) (0)
Architecting efficiency, performance, and scalability for quantum computers (2009) (0)
Operand-Value-Based Optimizations To Reduce Processor Power Consumption (2011) (0)

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