Massoud Pedram

Q: What Schools Are Affiliated With Massoud Pedram

Massoud Pedram is affiliated with the following schools: University of California, Berkeley, University of California, Santa Barbara, California Institute of Technology, University of Southern California, California South Bay University, University of Tehran

Massoud Pedram's AcademicInfluence.com Rankings

Massoud Pedram

Engineering

#1257

World Rank

#1892

Historical Rank

#497

USA Rank

Electrical Engineering

#215

World Rank

#247

Historical Rank

#95

USA Rank

engineering Degrees

Massoud Pedram

Computer Science

#2566

World Rank

#2680

Historical Rank

#1110

USA Rank

Computer Engineering

World Rank

Historical Rank

USA Rank

computer-science Degrees

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Engineering
Computer Science

Massoud Pedram's Degrees

PhD Electrical Engineering University of Southern California
Masters Electrical Engineering University of Southern California
Bachelors Electrical Engineering University of Tehran

Why Is Massoud Pedram Influential?

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According to Wikipedia, Massoud Pedram is an Iranian American computer engineer noted for his research in green computing, energy storage systems, low-power electronics and design, electronic design automation and quantum computing. In the early 1990s, Pedram pioneered an approach to designing VLSI circuits that considered physical effects during logic synthesis. He named this approach layout-driven logic synthesis, which was subsequently called physical synthesis and incorporated into the standard EDA design flows. Pedram's early work on this subject became a significant prior art reference in a litigation between Synopsys Inc. and Magma Design Automation.

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Massoud Pedram's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Low power design methodologies (1996) (871)
Power minimization in IC design: principles and applications (1996) (530)
Thermal Modeling, Analysis, and Management in VLSI Circuits: Principles and Methods (2006) (397)
Fine-grained dynamic voltage and frequency scaling for precise energy and performance trade-off based on the ratio of off-chip access to on-chip computation times (2004) (325)
High-level Power Modeling, Estimation, And Optimization (1997) (320)
Clock-gating and its application to low power design of sequential circuits (1997) (316)
Standby and Active Leakage Current Control and Minimization in CMOS VLSI Circuits (2005) (303)
Leakage current reduction in CMOS VLSI circuits by input vector control (2004) (299)
Power-aware source routing protocol for mobile ad hoc networks (2002) (289)
An analytical model for predicting the remaining battery capacity of lithium-ion batteries (2003) (249)
Multi-dimensional SLA-Based Resource Allocation for Multi-tier Cloud Computing Systems (2011) (244)
Power Aware Design Methodologies (2002) (240)
Dynamic power management based on continuous-time Markov decision processes (1999) (236)
Dynamic voltage and frequency scaling based on workload decomposition (2004) (224)
Minimizing data center cooling and server power costs (2009) (220)
Power minimization in a backlit TFT-LCD display by concurrent brightness and contrast scaling (2004) (208)
Modeling and analysis of nonuniform substrate temperature effects on global ULSI interconnects (2005) (205)
Register Allocation and Binding for Low Power (1995) (199)
Power conscious CAD tools and methodologies: a perspective (1995) (193)
Task Scheduling with Dynamic Voltage and Frequency Scaling for Energy Minimization in the Mobile Cloud Computing Environment (2015) (186)
Design considerations for battery-powered electronics (1999) (186)
Technology Decomposition and Mapping Targeting Low Power Dissipation (1993) (185)
Frame-based dynamic voltage and frequency scaling for a MPEG decoder (2002) (184)
Lifetime prediction routing in mobile ad hoc networks (2003) (182)
Energy Minimization Using Multiple Supply Voltages (1997) (173)
SLA-based Optimization of Power and Migration Cost in Cloud Computing (2012) (165)
Stochastic modeling of a power-managed system: construction and optimization (1999) (159)
JointDNN: An Efficient Training and Inference Engine for Intelligent Mobile Cloud Computing Services (2018) (157)
BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis (1993) (150)
Energy-Efficient Virtual Machine Replication and Placement in a Cloud Computing System (2012) (147)
Power estimation methods for sequential logic circuits (1995) (144)
Course of Modic 1 Six Months After Lumbar Posterior Osteosynthesis (2003) (141)
Efficient estimation of dynamic power consumption under a real delay model (1993) (140)
Dual-Quality 4:2 Compressors for Utilizing in Dynamic Accuracy Configurable Multipliers (2017) (138)
EVBDD-based algorithms for integer linear programming, spectral transformation, and function decomposition (1994) (136)
Low Power State Assignment Targeting Two- And Multi-level Logic Implementations (1994) (135)
Energy-Efficient Datacenters (2012) (133)
Switching Activity Analysis Considering Spatioternporal Correlations (1994) (132)
Adaptive Control for Energy Storage Systems in Households With Photovoltaic Modules (2014) (131)
Layout driven technology mapping (1991) (130)
Energy Minimization Using Multiple Supply Voltages (1996) (126)
RoBA Multiplier: A Rounding-Based Approximate Multiplier for High-Speed yet Energy-Efficient Digital Signal Processing (2017) (121)
A new design of double edge triggered flip-flops (1998) (121)
Accurate Modeling of the Delay and Energy Overhead of Dynamic Voltage and Frequency Scaling in Modern Microprocessors (2013) (120)
RAP-CLA: A Reconfigurable Approximate Carry Look-Ahead Adder (2018) (120)
Hybrid electrical energy storage systems (2010) (116)
Exact and Approximate Methods for Calculating Signal and Transition Probabilities in FSMs (1994) (113)
Ground bounce in digital VLSI circuits (2003) (112)
Battery-supercapacitor hybrid system for high-rate pulsed load applications (2011) (112)
Optimization of quantum circuits for interaction distance in linear nearest neighbor architectures (2013) (111)
Supervised Learning Based Power Management for Multicore Processors (2010) (110)
Gated clock routing for low-power microprocessor design (2001) (109)
Temperature-aware dynamic resource provisioning in a power-optimized datacenter (2010) (107)
Efficient Power Estimation for Highly Correlated Input Streams (1995) (107)
Accurate modeling and calculation of delay and energy overheads of dynamic voltage scaling in modern high-performance microprocessors (2010) (106)
Probabilistic error propagation in logic circuits using the Boolean difference calculus (2008) (104)
OBDD-based function decomposition: algorithms and implementation (1996) (104)
Energy Minimization Using Multiple Supply Voltages (1997) (102)
Qubit placement to minimize communication overhead in 2D quantum architectures (2014) (101)
An analytical model for predicting the remaining battery capacity of lithium-ion batteries (2003) (100)
Dynamic voltage scaling of OLED displays (2011) (99)
Cycle-accurate macro-models for RT-level power analysis (1997) (99)
Extending the lifetime of a network of battery-powered mobile devices by remote processing: a Markovian decision-based approach (2003) (97)
Power punch: Towards non-blocking power-gating of NoC routers (2015) (96)
Architectures for silicon nanoelectronics and beyond (2007) (94)
BottleNet: A Deep Learning Architecture for Intelligent Mobile Cloud Computing Services (2019) (92)
Probabilistic modeling of dependencies during switching activity analysis (1998) (92)
Maximizing Profit in Cloud Computing System via Resource Allocation (2011) (91)
An Empirical Investigation of Mesh and Torus NoC Topologies Under Different Routing Algorithms and Traffic Models (2007) (91)
Design and Analysis of Two Low-Power SRAM Cell Structures (2009) (90)
Dynamic power management of complex systems using generalized stochastic petri nets (2000) (90)
Maximum power transfer tracking for a photovoltaic-supercapacitor energy system (2010) (90)
A near optimal algorithm for technology mapping minimizing area under delay constraints (1992) (88)
A Near-Optimal Model-Based Control Algorithm for Households Equipped With Residential Photovoltaic Power Generation and Energy Storage Systems (2016) (88)
HEBS: histogram equalization for backlight scaling (2005) (86)
Stratified random sampling for power estimation (1996) (86)
An energy and deadline aware resource provisioning, scheduling and optimization framework for cloud systems (2013) (84)
Information theoretic measures of energy consumption at register transfer level (1995) (84)
Module assignment for low power (1996) (83)
Constant-current regulator-based battery-supercapacitor hybrid architecture for high-rate pulsed load applications☆☆☆ (2012) (83)
Pharyngolaryngeal lesions in patients undergoing cervical spine surgery through the anterior approach: contribution of methylprednisolone (2003) (83)
A Nested Two Stage Game-Based Optimization Framework in Mobile Cloud Computing System (2013) (82)
Gate-level power estimation using tagged probabilistic simulation (1998) (81)
Information theoretic measures for power analysis [logic design] (1996) (81)
NBTI-aware flip-flop characterization and design (2008) (78)
Power optimization and management in embedded systems (2001) (77)
Interconnection length estimation for optimized standard cell layouts (1989) (77)
Analysis and optimization of thermal issues in high-performance VLSI (2001) (77)
PCUBE: A performance driven placement algorithm for low power designs (1993) (76)
Demand-side load scheduling incentivized by dynamic energy prices (2011) (75)
Power efficient technology decomposition and mapping under an extended power consumption model (1994) (75)
BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture (2009) (73)
Irredundant address bus encoding for low power (2001) (73)
Power and Performance Modeling in a Virtualized Server System (2010) (73)
Architectural energy optimization by bus splitting (2002) (72)
Minimizing the Electricity Bill of Cooperative Users under a Quasi-Dynamic Pricing Model (2010) (72)
Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation (2004) (71)
Design Technologies for Low Power VLSI (1995) (70)
Capacitive coupling noise in high-speed VLSI circuits (2005) (69)
Energy and Performance Efficient Computation Offloading for Deep Neural Networks in a Mobile Cloud Computing Environment (2018) (69)
Analysis of IR-drop scaling with implications for deep submicron P/G network designs (2003) (68)
Layout driven logic restructuring/decomposition (1991) (67)
Microprocessor power estimation using profile-driven program synthesis (1998) (67)
Boolean matching using binary decision diagrams with applications to logic synthesis and verification (1992) (66)
Leakage Minimization of SRAM Cells in a Dual-Vt and Dual-Tox Technology (2008) (66)
Multi-level Network Optimization For Low Power (1994) (66)
Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system (2006) (65)
Battery-powered digital CMOS design (1999) (65)
Statistical logic cell delay analysis using a current-based model (2006) (64)
A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20 nm FinFET technologies (2015) (63)
Deriving a near-optimal power management policy using model-free reinforcement learning and Bayesian classification (2011) (63)
A compressed frame buffer to reduce display power consumption in mobile systems (2004) (62)
Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs (2001) (61)
Model-order reduction using variational balanced truncation with spectral shaping (2006) (61)
A scalable and flexible hybrid energy storage system design and implementation (2014) (61)
VIBNN: Hardware Acceleration of Bayesian Neural Networks (2018) (61)
HVS-Aware Dynamic Backlight Scaling in TFT-LCDs (2006) (60)
A Novel Synthetic Traffic Pattern for Power/Performance Analysis of Network-on-Chips Using Negative Exponential Distribution (2009) (60)
A Robust Power Gating Structure and Power Mode Transition Strategy for MTCMOS Design (2007) (60)
Balanced reconfiguration of storage banks in a hybrid electrical energy storage system (2011) (60)
Therminator: A thermal simulator for smartphones producing accurate chip and skin temperature maps (2014) (59)
Closing the gap between carry select adder and ripple carry adder: a new class of low-power high-performance adders (2005) (59)
TOSAM: An Energy-Efficient Truncation- and Rounding-Based Scalable Approximate Multiplier (2019) (59)
Model reduction of variable-geometry interconnects using variational spectrally-weighted balanced truncation (2001) (59)
A backlight power management framework for battery-operated multimedia systems (2004) (58)
Battery-aware power management based on Markovian decision processes (2002) (58)
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels (2016) (58)
Charge migration efficiency optimization in hybrid electrical energy storage (HEES) systems (2011) (58)
Timing-driven placement based on partitioning with dynamic cut-net control (2000) (56)
Dynamic thermal management in mobile devices considering the thermal coupling between battery and application processor (2013) (56)
Performance Comparisons Between 7-nm FinFET and Conventional Bulk CMOS Standard Cell Libraries (2015) (56)
Energy efficient strategies for deployment of a two-level wireless sensor network (2005) (56)
An Integrated Row-Based Cell Placement and Interconnect Synthesis Tool for Large SFQ Logic Circuits (2017) (56)
Codex-dp: co-design of communicating systems using dynamic programming (1999) (55)
Analysis of jitter due to power-supply noise in phase-locked loops (2000) (54)
DTM: dynamic tone mapping for backlight scaling (2005) (54)
Formal Verification Using Edge-Valued Binary Decision Diagrams (1996) (53)
Spike-Thrift: Towards Energy-Efficient Deep Spiking Neural Networks by Limiting Spiking Activity via Attention-Guided Compression (2021) (53)
Dynamic power management in a mobile multimedia system with guaranteed quality-of-service (2001) (53)
Model order reduction of large circuits using balanced truncation (1999) (53)
Reinforcement learning based power management for hybrid electric vehicles (2014) (52)
Architecture and Control Algorithms for Combating Partial Shading in Photovoltaic Systems (2014) (52)
A Stackelberg Game-Based Optimization Framework of the Smart Grid With Distributed PV Power Generations and Data Centers (2014) (52)
Reducing the Sub-threshold and Gate-tunneling Leakage of SRAM Cells using Dual-Vt and Dual-Tox Assignment (2006) (52)
QoM and lifetime-constrained random deployment of sensor networks for minimum energy consumption (2005) (51)
State of health aware charge management in hybrid electrical energy storage systems (2012) (51)
FinCACTI: Architectural Analysis and Modeling of Caches with Deeply-Scaled FinFET Devices (2014) (51)
An effective power mode transition technique in MTCMOS circuits (2005) (50)
Analysis and Synthesis of Quantum Circuits by Using Quantum Decision Diagrams (2006) (50)
POSE: power optimization and synthesis environment (1996) (49)
A semi-Markovian decision process based control method for offloading tasks from mobile devices to the cloud (2013) (49)
An interleaved dual-battery power supply for battery-operated electronics (2000) (49)
Block-Based Carry Speculative Approximate Adder for Energy-Efficient Applications (2020) (48)
Effects of non-uniform substrate temperature on the clock signal integrity in high performance designs (2001) (47)
A new canonical form for fast Boolean matching in logic synthesis and verification (2005) (47)
Hierarchical Virtual Machine Consolidation in a Cloud Computing System (2013) (46)
Geographical Load Balancing for Online Service Applications in Distributed Datacenters (2013) (46)
Memory bus encoding for low power: a tutorial (2001) (45)
Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenon (2014) (45)
An exact solution to simultaneous technology mapping and linear placement problem (1997) (45)
Lifetime-aware multicast routing in wireless ad hoc networks (2004) (44)
Dynamic Voltage and Frequency Scheduling for Embedded Processors Considering Power/Performance Tradeoffs (2011) (44)
Logic Synthesis for Low Power VLSI Designs (1997) (44)
Edge Valued Binary Decision Diagrams (1996) (43)
Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications (2018) (43)
Optimal Design of the Power-Delivery Network for Multiple Voltage-Island System-on-Chips (2009) (42)
Charge allocation for hybrid electrical energy storage systems (2011) (42)
Routability-Driven Fanout Optimization (1993) (42)
TAPP: Temperature-aware application mapping for NoC-based many-core processors (2015) (41)
SEERAD: A high speed yet energy-efficient rounding-based approximate divider (2016) (41)
Factored Edge-Valued Binary Decision Diagrams (1997) (41)
Energy and Performance-Aware Task Scheduling in a Mobile Cloud Computing Environment (2014) (41)
Stochastic modeling of a thermally-managed multi-core system (2008) (41)
Multi-pad power/ground network design for uniform distribution of ground bounce (1998) (40)
Profile-driven Program Synthesis For Evaluation Of System Power Dissipation (1997) (40)
Near-optimal, dynamic module reconfiguration in a photovoltaic system to combat partial shading effects (2012) (39)
Improving the efficiency of power simulators by input vector compaction (1996) (39)
Minimizing the latency of quantum circuits during mapping to the ion-trap circuit fabric (2012) (39)
Reinforcement learning-based control of residential energy storage systems for electric bill minimization (2015) (39)
Linear-Depth Quantum Circuits for n-qubit Toffoli gates with no Ancilla (2013) (39)
Low-power RT-level synthesis techniques: a tutorial (2005) (39)
Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding (2004) (39)
NISQ+: Boosting quantum computing power by approximating quantum error correction (2020) (38)
Optimal control of a grid-connected hybrid electrical energy storage system for homes (2013) (38)
Design of a Tri-Modal Multi-Threshold CMOS Switch With Application to Data Retentive Power Gating (2012) (38)
FFT-based deep learning deployment in embedded systems (2017) (38)
DNR: A Tunable Robust Pruning Framework Through Dynamic Network Rewiring of DNNs (2020) (37)
Design and application of multimodal power gating structures (2009) (37)
Accurate prediction of physical design characteristics for random logic (1989) (37)
Prediction and control of bursty cloud workloads: A fractal framework (2014) (37)
Stochastic sequential machine synthesis targeting constrained sequence generation (1996) (36)
Computing the area versus delay trade-off curves in technology mapping (1995) (36)
ColdFlux Superconducting EDA and TCAD Tools Project: Overview and Progress (2019) (36)
Estimation of peak power dissipation in VLSI circuits using thelimiting distributions of extreme order statistics (2001) (36)
A simultaneous routing tree construction and fanout optimization algorithm (1998) (36)
Statistical sampling and regression analysis for RT-Level power evaluation (1996) (36)
Charge Allocation in Hybrid Electrical Energy Storage Systems (2013) (35)
Logic extraction and factorization for low power (1995) (35)
Sequence compaction for power estimation: theory and practice (1999) (35)
Dual-mode power regulator for photovoltaic module emulation (2013) (35)
Versatile high-fidelity photovoltaic module emulation system (2011) (35)
Online fault detection and tolerance for photovoltaic energy harvesting systems (2012) (35)
PBMap: A Path Balancing Technology Mapping Algorithm for Single Flux Quantum Logic Circuits (2018) (35)
TruncApp: A truncation-based approximate divider for energy efficient DSP applications (2017) (34)
Scaling Analysis of On-Chip Power Grid Voltage Variations in Nanometer Scale ULSI (2005) (34)
5nm FinFET Standard Cell Library Optimization and Circuit Synthesis in Near-and Super-Threshold Voltage Regimes (2014) (34)
Simultaneous gate sizing and placement (2000) (34)
Concurrent optimization of consumer's electrical energy bill and producer's power generation cost under a dynamic pricing model (2012) (33)
Power-optimal encoding for a DRAM address bus (2002) (33)
Energy-aware MPEG-4 FGS streaming (2003) (33)
Chromatic encoding: a low power encoding technique for digital visual interface (2004) (33)
Battery-aware power management based on Markovian decision processes (2006) (33)
Layout Optimization for Quantum Circuits with Linear Nearest Neighbor Architectures (2016) (33)
Charge replacement in hybrid electrical energy storage systems (2012) (33)
Two-level logic minimization for low power (1995) (33)
Machine learning-based energy management in a hybrid electric vehicle to minimize total operating cost (2015) (32)
POWER ESTIMATION AND OPTIMIZATION AT THE LOGIC LEVEL (1994) (32)
Analysis of substrate thermal gradient effects on optimal buffer insertion (2001) (32)
Analysis and reduction of capacitive coupling noise in high-speed VLSI circuits (2001) (32)
TheSPoT: Thermal Stress-Aware Power and Temperature Management for Multiprocessor Systems-on-Chip (2018) (32)
SFQmap: A Technology Mapping Tool for Single Flux Quantum Logic Circuits (2018) (32)
An electricity trade model for microgrid communities in smart grid (2014) (32)
Charge recycling in MTCMOS circuits: concept and analysis (2006) (31)
Floorplanning with pin assignment (1990) (31)
Joint sizing and adaptive independent gate control for FinFET circuits operating in multiple voltage regimes using the logical effort method (2013) (31)
Minimizing the power consumption of a Chip Multiprocessor under an average throughput constraint (2010) (31)
Online estimation of the remaining energy capacity in mobile systems considering system-wide power consumption and battery characteristics (2013) (31)
Charge Recycling in Power-Gated CMOS Circuits (2008) (30)
Multi-objective optimization techniques for VLSI circuits (2011) (30)
Adaptive models for input data compaction for power simulators (1997) (30)
Minimizing state-of-health degradation in hybrid electrical energy storage systems with arbitrary source and load profiles (2014) (30)
Power conversion efficiency characterization and optimization for smartphones (2012) (30)
Hierarchical power management with application to scheduling (2005) (30)
A Current Source Model for CMOS Logic Cells Considering Multiple Input Switching and Stack Effect (2008) (30)
PX-CGRA: Polymorphic approximate coarse-grained reconfigurable architecture (2018) (30)
Trace-Based Analysis and Prediction of Cloud Computing User Behavior Using the Fractal Modeling Technique (2014) (29)
An approach for multilevel logic optimization targeting low power (1996) (29)
Resource allocation and consolidation in a multi-core server cluster using a Markov decision process model (2013) (29)
Architectural power optimization by bus splitting (2000) (29)
Statistical Design Optimization of FinFET SRAM Using Back-Gate Voltage (2011) (29)
Concurrent logic restructuring and placement for timing closure (1999) (29)
A DSM design flow: putting floorplanning, technology-mapping, and gate-placement together (1998) (29)
Statistical timing analysis of flip-flops considering codependent setup and hold times (2008) (29)
Enhancing efficiency and robustness of a photovoltaic power system under partial shading (2012) (29)
Coarse-Grain MTCMOS Sleep Transistor Sizing Using Delay Budgeting (2008) (28)
Design and analysis of segmented routing channels for row-based FPGA's (1994) (28)
Constructing minimal spanning/Steiner trees with bounded path length (1996) (28)
Dynamic Driver Supply Voltage Scaling for Organic Light Emitting Diode Displays (2013) (28)
Gated clock routing minimizing the switched capacitance (1998) (28)
Pre-Defined Sparsity for Low-Complexity Convolutional Neural Networks (2020) (28)
Frame-Based Dynamic Voltage and Frequency Scaling for an MPEG Player (2005) (28)
Precomputation-based guarding for dynamic and leakage power reduction (2003) (28)
Designing Fault-Tolerant Photovoltaic Systems (2014) (28)
Dynamic Thermal Management for MPEG-2 Decoding (2006) (28)
FPGA synthesis using function decomposition (1994) (28)
Low-leakage SRAM design with dual V/sub t/ transistors (2006) (28)
Hierarchical Sequence Compaction For Power Estimation (1997) (27)
Delay optimal partitioning targeting low power VLSI circuits (1995) (27)
Maximizing return on investment of a grid-connected hybrid electrical energy storage system (2013) (27)
LETAM: A low energy truncation-based approximate multiplier (2017) (27)
Calculating the effective capacitance for the RC interconnect in VDSM technologies (2003) (27)
Model-Free Reinforcement Learning and Bayesian Classification in System-Level Power Management (2016) (27)
FEPMA: Fine-grained event-driven power meter for android smartphones based on device driver layer event monitoring (2014) (27)
A study of the effectiveness of CPU consolidation in a virtualized multi-core server system (2012) (26)
Hierarchical SLA-Driven Resource Management for Peak Power-Aware and Energy-Efficient Operation of a Cloud Datacenter (2016) (26)
Battery management for grid-connected PV systems with a battery (2012) (26)
Jitter-induced power/ground noise in CMOS PLLs: a design perspective (2001) (26)
Tutorial and Survey Paper Power Minimization in IC Design: Principles and Applications (1996) (26)
Pilot Register File: Energy Efficient Partitioned Register File for GPUs (2017) (26)
Dynamic Power Management under Uncertain Information (2007) (25)
Exact and Approximate Methods of Switching Activity Estimation in Sequential Logic Circuits (1994) (25)
Hierarchical placement for macrocells: a 'meet in the middle' approach (1988) (25)
Fast photovoltaic array reconfiguration for partial solar powered vehicles (2014) (25)
Energy-efficient, low-latency realization of neural networks through boolean logic minimization (2019) (25)
A Reinforcement Learning-Based Power Management Framework for Green Computing Data Centers (2016) (25)
Res-DNN: A Residue Number System-Based DNN Accelerator Unit (2020) (25)
Power Simulation and Estimation in VLSI Circuits (2000) (25)
Timing-driven placement for general cell layout (1990) (24)
Symmetry Detection and Boolean Matching Utilizing a Signature-Based Canonical Form of Boolean Functions (2008) (24)
Logic Optimization, Complex Cell Design, and Retiming of Single Flux Quantum Circuits (2018) (24)
Optimizing a Reconfigurable Power Distribution Network in a Multicore Platform (2015) (24)
An energy-aware fault tolerant scheduling framework for soft error resilient cloud computing systems (2014) (24)
Trace-driven steady-state probability estimation in FSMs with application to power estimation (1998) (24)
Modulation-aware energy balancing in hierarchical wireless sensor networks (2008) (24)
A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders (2019) (24)
An integrated logical and physical design flow for deep submicron circuits (1999) (24)
Superconducting Magnetic Field Programmable Gate Array (2018) (24)
I/O pad assignment based on the circuit structure (1991) (24)
Concurrent Task Scheduling and Dynamic Voltage and Frequency Scaling in a Real-Time Embedded System With Energy Harvesting (2016) (24)
An Ultra Low-Power Memristive Neuromorphic Circuit for Internet of Things Smart Sensors (2018) (24)
A Game Theoretic Framework of SLA-based Resource Allocation for Competitive Cloud Service Providers (2014) (23)
Statistical design of macro-models for RT-level power evaluation (1997) (23)
Service Level Agreement-Based Joint Application Environment Assignment and Resource Allocation in Cloud Computing Systems (2013) (23)
Post-layout timing-driven cell placement using an accurate net length model with movable Steiner points (2001) (23)
Minimizing the Routing Cost During Logic Extraction (1995) (23)
FGILP: An integer linear program solver based on function graphs (1993) (23)
POLAR: A Pipelined/Overlapped FPGA-Based LSTM Accelerator (2020) (23)
Transition reduction in memory buses using sector-based encoding techniques (2004) (23)
Towards Collaborative Intelligence Friendly Architectures for Deep Learning (2019) (23)
Continuous Frequency Adjustment Technique Based on Dynamic Workload Prediction (2008) (23)
Opportunities for Machine Learning in Electronic Design Automation (2018) (23)
Single-Bit Pseudoparallel Processing Low-Oversampling Delta–Sigma Modulator Suitable for SDR Wireless Transmitters (2014) (23)
Heat capacity measurements on polymers and copolymers of itaconic acid ester exhibiting two glass transitions (1983) (23)
Stochastic Dynamic Thermal Management: A Markovian Decision-based Approach (2006) (23)
Backlight dimming in power-aware mobile displays (2006) (23)
Theoretical bounds for switching activity analysis in finite-state machines (1998) (23)
A framework of concurrent task scheduling and dynamic voltage and frequency scaling in real-time embedded systems with energy harvesting (2013) (22)
VRCon: Dynamic reconfiguration of voltage regulators in a multicore platform (2014) (22)
Performance prediction for multiple-threshold 7nm-FinFET-based circuits operating in multiple voltage regimes using a cross-layer simulation framework (2014) (22)
LEOPARD: a Logical Effort-based fanout OPtimizer for ARea and Delay (1999) (22)
GOP-Level Dynamic Thermal Management in MPEG-2 Decoding (2008) (22)
Active bank switching for temperature control of the register file in a microprocessor (2007) (22)
Interconnect energy dissipation in high-speed ULSI circuits (2004) (21)
Multi-code state assignment for low power design (2000) (21)
A Current-based Method for Short Circuit Power Calculation under Noisy Input Waveforms (2007) (21)
An optimization framework for data centers to minimize electric bill under day-ahead dynamic energy prices while providing regulation services (2014) (21)
HIRE-SNN: Harnessing the Inherent Robustness of Energy-Efficient Deep Spiking Neural Networks by Training with Crafted Input Noise (2021) (21)
Low power sequential circuit design by using priority encoding and clock gating (2000) (21)
Design of Complex Rapid Single-Flux-Quantum Cells with Application to Logic Synthesis (2017) (20)
Power-optimal encoding for DRAM address bus (2000) (20)
Design of multiple fanout clock distribution network for rapid single flux quantum technology (2017) (20)
Design of a universal logic block for fault-tolerant realization of any logic operation in trapped-ion quantum circuits (2014) (20)
7nm FinFET standard cell layout characterization and power density prediction in near- and super-threshold voltage regimes (2014) (20)
Delay-optimal clustering targeting low-power VLSI circuits (1999) (20)
Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods (1999) (20)
Optimizing the Power Delivery Network in a Smartphone Platform (2014) (20)
Automatic Layout of Silicon-On-Silicon Hybrid Packages (1989) (20)
Networked architecture for hybrid electrical energy storage systems (2012) (19)
Dynamic Voltage and Frequency Management Based on Variable Update Intervals for Frequency Setting (2006) (19)
Low power synthesis of finite state machines with mixed D and T flip-flops (2003) (19)
Stack sizing analysis and optimization for FinFET logic cells and circuits operating in the sub/near-threshold regime (2014) (19)
Accurate Timing and Noise Analysis of Combinational and Sequential Logic Cells Using Current Source Modeling (2011) (19)
ALBORZ: Address Level Bus Power Optimization (2002) (19)
Improving the Efficiency of Power Management Techniques by Using Bayesian Classification (2008) (19)
Minimizing energy consumption of a chip multiprocessor through simultaneous core consolidation and DVFS (2010) (19)
Alleviating routing congestion by combining logic resynthesis and linear placement (1993) (19)
Poly(alkyl itaconate)s. Formation of mixed esters and the properties of the resulting polymers (1985) (19)
Reinforcement learning based dynamic power management with a hybrid power supply (2012) (19)
X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture (2020) (18)
Optimal control of PEVs for energy cost minimization and frequency regulation in the smart grid accounting for battery state-of-health degradation (2015) (18)
Internal write-back and read-before-write schemes to eliminate the disturbance to the half-selected cells in SRAMs (2018) (18)
A Deep Reinforcement Learning Framework for Architectural Exploration: A Routerless NoC Case Study (2020) (18)
Power-optimal encoding for DRAM address bus (poster session) (2000) (18)
Design of an efficient power delivery network in an soc to enable dynamic power management (2007) (18)
Energy Minimization Using Multiple Supply Voltages (1997) (18)
Deep Learning-Based Circuit Recognition Using Sparse Mapping and Level-Dependent Decaying Sum Circuit Representations (2019) (18)
3D CNN Acceleration on FPGA using Hardware-Aware Pruning (2020) (18)
Lifetime-Aware Hierarchical Wireless Sensor Network Architecture with Mobile Overlays (2007) (18)
Maximum power estimation using the limiting distributions of extreme order statistics (1998) (18)
Low-power design of sequential circuits using a quasi-synchronous derived clock (2000) (18)
ThermTap: An online power analyzer and thermal simulator for Android devices (2015) (18)
Negotiation-based task scheduling and storage control algorithm to minimize user's electric bills under dynamic prices (2015) (17)
Microprocessor power analysis by labeled simulation (2001) (17)
TEI-NoC: Optimizing Ultralow Power NoCs Exploiting the Temperature Effect Inversion (2018) (17)
Approximate Logic Synthesis: A Reinforcement Learning-Based Technology Mapping Approach (2019) (17)
Negotiation-based task scheduling to minimize user’s electricity bills under dynamic energy prices (2014) (17)
Hierarchical, Portfolio Theory-Based Virtual Machine Consolidation in a Compute Cloud (2018) (17)
Low write-energy STT-MRAMs using FinFET-based access transistors (2014) (17)
Lifetime improvement by exploiting aggressive voltage scaling during runtime of error-resilient applications (2017) (17)
A stochastic local hot spot alerting technique (2008) (16)
Optimal Selection of Voltage Regulator Modules in a Power Delivery Network (2007) (16)
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A Power Estimation Framework For Designing Low Power Portable Video Applications (1997) (16)
Probability calculation of read failures in nano-scaled SRAM cells under process variations (2012) (16)
Optimal design and management of a smart residential PV and energy storage system (2014) (16)
Improving efficiency of extensible processors by using approximate custom instructions (2014) (16)
Soluble Itaconic Acid–Ethylene Glycol Polyesters (1993) (16)
Circuit and System Level Power Management (2002) (15)
Power Optimization in VLSI Layout: A Survey (1997) (15)
Squash: a scalable quantum mapper considering ancilla sharing (2014) (15)
Determining the Optimal Timeout Values for a Power-Managed System based on the Theory of Markovian Processes: Offline and Online Algorithms (2006) (15)
Power reduction in microprocessor chips by gated clock routing (1998) (15)
Robust optimization of a Chip Multiprocessor's performance under power and thermal constraints (2012) (15)
Sequence Compaction For Probabilistic Analysis Of Finite-state Machines (1997) (15)
Optimal co-scheduling of HVAC control and battery management for energy-efficient buildings considering state-of-health degradation (2016) (15)
Buffer sizing for minimum energy-delay product by using an approximating polynomial (2003) (14)
Low power CMOS circuits with clocked power (2000) (14)
PHAX: Physical Characteristics Aware Ex-Situ Training Framework for Inverter-Based Memristive Neuromorphic Circuits (2018) (14)
An Efficient Pipelined Architecture for Superconducting Single Flux Quantum Logic Circuits Utilizing Dual Clocks (2020) (14)
A game-theoretic price determination algorithm for utility companies serving a community in smart grid (2013) (14)
qGDR: A Via-Minimization-Oriented Routing Tool for Large-Scale Superconductive Single-Flux-Quantum Circuits (2019) (14)
Principles and Efficient Implementation of Charge Replacement in Hybrid Electrical Energy Storage Systems (2014) (14)
Designing a residential hybrid electrical energy storage system based on the energy buffering strategy (2013) (14)
Timing Characterization for Static Timing Analysis of Single Flux Quantum Circuits (2019) (14)
High-Level Modeling Approach for Analyzing the Effects of Traffic Models on Power and Throughput in Mesh-Based NoCs (2008) (14)
Portfolio Theory-Based Resource Assignment in a Cloud Computing System (2012) (14)
NullaNet: Training Deep Neural Networks for Reduced-Memory-Access Inference (2018) (14)
Analysis and optimization of ground bounce in digital CMOS circuits (2000) (14)
Accurate Component Model Based Optimal Control for Energy Storage Systems in Households with Photovoltaic Modules (2013) (14)
A Dynamic Programming-Based, Path Balancing Technology Mapping Algorithm Targeting Area Minimization (2019) (14)
VGTA: variation-aware gate timing analysis (2005) (14)
A Minimum-Skew Clock Tree Synthesis Algorithm for Single Flux Quantum Logic Circuits (2019) (13)
Accurate electrothermal modeling of thermoelectric generators (2015) (13)
Reversible logic synthesis of k-input, m-output lookup tables (2013) (13)
SynergicLearning: Neural Network-Based Feature Extraction for Highly-Accurate Hyperdimensional Learning (2020) (13)
Statistical Estimation Of The Cumulative Distribution Function For Power Dissipation In VLSI Circuits (1997) (13)
Multi-corner, energy-delay optimized, NBTI-aware flip-flop design (2010) (13)
Application mapping for express channel-based networks-on-chip (2014) (13)
Low power techniques for address encoding and memory allocation (2001) (13)
A fanout optimization algorithm based on the effort delay model (2003) (13)
Parameterized block-based non-Gaussian statistical gate timing analysis (2006) (13)
SIMES: A simulator for hybrid electrical energy storage systems (2013) (13)
Timing variation-aware custom instruction extension technique (2011) (12)
Design Exploration of Energy-Efficient Accuracy-Configurable Dadda Multipliers With Improved Lifetime Based on Voltage Overscaling (2020) (12)
CTS2M: concurrent task scheduling and storage management for residential energy consumers under dynamic energy pricing (2017) (12)
Robust neuromorphic computing in the presence of process variation (2017) (12)
Low power DCVSL circuits employing AC power supply (2002) (12)
Low-power sequential circuit design using T flip-flops (2001) (12)
Information theoretic measures for power analysis : Low power design (1996) (12)
Non-Gaussian Statistical Interconnect Timing Analysis (2006) (12)
Crosstalk analysis in nanometer technologies (2006) (12)
Low-power Fanout Optimization Using MTCMOS and Multi-Vt Techniques (2006) (12)
White‐LED backlight control for motion‐blur reduction and power minimization in large LCD TVs (2009) (12)
Achieving Energy Efficiency in Datacenters by Virtual Machine Sizing, Replication, and Placement (2016) (12)
Simultaneous gate sizing and fanout optimization (2000) (12)
A placement algorithm for superconducting logic circuits based on cell grouping and super-cell placement (2018) (12)
An efficient reliability simulation flow for evaluating the hot carrier injection effect in CMOS VLSI circuits (2012) (12)
A comprehensive study of energy dissipation in lossy transmission lines driven by CMOS inverters (2002) (12)
Energy and Reliability Improvement of Voltage-Based, Clustered, Coarse-Grain Reconfigurable Architectures by Employing Quality-Aware Mapping (2018) (12)
VeriSFQ: A Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology (2019) (11)
Simulation of NoC power-gating: Requirements, optimizations, and the Agate simulator (2016) (11)
Platform-dependent, leakage-aware control of the driving current of embedded thermoelectric coolers (2013) (11)
An Energy-Efficient, Yet Highly-Accurate, Approximate Non-Iterative Divider (2018) (11)
Composite sequence compaction for finite-state machines using block entropy and high-order Markov models (1997) (11)
Timing-driven bipartitioning with replication using iterative quadratic programming (1999) (11)
Maximum power transfer tracking in a solar USB charger for smartphones (2013) (11)
Statistical Functional Yield Estimation and Enhancement of CNFET-Based VLSI Circuits (2013) (11)
B2Sim:: a fast micro-architecture simulator based on basic block characterization (2006) (11)
Energy-Aware Task Scheduling and Dynamic Voltage Scaling in a Real-Time System (2008) (11)
Tagged probabilistic simulation provides accurate and efficient power estimates at gate level (1995) (11)
Head-to-head polymers—I. The preparation and some properties of head-to-head polypropylene (1979) (11)
Force-directed geographical load balancing and scheduling for batch jobs in distributed datacenters (2013) (11)
Low-power fanout optimization using multiple threshold voltage inverters (2005) (11)
Model-free learning-based online management of hybrid electrical energy storage systems in electric vehicles (2014) (11)
An Exploration of Applying Gate-Length-Biasing Techniques to Deeply-Scaled FinFETs Operating in Multiple Voltage Regimes (2018) (11)
A hierarchical floorplanning approach (1990) (11)
An architecture-level approach for mitigating the impact of process variations on extensible processors (2012) (11)
A comparative study on performance and reliability of 32-bit binary adders (2016) (11)
Profit maximization for utility companies in an oligopolistic energy market with dynamic prices (2012) (11)
Adaptive thermal management for portable system batteries by forced convection cooling (2013) (11)
Forecasting-Based Dynamic Virtual Channels Allocation for Power Optimization of Network-on-Chips (2009) (11)
Dynamic reconfiguration of photovoltaic energy harvesting system in hybrid electric vehicles (2012) (11)
Capital cost-aware design and partial shading-aware architecture optimization of a reconfigurable photovoltaic system (2013) (11)
Distributed multimedia system design: a holistic perspective (2004) (11)
All-Region Statistical Model for Delay Variation Based on Log-Skew-Normal Distribution (2016) (11)
Constructing lower and upper bounded delay routing trees using linear programming (1996) (11)
Challenges and the status of superconducting single flux quantum technology (2019) (10)
An energy and area efficient yet high-speed square-root carry select adder structure (2017) (10)
Towards Low-Latency Energy-Efficient Deep SNNs via Attention-Guided Compression (2021) (10)
Gate sizing and replication to minimize the effects of virtual ground parasitic resistances in MTCMOS designs (2006) (10)
Multiple-source and multiple-destination charge migration in hybrid electrical energy storage systems (2012) (10)
Balanced Factorization and Rewriting Algorithms for Synthesizing Single Flux Quantum Logic Circuits (2019) (10)
A Class of Irredundant Encoding Techniques for Reducing Bus Power (2002) (10)
DART: A Framework for Determining Approximation Levels in an Approximable Memory Hierarchy (2020) (10)
Concurrent placement, capacity provisioning, and request flow control for a distributed cloud infrastructure (2014) (10)
Logic Level Power Estimation Considering Spatiotemporal Correlations (2014) (10)
Modeling processor idle times in MPSoC platforms to enable integrated DPM, DVFS, and task scheduling subject to a hard deadline (2018) (10)
Balancing On-Chip Network Latency in Multi-application Mapping for Chip-Multiprocessors (2014) (10)
Timing-driven placement based on monotone cell ordering constraints (2006) (10)
CAD for low power: status and promising directions (1995) (10)
Dynamic voltage and frequency scaling for energy-efficient system design (2005) (10)
Technology mapping for low leakage power and high speed with hot-carrier effect consideration (2003) (10)
Coordination of the smart grid and distributed data centers: A nested game-based optimization framework (2014) (10)
Analyzing the Confidentiality of Undistillable Teachers in Knowledge Distillation (2021) (10)
Resource allocation optimization in a data center with energy storage devices (2014) (10)
Logic extraction based on normalized netlengths (1995) (10)
Leakage power reduction for deeply-scaled FinFET circuits operating in multiple voltage regimes using fine-grained gate-length biasing technique (2015) (10)
Simulation Analysis and Energy-Saving Techniques for ERSFQ Circuits (2019) (10)
Hierarchical power management of a system with autonomously power-managed components using reinforcement learning (2015) (10)
Theoretical description of the heat capacity change at the lower glass transition temperature of poly(alkyl itaconates) exhibiting dual glass transition behavior (1983) (10)
Predictive-Flow-Queue-Based Energy Optimization for Gigabit Ethernet Controllers (2009) (10)
Joint automatic control of the powertrain and auxiliary systems to enhance the electromobility in hybrid electric vehicles (2015) (10)
An efficient scheduling algorithm for multiple charge migration tasks in hybrid electrical energy storage systems (2013) (10)
Balanced truncation with spectral shaping for RLC interconnects (2001) (10)
A FinFET SRAM cell design with BTI robustness at high supply voltages and high yield at low supply voltages (2015) (9)
BRDS: An FPGA-based LSTM Accelerator with Row-Balanced Dual-Ratio Sparsification (2021) (9)
An improved logical effort model and framework applied to optimal sizing of circuits operating in multiple supply voltage regimes (2014) (9)
An optimal energy co-scheduling framework for smart buildings (2017) (9)
Sensitivity-based gate delay propagation in static timing analysis (2005) (9)
Hierarchical dynamic power management using model-free reinforcement learning (2013) (9)
Reinforcement Learning-Based Dynamic Power Management of a Battery-Powered System Supplying Multiple Active Modes (2013) (9)
TEI-power (2017) (9)
Optimal offloading control for a mobile device based on a realistic battery model and semi-Markov decision process (2014) (9)
Power-aware deployment and control of forced-convection and thermoelectric coolers (2014) (9)
Construction and characterization of a lead(II) ion selective electrode with 1-furoil-3,3-diethylthiourea as neutral carrier (2005) (9)
DigiQ: A Scalable Digital Controller for Quantum Computers Using SFQ Logic (2022) (9)
Minimizing the energy cost of throughput in a linear pipeline by opportunistic time borrowing (2008) (9)
A Bayesian Game Formulation of Power Dissipation and Response Time Minimization in a Mobile Cloud Computing System (2013) (9)
A thermal stress-aware algorithm for power and temperature management of MPSoCs (2015) (9)
Workload and temperature dependent evaluation of BTI-induced lifetime degradation in digital circuits (2015) (9)
An efficient network on-chip architecture based on isolating local and non-local communications (2013) (9)
Non-uniform chip-temperature dependent signal integrity (2001) (9)
Uncertainty-Aware Dynamic Power Management in Partially Observable Domains (2009) (9)
A mathematical solution to power optimal pipeline design by utilizing soft edge flip-flops (2008) (9)
Cost-effective design of a hybrid electrical energy storage system for electric vehicles (2014) (9)
Toward Approximate Computing for Coarse-Grained Reconfigurable Architectures (2018) (9)
Crosstalk-affected delay analysis in nanometer technologies (2008) (9)
FPGA synthesis for minimum area, delay and power (1996) (9)
LEQA: Latency estimation for a quantum algorithm mapped to a quantum circuit fabric (2013) (9)
A game theoretic approach to dynamic energy minimization in wireless transceivers (2003) (9)
Technology decomposition using optimal alphabetic trees (1993) (9)
Energy-Aware Wireless Video Streaming (2003) (9)
A Comparative Study of the Effectiveness of CPU Consolidation Versus Dynamic Voltage and Frequency Scaling in a Virtualized Multicore Server (2016) (9)
A fast state assignment procedure for large FSMs (1995) (8)
Panel: Physical Design And Synthesis: Merge Or Die (1997) (8)
Interconnect energy dissipation in high-speed ULSI circuits (2002) (8)
Merging multiple FSM controllers for DFT/BIST hardware (1993) (8)
An optimal control policy in a mobile cloud computing system based on stochastic data (2013) (8)
Toward a Profitable Grid-Connected Hybrid Electrical Energy Storage System for Residential Use (2016) (8)
An integrated battery-hardware model for portable electronics (1999) (8)
Statistical estimation of leakage power dissipation in nano-scale complementary metal oxide semiconductor digital circuits using generalised extreme value distribution (2012) (8)
Head-to-head polymers—II. Dilute solution properties of head-to-head polypropylene (1979) (8)
MERLIN: semi-order-independent hierarchical buffered routing tree generation using local neighborhood search (1999) (8)
Optimizing fuel economy of hybrid electric vehicles using a Markov decision process model (2015) (8)
Advanced power estimation techniques (1997) (8)
Reducing transitions on memory buses using sector-based encoding technique (2002) (8)
An efficient timing analysis model for 6T FinFET SRAM using current-based method (2016) (8)
Design and Multicorner Optimization of the Energy-Delay Product of CMOS Flip–Flops Under the Negative Bias Temperature Instability Effect (2013) (8)
Hardware Acceleration of Bayesian Neural Networks Using RAM Based Linear Feedback Gaussian Random Number Generators (2017) (8)
Squash 2: a hierarchical scalable quantum mapper considering ancilla sharing (2015) (8)
Combining Technology Mapping With Layout (1997) (8)
Statistical estimation of the cumulative distribution function for power dissipation in VLSI cirucits (1997) (8)
Design Automation Methodology and Tools for Superconductive Electronics (2018) (8)
Timing-driven Partitioning Using Iterative Quadratic Programming (2001) (8)
Smart Butterfly: Reducing static power dissipation of network-on-chip with core-state-awareness (2014) (8)
A sequential game perspective and optimization of the smart grid with distributed data centers (2013) (8)
Power optimal MTCMOS repeater insertion for global buses (2007) (8)
Forecasting-Based Dynamic Virtual Channel Management for Power Reduction in Network-on-Chips (2009) (8)
Buffered routing tree construction under buffer placement blockages (2002) (8)
Gradient Agreement as an Optimization Objective for Meta-Learning (2018) (8)
EZ encoding: a class of irredundant low power codes for data address and multiplexed address buses (2002) (8)
Improving the efficiency of Monte Carlo power estimation [VLSI] (2000) (8)
A hardware-friendly algorithm for scalable training and deployment of dimensionality reduction models on FPGA (2018) (8)
Single-Source, Single-Destination Charge Migration in Hybrid Electrical Energy Storage Systems (2014) (8)
White‐LED backlight control for motion‐blur reduction and power minimization in large LCD TVs (2009) (8)
Negotiation-based resource provisioning and task scheduling algorithm for cloud systems (2016) (8)
Design Space Exploration of Memory Controller Placement in Throughput Processors with Deep Learning (2019) (8)
Optimizing the Power-Delay Product of a Linear Pipeline by Opportunistic Time Borrowing (2011) (8)
Gate delay calculation considering the crosstalk capacitances (2004) (7)
Circuit-Level Techniques for Logic and Memory Blocks in Approximate Computing Systemsx (2020) (7)
Power-Aware On-Demand Routing Protocols for Mobile Ad Hoc Networks (2004) (7)
Context-driven power management in cache-enabled base stations using a Bayesian neural network (2017) (7)
Energy-efficient cache memories using a dual-Vt 4T SRAM cell with read-assist techniques (2016) (7)
Analysis of power-clocked CMOS with application to the design of energy-recovery circuits (2000) (7)
An empirical study of crosstalk in VDSM technologies (2005) (7)
Report for the NSF Workshop on Cross ‐ layer Power Optimization and Management (2012) (7)
Hybrid TFET-MOSFET circuit: A solution to design soft-error resilient ultra-low power digital circuit (2017) (7)
Architecture and routability analysis for row-based FPGAs (1993) (7)
Deep-PowerX: a deep learning-based framework for low-power approximate logic synthesis (2020) (7)
OCTAN: An On-Chip Training Algorithm for Memristive Neuromorphic Circuits (2019) (7)
Two high-performance and low-power serial communication interfaces for on-chip interconnects (2009) (7)
Accurate margin calculation for single flux quantum logic cells (2018) (7)
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Logical-physical co-design for deep submicron circuits: challenges and solutions (1998) (7)
A Backlight Power Management Framework for the Battery-Operated Multi-Media Systems (2003) (7)
Constant-Factor Optimization of Quantum Adders on 2D Quantum Architectures (2013) (7)
Joint Charge and Thermal Management for Batteries in Portable Systems With Hybrid Power Sources (2016) (7)
BEAM: bus encoding based on instruction-set-aware memories (2003) (7)
Leakage current reduction in sequential circuits by modifying the scan chains (2003) (7)
Post sign-off leakage power optimization (2011) (7)
NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic (2021) (7)
TEI-ULP: Exploiting Body Biasing to Improve the TEI-Aware Ultralow Power Methods (2019) (7)
An integrated flow for technology remapping and placement of sub-half-micron circuits (1998) (7)
Semi-analytical current source modeling of FinFET devices operating in near/sub-threshold regime with independent gate control and considering process variation (2014) (6)
Computer-Aided Design and Optimization of Hybrid Energy Storage Systems (2013) (6)
Leakage Minimization of SRAM Cells in a Dual-<formula formulatype="inline"><tex Notation="TeX">$V_t$</tex></formula> and Dual-<formula formulatype="inline"><tex Notation="TeX">$T_{\rm ox}$</tex></formula> Technology (2008) (6)
Efficient Synthesis of Quantum Logic Circuits by Rotation-based Quantum Operators and Unitary Functional Bi-decomposition (2005) (6)
Deploying Customized Data Representation and Approximate Computing in Machine Learning Applications (2018) (6)
A cross-layer framework for designing and optimizing deeply-scaled FinFET-based SRAM cells under process variations (2015) (6)
VITA: variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input (2005) (6)
High-performance FPGA implementation of equivariant adaptive separation via independence algorithm for Independent Component Analysis (2017) (6)
Designing the Optimal Pricing Policy for Aggregators in the Smart Grid (2014) (6)
Post-layout circuit speed-up by event elimination (1997) (6)
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Efficient compression and handling of current source model library waveforms (2009) (6)
CSrram: Area-Efficient Low-Power Ex-Situ Training Framework for Memristive Neuromorphic Circuits Based on Clustered Sparsity (2019) (6)
Gate sizing with controlled displacement (1999) (6)
Energy-aware Scheduling of Task Graphs with Imprecise Computations and End-to-end Deadlines (2019) (6)
Low-power data encoding/decoding for energy-efficient static random access memory design (2019) (6)
Resilient Dynamic Power Management under Uncertainty (2008) (6)
SACI: statistical static timing analysis of coupled interconnects (2006) (6)
Stochastic sequential machine synthesis with application to constrained sequence generation (2000) (6)
A nested game-based optimization framework for electricity retailers in the smart grid with residential users and PEVs (2013) (6)
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Distributing DNN training over IoT edge devices based on transfer learning (2022) (6)
NFRA: Generalized Network Flow-Based Resource Allocation for Hosting Centers (2013) (6)
Minimizing the energy-delay product of SRAM arrays using a device-circuit-architecture co-optimization framework (2016) (6)
Comparison between nMOS pass transistor logic style vs. CMOS complementary cells (1997) (6)
Design Solutions And Challenges For Low Power Systems (1994) (6)
Capping Gold Nanoparticles with Modified Chitosan Polymers for Biomedical Applications (2013) (6)
Online fault detection and fault tolerance in electrical energy storage systems (2014) (6)
Sleep transistor distribution in row-based MTCMOS designs (2007) (6)
TIP: A Temperature Effect Inversion-Aware Ultra-Low Power System-on-Chip Platform (2019) (6)
Software-only bus encoding techniques for an embedded system (2002) (6)
Heterogeneous modulation for trading-off energy balancing with bandwidth efficiency in hierarchical sensor networks (2008) (6)
OS-Directed Power Management for Mobile Electronic Systems (2000) (6)
Transmittance Scaling for Reducing Power Dissipation of a Backlit TFT-LCD (2004) (5)
Characterization and design of sequential circuit elements to combat soft error (2008) (5)
Toward Enabling Automated Cognition and Decision-Making in Complex Cyber-Physical Systems (2018) (5)
Deterministic clock gating to eliminate wasteful activity due to wrong-path instructions in out-of-order superscalar processors (2009) (5)
A Synthesis Approach for Coarse-Grained Antifuse-Based FPGAs (2007) (5)
Layout Characterization and Power Density Analysis for Shorted-Gate and Independent-Gate 7nm FinFET Standard Cells (2015) (5)
kNN-CAM: A k-Nearest Neighbors-based Configurable Approximate Floating Point Multiplier (2019) (5)
Technology mapping and packing for coarse-grained, anti-fuse based FPGAs (2004) (5)
Control strategies for chip-based DFT/BIST hardware (1994) (5)
Physical design and synthesis (panel): merge or die! (1997) (5)
A High-Efficiency, Auto Mode-Hop, Variable-Voltage, Ripple Control Buck Converter (2010) (5)
A Graph Partitioning Algorithm with Application in Synthesizing Single Flux Quantum Logic Circuits (2018) (5)
Coarse2Fine: a two-stage training method for fine-grained visual classification (2019) (5)
Study on the impact of device parameter variations on performance of III-V homojunction and heterojunction tunnel FETs (2016) (5)
Minimal area merger of finite state machine controllers (1992) (5)
Optimizing Routerless Network-on-Chip Designs: An Innovative Learning-Based Framework (2019) (5)
Variability-aware design of energy-delay optimal linear pipelines operating in the near-threshold regime and above (2013) (5)
Optimal Joint Management of Charging and Battery Swapping Services for Electric Vehicles (2017) (5)
An 8-b Multiplier Using Single-Stage Full Adder Cell in Single-Flux-Quantum Circuit Technology (2021) (5)
Power Management of Cache-Enabled Cooperative Base Stations Towards Zero Grid Energy (2018) (5)
Maximizing the performance of NoC-based MPSoCs under total power and power density constraints (2016) (5)
Developing TEI-Aware Ultralow-Power SoC Platforms for IoT End Nodes (2021) (5)
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qBSA: Logic Design of a 32-bit Block-Skewed RSFQ Arithmetic Logic Unit (2019) (5)
CSAM: A clock skew-aware aging mitigation technique (2015) (5)
CSM-NN: Current Source Model Based Logic Circuit Simulation - A Neural Network Approach (2019) (5)
Low power sequential circuit design using priority encoding and clock gating (2000) (5)
An accurate analytical I–V model for sub-90-nm MOSFETs and its application to read static noise margin modeling (2012) (5)
Energy Consumption and Lifetime Improvement of Coarse-Grained Reconfigurable Architectures Targeting Low-Power Error-Tolerant Applications (2018) (5)
Low-power Accuracy-configurable Carry Look-ahead Adder Based on Voltage Overscaling Technique (2020) (5)
SystemVerilog Modeling of SFQ and AQFP Circuits (2020) (5)
A Statistical Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits (2019) (5)
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Power minimisation techniques at the RT-level and below (2006) (4)
Superconductive Single FlUX Quantum Logic Devices and Circuits: Status, Challenges, and Opportunities (2020) (4)
Flexible Prime‐Field Genus 2 Hyperelliptic Curve Cryptography Processor with Low Power Consumption and Uniform Power Draw (2015) (4)
Providing Balanced Mapping for Multiple Applications in Many-Core Chip Multiprocessors (2016) (4)
Standard cell library based layout characterization and power analysis for 10nm gate-all-around (GAA) transistors (2016) (4)
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Alphabetic trees-theory and applications in layout-driven logicsynthesis (2001) (4)
An electricity trade model for multiple power distribution networks in smart energy systems (2014) (4)
Efficient Critical Path Identification Based on Viability Analysis Method Considering Process Variations (2017) (4)
Hierarchical buffered routing tree generation (2002) (4)
Gate-all-around FET based 6T SRAM design using a device-circuit co-optimization framework (2017) (4)
Interconnection analysis for standard cell layouts (1999) (4)
A Meta-Learning Approach for Custom Model Training (2018) (4)
Semi-analytical current source modeling of near-threshold operating logic cells considering process variations (2013) (4)
A Stochastic Framework for Hierarchical System‐Level Power Management (2012) (4)
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Efficient representation, stratification, and compression of variational CSM library waveforms using Robust Principle Component Analysis (2010) (4)
Design of NBTI-resilient extensible processors (2015) (4)
Analyzing the Dark Silicon Phenomenon in a Many-Core Chip Multi-Processor under Deeply-Scaled Process Technologies (2015) (4)
Calculation of ramp response of lossy transmission lines using two-port network functions (1998) (4)
Hybrid TFET-MOSFET circuits: An approach to design reliable ultra-low power circuits in the presence of process variation (2016) (4)
Sizing and placement of charge recycling transistors in MTCMOS circuits (2007) (4)
An energy-aware simulation model and transaction protocol for dynamic workload distribution in mobile ad hoc networks (2003) (4)
Fast Interconnect and Gate Timing Analysis for Performance Optimization (2006) (4)
Toward Adversary-aware Non-iterative Model Pruning through Dynamic Network Rewiring of DNNs (2022) (4)
Ground Plane Partitioning for Current Recycling of Superconducting Circuits (2020) (4)
An efficient semi-analytical current source model for FinFET devices in near/sub-threshold regime considering multiple input switching and stack effect (2014) (4)
10nm Gate-length junctionless gate-all-around (JL-GAA) FETs based 8T SRAM design under process variation using a cross-layer simulation (2015) (4)
Chromatic encoding: a low power encoding technique for digital visual interface (2003) (4)
Energy Efficiency in 5G Cellular Network Systems (2020) (4)
Power-Aware Bus Encoding Techniques for I/O and Data Buses in an Embedded System (2002) (4)
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A New Description of MOS Circuits at Switch-Level with Applications (Special Section on VLSI Design and CAD Algorithms) (1997) (3)
RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory (2020) (3)
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Energy Minimization Using Multiple Supply Voltages (1997) (3)
Green computing: reducing energy cost and carbon footprint of information processing systems (2009) (3)
State-of-health aware optimal control of plug-in electric vehicles (2014) (3)
A Timing Uncertainty-Aware Clock Tree Topology Generation Algorithm for Single Flux Quantum Circuits (2020) (3)
Runtime Deep Model Multiplexing for Reduced Latency and Energy Consumption Inference (2020) (3)
Lifetime-aware intrusion detection under safeguarding constraints (2005) (3)
A power-optimized low-energy elliptic-curve crypto-processor (2010) (3)
Optimizing the power delivery network in dynamically voltage scaled systems with uncertain power mode transition times (2010) (3)
Vector Compaction Using Dynamic Markov Models (2007) (3)
qMC: A Formal Model Checking Verification Framework For Superconducting Logic (2021) (3)
Logic Synthesis for Low Power (1996) (3)
Canonical form based boolean matching and symmetry detection in logic synthesis and verification (2006) (3)
Reinforcement learning algorithms for dynamic power management (2014) (3)
Low-Power Fanout Optimization Using Multi Threshold Voltages and Multi Channel Lengths (2009) (3)
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Dynamic Power Management of a Computer with Self Power-Managed Components (2012) (3)
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Reversible logic synthesis by quantum rotation gates (2013) (3)
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Vector Compaction Using Dynamic Markov Models (Special Section on VLSI Design and CAD Algorithms) (1997) (3)
PLATO P: PLA timing optimization by partitioning (1995) (3)
Reliability Enhancement of Inverter-Based Memristor Crossbar Neural Networks Using Mathematical Analysis of Circuit Non-Idealities (2021) (3)
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Parameterized Non-Gaussian Variational Gate Timing Analysis (2007) (3)
Proceedings of the 2021 International Symposium on Physical Design (2002) (3)
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Hybrid Cell Assignment and Sizing for Power, Area, Delay-Product Optimization of SRAM Arrays (2019) (3)
Efficient Peak Shaving in a Data Center by Joint Optimization of Task Assignment and Energy Storage Management (2016) (3)
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Fast INC-XOR codec for low-power address buses (2007) (3)
qSTA: A Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits (2020) (3)
PMP: performance-driven multilevel partitioning by aggregating the preferred signal directions of I/O conduits (2005) (3)
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Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis (2022) (2)
Design and Analysis of Segmented Routing Channels for Row-Based FPGAs 1 (2008) (2)
An accurate analytical I-V model for sub-90-nm MOSFETs and its application to read SNM modeling (2011) (2)
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qSSTA: A Statistical Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits (2020) (2)
Technology Mapping for Low Leakage Power with Hot-Carrier Effect Consideration (2002) (2)
qSeq: Full Algorithmic and Tool Support for Synthesizing Sequential Circuits in Superconducting SFQ Technology (2021) (2)
Interstice: Inverter-Based Memristive Neural Networks Discretization for Function Approximation Applications (2020) (2)
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Optimal choice of FinFET devices for energy minimization in deeply-scaled technologies (2015) (2)
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Therminator 2: A Fast Thermal Simulator for Portable Devices (2021) (2)
Low-power clustering with minimum logic replication for coarse-grained, antifuse based FPGAs (2006) (2)
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SHIELDING EFFECTIVENESS OF A LOSSY METALLIC ENCLOSURE (2013) (2)
TFA: a threshold-based filtering algorithm for propagation delay and slew calculation of high-speed VLSI interconnects (2004) (2)
Run-time Deep Model Multiplexing (2020) (2)
A Hyper-Parameter Based Margin Calculation Algorithm for Single Flux Quantum Logic Cells (2019) (2)
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Technology Mapping Using Fuzzy Logic (1994) (2)
Sla-based, energy-efficient resource management in cloud computing systems (2013) (2)
Event-driven and sensorless photovoltaic system reconfiguration for electric vehicles (2015) (2)
Hierarchical Deployment and Control of Energy Storage Devices in Data Centers (2015) (2)
Design optimization of sense amplifiers using deeply-scaled FinFET devices (2015) (2)
Considering the effect of process variations during the ISA extension design flow (2013) (2)
Energy-aware Scheduling of Jobs in Heterogeneous Cluster Systems Using Deep Reinforcement Learning (2019) (2)
Bounded algebra and current-mode digital circuits (1999) (2)
Battery cell configuration for organic light emitting diode display in modern smartphones and tablet-PCs (2012) (2)
Static Timing Analysis (STA) with Timing Bleed: Certifying Much Higher Performance for Rapid Single Flux Quantum (RSFQ) Logic (2020) (2)
An Energy-Efficient Inference Method in Convolutional Neural Networks Based on Dynamic Adjustment of the Pruning Level (2021) (2)
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Distributed load demand scheduling in smart grid to minimize electricity generation cost (2014) (2)
Logic Verification of Ultra-Deep Pipelined Beyond-CMOS Technologies (2020) (2)
Clustering Techniques for Coarse-grained , Antifuse-based FPGAs (2004) (2)
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FLOAT: Fast Learnable Once-for-All Adversarial Training for Tunable Trade-off between Accuracy and Robustness (2023) (2)
An Efficient False Path-Aware Heuristic Critical Path Selection Method with High Coverage of the Process Variation Space (2018) (2)
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A new description of CMOS circuits at switch-level (1997) (2)
High-Radix Design of a Scalable Montgomery Modular Multiplier With Low Latency (2022) (2)
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Hierarchical resource allocation and consolidation framework in a multi-core server cluster using a Markov decision process model (2017) (2)
TDP-ADMM: A Timing Driven Placement Approach for Superconductive Electronic Circuits Using Alternating Direction Method of Multipliers (2020) (2)
Design Automation Methodology and Tools for Superconductive Electronics (2018) (2)
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Propagation algorithm of behavior probability in power estimation based on multiple-valued logic (2000) (1)
A Leakage-aware Low Power Technology Mapping Algorithm Considering the Hot-Carrier Effect (2005) (1)
Cycle-Based Decomposition of Markov Chains With Applications to Low-Power Synthesis and Sequence Compaction for Finite State Machines (2006) (1)
A High-Performance Low-Power Barrett Modular Multiplier for Cryptosystems (2021) (1)
Impact of technology and voltage scaling on LEON3 processor performance and energy (2015) (1)
Low Power CAD Trends and Challenges (2008) (1)
High-Order Temporal Effects in Finite-State Machine Analysis (2007) (1)
A Flow-Oriented Approach to the Placement of Boolean Networks (1991) (1)
Factored Edge-Valued Binary Decision Diagrams 1 (1997) (1)
SpRRAM: A Predefined Sparsity Based Memristive Neuromorphic Circuit for Low Power Application (2018) (1)
Parameterized Block-Based Non-Gaussian Variational Gate Timing Analysis (2005) (1)
Analysis and optimization of sequential circuit element to combat single-event timing upsets (2010) (1)
Non-stationary effects in trace-driven power analysis (1999) (1)
A 125mV 2ns-access-time 16Kb SRAM design based on a 6T hybrid TFET-FinFET cell (2018) (1)
Towards Green Mobile Networks: Concurrent User Association and Dynamic Switching in Cells (2019) (1)
Power-aware virtual machine mapping in the data-center-on-a-chip paradigm (2016) (1)
A synthesis methodology for ECL circuits based on mixed voltage-current representation (1999) (1)
Profit maximization algorithms for utility companies in an oligopolistic energy market with dynamic prices and intelligent users (2016) (1)
Power supply and consumption co-optimization of portable embedded systems with hybrid power supply (2014) (1)
A Logic Verification Framework for SFQ and AQFP Superconducting Circuits (2021) (1)
Panel: Power Minimization in IC Design (1995) (1)
Robust design of power-efficient VLSI circuits (2011) (1)
Efficiency-driven design time optimization of a hybrid energy storage system with networked charge transfer interconnect (2015) (1)
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FP A Robust Framework for Floorplanning (1992) (1)
Flow-Through-Queue based Power Management for Gigabit Ethernet Controller (2007) (1)
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996, Monterey, California, USA, August 12-14, 1996 (1996) (1)
Analytical Modeling of Read Margin Probability Distribution Function of Static Random Access Memory Cells in Presence of Process Variations and Negative Bias Temperature Instability Effect (2012) (1)
Multimedia System Design : A Holistic Perspective (2004) (1)
Analysis of deeply scaled multi-gate devices with design centering across multiple voltage regimes (2015) (1)
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Capturing and mitigating the NBTI effect during the design flow for extensible processors (2013) (1)
A Life-Cycle Energy and Inventory Analysis of FinFET Integrated Circuits (2014) (1)
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Optimal Control of PEVs with a Charging Aggregator Considering Regulation Service Provisioning (2017) (1)
An Adaptive Memory-Side Encryption Method for Improving Security and Lifetime of PCM-Based Main Memory (2022) (1)
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A Fast and Efficient Conditional Learning for Tunable Trade-Off between Accuracy and Robustness (2022) (1)
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Postrouting Optimization of the Working Clock Frequency of Single-Flux-Quantum Circuits (2020) (1)
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OPTIMA: An Approach for Online Management of Cache Approximation Levels in Approximate Processing Systems (2021) (1)
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Optimal power switch design methodology for ultra dynamic voltage scaling with a limited number of power rails (2014) (1)
HiPerRF: A Dual-Bit Dense Storage SFQ Register File (2022) (1)
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X-NVDLA: Runtime Accuracy Configurable NVDLA based on Employing Voltage Overscaling Approach (2022) (1)
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Crosstalk-Affected Propagation Delay in Nanometer Technologies (2008) (1)
Loading-Aware Reliability Improvement of Ultra-Low Power Memristive Neural Networks (2021) (1)
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Performance Evaluation of Energy Efficient Routing Protocols for MANET (2020) (0)
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Power Estimation for Sequential Logic (1995) (0)
Non-Uniform Interconnect Temperature-Driven Buffer Insertion (2001) (0)
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Data Compaction with Dynamic Multiple-sector Encoding (2005) (0)
A Backlight Power Management Framework for Battery-Operated Systems (2004) (0)
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An Efficient Error Estimation Technique for Pruning Approximate Data-Flow Graphs in Design Space Exploration (2022) (0)
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CPU Consolidation versus Dynamic Voltage and Frequency Scaling in a Virtualized Multi-Core Server : Which is More Effective and When (0)
Scheduling for Batch Jobs in Distributed Datacenters (2013) (0)
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An Ultra-Low-Power High-Speed Cache Memory Comprising Hybrid TFET-FinFET SRAM Cells (2018) (0)
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Crosstalk Effect Analysis in VDSM Technologies (2005) (0)
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Robust Hybrid TFET-MOSFET Circuits in Presence of Process Variations and Soft Errors (2016) (0)
CGTA: current gain-based timing analysis for logic cells (2006) (0)
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Comité du programme technique / Technical Program Committee (2006) (0)
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Energy-efficient shutdown of circuit components and computing systems (2010) (0)
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Representatives IEEE Solid-State Circuits Society IEEE Neural Networks Society IEEE Sensors Council (2004) (0)
Multiple Supply Voltage Scheduling (1999) (0)
Session details: Low-power physical design (2002) (0)
Sparse Periodic Systolic Dataflow for Lowering Latency and Power Dissipation of Convolutional Neural Network Accelerators (2022) (0)
Charge Recycling inMTCMOSCircuits: Concept andAnalysis (2006) (0)
Session details: Hot leakage (2004) (0)

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