Michiel S. J. Steyaert

Q: What Schools Are Affiliated With Michiel S. J. Steyaert

Michiel S. J. Steyaert is affiliated with the following schools: KU Leuven

Michiel S. J. Steyaert's AcademicInfluence.com Rankings

Engineering

#3833

World Rank

#4962

Historical Rank

Electrical Engineering

#912

World Rank

#986

Historical Rank

engineering Degrees

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Engineering

Michiel S. J. Steyaert's Degrees

PhD Electrical Engineering KU Leuven
Masters Electrical Engineering KU Leuven

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Michiel S. J. Steyaert's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors (1997) (528)
A micropower low-noise monolithic instrumentation amplifier for medical purposes (1987) (509)
Low-IF topologies for high-performance analog front ends of fully integrated receivers (1998) (496)
Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages (1994) (331)
A 1.75-GHz polar modulated CMOS RF power amplifier for GSM-EDGE (2005) (289)
Low-noise voltage-controlled oscillators using enhanced LC-tanks (1995) (221)
Analog Circuit Design (2005) (218)
A 1-V 140-/spl mu/W 88-dB audio sigma-delta modulator in 90-nm CMOS (2004) (192)
A 1.75-GHz/3-V Dual-Modulus Divide-by-128/129 Prescaler in 0.7-μM CMOS (1996) (190)
Wireless CMOS Frequency Synthesizer Design (1998) (171)
A 10-bit 250-MS/s binary-weighted current-steering DAC (2004) (171)
A 1.8-V 6-bit 1.3-GHz flash ADC in 0.25-μm CMOS (2003) (162)
A 10.7-MHz 68-dB SNR CMOS continuous-time filter with on-chip automatic tuning (1992) (158)
A 2-GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization (2000) (151)
SFDR-bandwidth limitations for high speed high resolution current steering CMOS D/A converters (1999) (146)
Speed-power-accuracy tradeoff in high-speed CMOS ADCs (2002) (143)
An Accurate Statistical Yield Model for CMOS Current-Steering D/A Converters (2000) (136)
Design of Multi-Bit Delta-SIGMA A/D Converters (2002) (130)
A 700-MHz 1-W fully differential CMOS class-E power amplifier (2002) (128)
A CMOS temperature-compensated current reference (1988) (126)
Impact of transistor mismatch on the speed-accuracy-power trade-off of analog CMOS circuits (1996) (121)
A fully integrated spiral-LC CMOS VCO set with prescaler for GSM and DCS-1800 systems (1997) (107)
Design strategies and decoupling techniques for reducing the effects of electrical interference in mixed-mode IC's (1997) (104)
On the analysis of ΔΣ fractional-N frequency synthesizers for high-spectral purity (2003) (102)
A 250 mV 7.5 μW 61 dB SNDR SC ΔΣ Modulator Using Near-Threshold-Voltage-Biased Inverter Amplifiers in 130 nm CMOS (2012) (102)
Low-voltage low-power CMOS-RF transceiver design (2002) (99)
A layout-aware synthesis methodology for RF circuits (2001) (99)
A large-signal very low-distortion transconductor for high-frequency continuous-time filters (1991) (96)
Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS (2006) (95)
A 82% efficiency 0.5% ripple 16-phase fully integrated capacitive voltage doubler (2009) (93)
A 1.5-V-100-μW ΔΣ modulator with 12-b dynamic range using the switched-opamp technique (1997) (92)
An analog integrated polyphase filter for a high performance low-IF receiver (1995) (92)
Power supply rejection ratio in operational transconductance amplifiers (1990) (91)
CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration (2003) (90)
A 10–Bit 1.6-GS/s 27-mW Current-Steering D/A Converter With 550-MHz 54-dB SFDR Bandwidth in 130-nm CMOS (2010) (89)
Design and Analysis of a 90 nm mm-Wave Oscillator Using Inductive-Division LC Tank (2009) (89)
CYCLONE: automated design and layout of RF LC-oscillators (2000) (85)
A Design-Optimized Continuous-Time Delta–Sigma ADC for WLAN Applications (2007) (82)
Monolithic Capacitive DC-DC Converter With Single Boundary–Multiphase Control and Voltage Domain Stacking in 90 nm CMOS (2011) (82)
A/D Conversion Using Asynchronous Delta-Sigma Modulation and Time-to-Digital Conversion (2010) (80)
A 1.57 GHz fully integrated very low phase noise quadrature VCO (2001) (79)
A 1.8 GHz highly-tunable low-phase-noise CMOS VCO (2000) (78)
A 63,000 Q-factor relaxation oscillator with switched-capacitor integrated error feedback (2013) (78)
A 2.45-GHz 0.13-$\mu{\hbox {m}}$ CMOS PA With Parallel Amplification (2007) (76)
A fully integrated 900 MHz CMOS double quadrature downconverter (1995) (76)
A Fully Integrated CMOS 800-mW Four-Phase Semiconstant ON/OFF-Time Step-Down Converter (2011) (76)
A 130 nm CMOS 6-bit full nyquist 3GS/s DAC (2007) (75)
High-performance CMOS continuous-time filters (1993) (73)
Erratum to "A 1-V 140-μW 88-dB Audio Sigma-Delta Modulator in 90-nm CMOS" (2009) (72)
A high-speed 850-nm optical receiver front-end in 0.18-μm CMOS (2006) (70)
A high-voltage output driver in a 2.5-V 0.25-/spl mu/m CMOS technology (2005) (70)
Custom analog low power design: the problem of low voltage and mismatch (1997) (68)
A CMOS 1.8 GHz low-phase-noise voltage-controlled oscillator with prescaler (1995) (68)
A Single-Bit 500 kHz-10 MHz Multimode Power-Performance Scalable 83-to-67 dB DR CTΔΣ for SDR in 90 nm Digital CMOS (2010) (65)
EMC of Analog Integrated Circuits (2009) (64)
A 0.02mm2 65nm CMOS 30MHz BW all-digital differential VCO-based ADC with 64dB SNDR (2010) (64)
A fully-integrated 0.18μm CMOS DC-DC step-down converter, using a bondwire spiral inductor (2008) (63)
Full integration of extremely large time constants in CMOS (1991) (56)
A high-speed 850-nm optical receiver front-end in 0.18-/spl mu/m CMOS (2006) (55)
Toward sub 1 V analog integrated circuits in submicron standard CMOS technologies (1998) (55)
CMOS Integrated Capacitive DC-DC Converters (2012) (55)
Positive feedback frequency compensation for low-voltage low-power three-stage amplifier (2004) (55)
Design techniques for high-performance full-CMOS OTA-RC continuous-time filters (1992) (54)
A gradient-error and edge-effect tolerant switching scheme for a high-accuracy DAC (2004) (53)
Design of low-voltage low-power CMOS delta-sigma A/D converters (1999) (53)
A 60-GHz CMOS VCO Using Capacitance-Splitting and Gate–Drain Impedance-Balancing Techniques (2011) (52)
Fully Integrated Wide Input Voltage Range Capacitive DC-DC Converters: The Folding Dickson Converter (2015) (52)
Static and Dynamic Performance Limitations for High Speed D/A Converters (2004) (52)
A high-level design and optimization tool for analog RF receiver front-ends (1995) (50)
1-1-1 MASH $\Delta \Sigma$ Time-to-Digital Converters With 6 ps Resolution and Third-Order Noise-Shaping (2012) (49)
A 66 $\mu$ W 86 ppm$/^{\circ}$ C Fully-Integrated 6 MHz Wienbridge Oscillator With a 172 dB Phase Noise FOM (2009) (49)
Architectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps (2004) (48)
22.5 A 4×20Gb/s WDM ring-based hybrid CMOS silicon photonics transceiver (2015) (47)
A state-space behavioral model for CMOS class E power amplifiers (2003) (47)
Full analog CMOS integration of very large time constants for synaptic transfer in neural networks (1992) (46)
A 0.8-V, 8-/spl mu/W, CMOS OTA with 50-dB gain and 1.2-MHz GBW in 18-pF load (2003) (46)
A fully-integrated 0.18µm CMOS DC-DC step-up converter, using a bondwire spiral inductor (2007) (45)
A 2mm2 0.1-to-5GHz SDR receiver in 45nm digital CMOS (2009) (45)
A 12 bit 200 MHz low glitch CMOS D/A converter (1998) (45)
Optimal RF design using smart evolutionary algorithms (2000) (43)
A 1-GHz single-chip quadrature modulator (1992) (43)
Scalable Parasitic Charge Redistribution: Design of High-Efficiency Fully Integrated Switched-Capacitor DC–DC Converters (2016) (43)
A 50 MHz, standard CMOS, pulse equalizer for hard disk read channels (1997) (42)
Lna-Esd Co-Design for Fully Integrated CMOS Wireless Receivers (2005) (41)
12.2 A 94.6%-efficiency fully integrated switched-capacitor DC-DC converter in baseline 40nm CMOS using scalable parasitic charge redistribution (2016) (40)
A high-dynamic-range CMOS op amp with low-distortion output structure (1987) (40)
Comparison of a 65 nm CMOS Ring- and LC-Oscillator Based PLL in Terms of TID and SEU Sensitivity (2017) (40)
A 1.8-GHz low-phase-noise spiral-LC CMOS VCO (1996) (40)
Current mirror structure insensitive to conducted EMI (2005) (39)
A 1.25-GS/s 7-b SAR ADC With 36.4-dB SNDR at 5 GHz Using Switch-Bootstrapping, USPC DAC and Triple-Tail Comparator in 28-nm CMOS (2018) (39)
A 1-V, 1-MS/s, 88-dB sigma-delta modulator in 0.13-/spl mu/m digital CMOS technology (2005) (39)
A high speed, low voltage to high voltage level shifter in standard 1.2 V 0.13 μm CMOS (2006) (39)
Design techniques and implementation of an 8-bit 200-MS/s interpolating/averaging CMOS A/D converter (2003) (39)
A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter (2008) (37)
A 1.7mW 11b 1–1–1 MASH ΔΣ time-to-digital converter (2011) (37)
A Light-Load-Efficient 11/1 Switched-Capacitor DC-DC Converter With 94.7% Efficiency While Delivering 100 mW at 3.3 V (2015) (37)
A fully-integrated GPS receiver front-end with 40 mW power consumption (2002) (36)
A fully-integrated 130nm CMOS DC-DC step-down converter, regulated by a constant on/off-time control system (2008) (35)
Efficient reduction of electromagnetic interference effects in operational amplifiers (2007) (35)
EMI-Resistant CMOS Differential Input Stages (2010) (35)
Cmos Wireless Transceiver Design (2015) (34)
A 1.57-GHz fully integrated very low-phase-noise quadrature VCO (2002) (33)
DC-DC converters: From discrete towards fully integrated CMOS (2011) (33)
Area-driven optimisation of switched-capacitor DC/DC converters (2008) (32)
A first-order current-steering sigma-delta modulator (1990) (32)
An efficient, fully parasitic-aware power amplifier design optimization tool (2005) (32)
118GHz fundamental VCO with 7.8% tuning range in 65nm CMOS (2011) (32)
An 800mW fully-integrated 130nm CMOS DC-DC step-down multi-phase converter, with on-chip spiral inductors and capacitors (2009) (32)
A fully integrated gearbox capacitive DC/DC-converter in 90nm CMOS: Optimization, control and measurements (2010) (31)
Settling time analysis of third order systems (1998) (31)
A 175 Ms/s, 6 b, 160 mW, 3.3 V CMOS A/D converter (1996) (31)
All-digital differential VCO-based A/D conversion (2010) (30)
Behavioral analysis of self-oscillating class D line drivers (2005) (30)
A 60GHz 15.7mW static frequency divider in 90nm CMOS (2010) (30)
Hierarchical bottom-up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard (2006) (30)
Design and Assessment of a 6 ps-Resolution Time-to-Digital Converter With 5 MGy Gamma-Dose Tolerance for LIDAR Application (2012) (29)
An EMI Resisting LIN Driver in 0.35-micron High-Voltage CMOS (2007) (29)
Systematic design of high-accuracy current-steering D/A converter macrocells for integrated VLSI systems (2001) (29)
A 10 mW inductorless, broadband CMOS low noise amplifier for 900 MHz wireless communications (1998) (29)
A 2.56-GHz SEU Radiation Hard $LC$ -Tank VCO for High-Speed Communication Links in 65-nm CMOS Technology (2018) (28)
A 100-kHz to 20-MHz Reconfigurable Power-Linearity Optimized $G_m$–$C$ Biquad in 0.13-$\mu$ m CMOS (2008) (28)
An Oscillator Circuit For Electrostatically Driven Silicon-based One-port Resonators (1995) (27)
A 250mV 7.5μW 61dB SNDR CMOS SC ΔΣ modulator using a near-threshold-voltage-biased CMOS inverter technique (2011) (27)
Low supply voltage fully integrated CMOS VCO with three terminals spiral inductor (1999) (27)
A 1.65W fully integrated 90nm Bulk CMOS Intrinsic Charge Recycling capacitive DC-DC converter: Design & techniques for high power density (2011) (26)
A 10b 250MS/s binary-weighted current-steering DAC (2004) (26)
A 4.5 MGy TID-Tolerant CMOS Bandgap Reference Circuit Using a Dynamic Base Leakage Compensation Technique (2013) (26)
A CMOS 10GHz voltage controlled LC-oscillator with integrated high-Q inductor (2001) (26)
Energy Supply and ULP Detection Circuits for an RFID Localization System in 130 nm CMOS (2010) (25)
A High speed, Low Voltage to High Voltage Level Shifter in Standard 1.2V 0.13μm CMOS (2006) (25)
A 5 GHz CMOS low-noise amplifier with inductive ESD protection exceeding 3 kV HBM (2004) (25)
Low-voltage analog CMOS filter design (1993) (25)
High-Speed Optical Receivers with Integrated Photodiode in Nanoscale CMOS (2011) (25)
A 1.5 V, wide band 3 GHz, CMOS quadrature direct up-converter for multi-mode wireless communications (1998) (25)
A low power mm-wave oscillator using power matching techniques (2009) (25)
CMOS Cellular Receiver Front-Ends from Specification to Realization (2002) (25)
When hardware is free, power is expensive! Is integrated power management the solution? (2015) (24)
Broadband Opto-Electrical Receivers in Standard CMOS (2007) (24)
Design of High Voltage xDSL Line Drivers in Standard CMOS (2008) (24)
1-1-1 MASH ∆ Σ Time-to-Digital Converters with 6 ps Resolution and Third-Order Noise-Shaping (2012) (23)
A low power, 10-bit CMOS D/A converter for high speed applications (2001) (23)
Highly efficient xDSL line drivers in 0.35-μm CMOS using a self-oscillating power amplifier (2003) (23)
Power efficient 4.5Gbit/s optical receiver in 130nm CMOS with integrated photodiode (2008) (23)
On-chip gain reconfigurable 1.2V 24μW chopping instrumentation amplifier with automatic resistor matching in 0.13μm CMOS (2012) (22)
Kuijk Bandgap Voltage Reference With High Immunity to EMI (2010) (22)
A 5.5 V SOPA line driver in a standard 1.2 V 0.13 /spl mu/m CMOS technology (2005) (22)
A 0.25 /spl mu/m CMOS 17 GHz VCO (2001) (22)
A 500kHz-10MHz multimode power-performance scalable 83-to-67dB DR CTΔΣ in 90 nm digital CMOS with flexible analog core circuitry (2009) (22)
A monolithic 0.77W/mm2 power dense capacitive DC-DC step-down converter in 90nm Bulk CMOS (2011) (22)
Erratum to "A 66 µW 86 ppm°C Fully-Integrated 6 MHz Wienbridge Oscillator With a 172 dB Phase Noise FOM" [Jul 09 1990-2001] (2009) (21)
A colpitts LC VCO with Miller-capacitance gm enhancing and phase noise reduction techniques (2011) (21)
A 237mW aDSL2+ CO Line Driver in Standard 1.2V 0.13μ CMOS (2007) (21)
Design and Assessment of a Circuit and Layout Level Radiation Hardened CMOS VCSEL Driver (2007) (21)
Wavelength locking of a Si ring modulator using an integrated drop-port OMA monitoring circuit (2015) (21)
A novel approach for the automatic tuning of continuous time filters (1991) (20)
Very linear CMOS floating resistor (1990) (20)
A single-event upset robust, 2.2 GHz to 3.2 GHz, 345 fs jitter PLL with triple-modular redundant phase detector in 65 nm CMOS (2016) (20)
A fully integrated 74% efficiency 3.6V to 1.5V 150mW capacitive point-of-load DC/DC-converter (2010) (20)
A 0.1–5GHz Dual-VCO software-defined ∑Δ frequency synthesizer in 45nm digital CMOS (2009) (20)
A 1.65 W fully integrated 90 nm bulk cmos capacitive DC-DC converter with intrinsic charge recycling (2013) (19)
Three stage amplifier with positive feedback compensation scheme (2002) (19)
Integrated CMOS Circuits for Optical Communications (2004) (19)
A 2-V, low distortion, 1-GHz CMOS up-conversion mixer (1998) (19)
A 1.8–V, 6–bit, 1.3–GHz CMOS flash ADC in 0.25 µm CMOS (2002) (19)
10.1 A 1.1W/mm2-power-density 82%-efficiency fully integrated 3∶1 Switched-Capacitor DC-DC converter in baseline 28nm CMOS using Stage Outphasing and Multiphase Soft-Charging (2017) (19)
A high-speed POF receiver with 1 mm integrated photodiode in 180 nm CMOS (2010) (19)
A fully differential 1.5 V low-power CMOS operational amplifier with a rail-to-rail current-regulated constant-g/sub m/ input stage (1997) (18)
The optimization of GHz integrated CMOS quadrature VCO's based on a poly-phase filter loaded differential oscillator (2000) (18)
Power efficient distributed low-noise amplifier in 90 nm CMOS (2010) (18)
A 1.3dB NF CMOS LNA for GPS with 3kV HBM ESD–protection (2002) (18)
A 1.7mW 11b 1-1-1 MASH Delta-Sigma Time-to-Digital Converter (2011) (18)
Systematic Design of Analog IP Blocks (2003) (17)
Monolithic switched-capacitor DC-DC towards high voltage conversion ratios (2014) (17)
A CMOS 2V quadrature direct up-converter chip for DCS-1800 integration (2000) (17)
Phase noise up-conversion reduction for integrated CMOS VCOs (2000) (17)
A 13.5-Gb/s 5-mV-Sensitivity 26.8-ps-CLK–OUT Delay Triple-Latch Feedforward Dynamic Comparator in 28-nm CMOS (2019) (17)
Design of Single-Topology Continuously Scalable-Conversion-Ratio Switched- Capacitor DC–DC Converters (2019) (17)
DESIGN OF AN ENERGY-EFFICIENT PULSED UWB RECEIVER (2007) (17)
EMI resisting CMOS differential pair structure (2006) (17)
An integrated 10A, 2.2ns rise-time laser-diode driver for LIDAR applications (2009) (16)
Solving Static and Dynamic Performance Limitations for High Speed D/A Converters (2003) (16)
A continuous-time delta-sigma modulator for 802.11a/b/g WLAN implemented with a hierarchical bottom-up optimization methodology (2008) (16)
A Self-Calibrated Bang–Bang Phase Detector for Low-Offset Time Signal Processing (2016) (16)
A simulator-optimizer for the design of very low phase noise CMOS LC-oscillators (1999) (15)
A 2 V, low power, single-ended 1 GHz CMOS direct upconversion mixer (1997) (15)
A 0.1-5GHz dual-VCO software-defined sigma delta frequency synthesizer in 45nm digital CMOS (2009) (15)
Low-noise monolithic amplifier design: Bipolar versus CMOS (1991) (15)
An Efficient Methodology for Hierarchical Synthesis of Mixed-Signal Systems with Fully Integrated Building Block Topology Selection (2007) (15)
Dual-output capacitive DC-DC converter with power distribution regulator in 90 nm CMOS (2012) (15)
A 1 V 88 dB 20 kHz /spl Sigma//spl Delta/ modulator in 90 nm CMOS (2004) (15)
Analog circuit design : sensor and actuator interface electronics, integrated high-voltage electronics and power management, low-power and high-resolution ADC's (2004) (14)
MOBILE COMMUNICATION SYSTEMS AND POWER AMPLIFICATION (2006) (14)
CMOS: a paradigm for low power wireless? (2002) (14)
A 10.7 MHz CMOS OTA-R-C bandpass filter with 68 dB dynamic range on-chip automatic tuning (1992) (14)
A 5.5 Gbit/s optical receiver in 130 nm CMOS with speed-enhanced integrated photodiode (2010) (14)
Analog Circuit Design: Sensors, Actuators and Power Drivers; Integrated Power Amplifiers from Wireline to RF; Very High Frequency Front Ends (2008) (14)
RFID, where are they? (2009) (13)
Low-power monolithic signal-conditioning system (1990) (13)
High-speed accurate CMOS comparator (1988) (12)
A Wideband Low-Noise Variable-Gain Amplifier With a 3.4 dB NF and up to 45 dB Gain Tuning Range in 130-nm CMOS (2019) (12)
Design Considerations for Cascade $\Delta \Sigma $ ADC's (2008) (12)
Modelling and extraction of RF performance parameters of CMOS Electrostatic Discharge protection devices (2002) (12)
Analog Circuit Design: Low Voltage Low Power; Short Range Wireless Front-Ends; Power Management and DC-DC (2011) (12)
RF Integrated Circuits in Standard CMOS Technologies (1996) (12)
Design and implementation of a CMOS VCXO for FM stereo decoders (1988) (12)
Analog Circuit Design: Robust Design, Sigma Delta Converters, RFID (2011) (12)
Analog Integrated Polyphase Filters (1995) (12)
A CMOS source-buffered differential input stage with high EMI suppression (2008) (12)
A 120GHz quadrature frequency generator with 16.2GHz tuning range in 45nm CMOS (2013) (12)
A fully-integrated Wienbridge topology for ultra-low-power 86ppm/°C 65nm CMOS 6MHz clock reference with amplitude regulation (2008) (11)
Static and Dynamic Performance Limitations for High Speed D/a Converters (Kluwer International Series in Engineering and Computer Science, Secs 761.) (2004) (11)
Time Domain Model for Costas Loop Based QPSK Receiver (2012) (11)
Fully Integrated CMOS Frequency Synthesizers for Wireless Communications (2000) (11)
A high-density, matched hexagonal transistor structure in standard CMOS technology for high-speed applications (2000) (11)
Low-Power, 10-Gbps 1.5-Vpp differential CMOS driver for a silicon electro-optic ring modulator (2012) (11)
Basic DC-DC Converter Theory (2011) (11)
A DMOS integrated 320mW capacitive 12V to 70V DC/DC-converter for LIDAR applications (2009) (11)
A 5-GS/s 158.6-mW 9.4-ENOB Passive-Sampling Time-Interleaved Three-Stage Pipelined-SAR ADC With Analog–Digital Corrections in 28-nm CMOS (2020) (11)
A 500 mV 650 pW random number generator in 130 nm CMOS for a UWB localization system (2010) (11)
Analysis of the trade-off between bandwidth, resolution, and power in /spl Delta//spl Sigma/ analog to digital converters (1998) (11)
RF DAC's: output impedance and distortion (2006) (10)
Qualification method for a 1MGy-tolerant front-end chip designed in 65nm CMOS for the read-out of remotely operated sensors and actuators during maintenance in ITER (2015) (10)
High Performance OTA-R-C Continuous-Time Filters with Full CMOS Low Distortion Floating Resistors (1991) (10)
A folding dickson-based fully integrated wide input range capacitive DC-DC converter achieving Vout/2-resolution and 71% average efficiency (2015) (10)
The extraction of transistor mismatch parameters: the CMOS current-steering D/A converter as a test structure (2000) (10)
Nyquist AD Converters, Sensor Interfaces, and Robustness (2013) (10)
A 90nm CMOS mm-wave VCO using an LC tank with inductive division (2008) (10)
A 265 VRMS Mains Interface Integrated in 0.35 µm CMOS (2013) (10)
A current steering architecture for 12-bit high-speed D/A converters (1998) (9)
Improved EMI filtering current mirror structure requiring reduced capacitance (2006) (9)
Theory of PLL fractional-N frequency synthesizers (1998) (9)
Low-power, low-penalty, flip-chip integrated, 10Gb/s ring-based 1V CMOS photonics transmitter (2013) (9)
Design considerations of high-dynamic-range wide-band amplifiers in BiCMOS technology (1991) (9)
A 90nm CMOS 5-bit 2GS/s DAC for UWB transceivers (2010) (9)
ESD-RF co-design methodology for the state of the art RF-CMOS blocks (2005) (9)
Radiation effects upon the mismatch of identically laid out transistor pairs (2011) (9)
3.3 A 5GS/s 158.6mW 12b Passive-Sampling 8×-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOS (2019) (9)
A single shot TDC with 4.8 ps resolution in 40 nm CMOS for high energy physics applications (2015) (9)
Design and Analysis of High Efficiency Line Drivers for Xdsl (2004) (9)
40-nm CMOS Wideband High-IF Receiver Using a Modified Charge-Sharing Bandpass Filter to Boost Q-Factor (2018) (9)
A 2.5 V, 10 GHz Fully Integrated LC-VCO with Integrated High-Q Inductor and 30% Tuning Range (2002) (9)
Ultra-Wideband Pulse-based Radio (2009) (9)
Comparison of high impedance input topologies with low EMI susceptibility (2010) (9)
Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS (The International Series in Engineering and Computer Science) (2006) (9)
20.1 A light-load-efficient 11/1 switched-capacitor DC-DC converter with 94.7% efficiency while delivering 100mW at 3.3V (2015) (9)
A Polar Modulator Using Self-Oscillating Amplifiers and an Injection-Locked Upconversion Mixer (2008) (9)
A 250 mV 7.5 uW 61 dB SNDR CMOS SC Delta Sigma Modulator using a near threshold voltage biased CMOS inverter technique (2011) (9)
A 1-V 84-dB DR 1-MHz bandwidth cascade 3–1 Delta-Sigma ADC in 65-nm CMOS (2009) (8)
Two high-speed optical front-ends with integrated photodiodes in standard 0.18 /spl mu/m CMOS (2004) (8)
A single bit 6.8mW 10MHz power-optimized continuous-time ΔΣ with 67dB DR in 90nm CMOS (2009) (8)
Single chip CMOS RF transceivers: wishful thinking or reality (2001) (8)
A low power, area efficient limiting amplifier in 90nm CMOS (2009) (8)
A standard cell based all-digital Time-to-Digital Converter with reconfigurable resolution and on-line background calibration (2011) (8)
A Fully Integrated Class 1 Bluetooth 0.25 μm CMOS PA (2002) (8)
A 120GHz fully integrated 10Gb/s wireless transmitter with on-chip antenna in 45nm low power CMOS (2013) (8)
17 bit 4.35 mW 1 kHz Delta Sigma ADC and 256-to-1 multiplexer for remote handling instrumentation equipment (2013) (8)
A Full CMOS 1.5 GHz Highly Linear Broadband Downconversion Mixer (1994) (8)
Snapback circuit model for cascoded NMOS ESD over-voltage protection structures (2003) (8)
Speed-power-accuracy trade-off in high-speed ADCs: what about nano-electronics? (2001) (8)
Analog circuit design : scalable analog circuit design, high speed D/A converters, RF power amplifiers (2002) (8)
MIMO Switched-Capacitor DC–DC Converters Using Only Parasitic Capacitances Through Scalable Parasitic Charge Redistribution (2017) (8)
A 0.7mW 13b temperature-stable MASH ΔΣ TDC with delay-line assisted calibration (2011) (7)
Radiation Effects in CMOS Technology (2018) (7)
Compact low swing gearbox-type integrated capacitive DC/DC converter (2010) (7)
Analog Circuit Design: High-speed Clock and Data Recovery, High-performance Amplifiers, Power Management (2010) (7)
A 186 to 212 GHz Downconverter in 90 nm CMOS (2012) (7)
An organic integrated capacitive DC-DC up-converter (2010) (7)
An I/Q based CMOS Pulsed Ultra Wideband Receiver Front End for the 3.1 to 10.6 GHz Band (2006) (7)
A 36.4dB SNDR @ 5GHz 1.25GS/s 7b 3.56mW single-channel SAR ADC in 28nm bulk CMOS (2017) (7)
A Fully Integrated Pinless Long-Range Power Supply with On-Chip Antenna for Scavenging-Based RFID Tag Powering (2009) (7)
A 700MHz, 1W fully differential class E power amplifier in CMOS (2000) (7)
Schottky Photodiodes in Bulk CMOS for High-Speed 1310/1550 nm Optical Receivers (2018) (7)
Accuracy improvement of the output impedance model for capacitive down-converters (2012) (7)
Highly sensitive, low-power, 10-20Gb/s transimpedance amplifier based on cascaded CMOS inverter gain stages (2014) (7)
A 6mW, 1.5dB NF CMOS LNA for GPS with 3kV HBM ESD-protection (2002) (7)
Ultra-Wideband Pulse-based Radio: Reliable Communication over a Wideband Channel (2009) (7)
An Externally Trimmed Integrated DC Current Regulator Insensitive to Conducted EMI (2008) (7)
Current-Steering DAC (2004) (7)
Analog Circuit Design: High-Speed A-D Converters, Automotive Electronics and Ultra-Low Power Wireless (2006) (7)
Systematic design of a 200 MS/s 8-bit interpolating A/D converter (2002) (7)
An 11 GHz Dual-Sided Self-Calibrating Dynamic Comparator in 28 nm CMOS (2018) (6)
Multiple Event Time-to-Digital Conversion-Based Pulse Digitization for a 250 MHz Pulse Radio Ranging Application (2011) (6)
Flash A/D specifications for multi-bit /spl Delta//spl Sigma/ A/D converters (1999) (6)
Monitoring optical modulation amplitude using a low-power CMOS circuit for thermal control of Si ring transmitters (2014) (6)
Conceptual design of a MGy tolerant integrated signal conditioning circuit in 130nm and 700nm CMOS (2012) (6)
A gated ring oscillator based parallel-TDC system with digital resolution enhancement (2009) (6)
Performance study of CMOS power amplifiers (2001) (6)
A true two-quadrant fully integrated switched capacitor DC-DC converter supporting vertically stacked DVS-loads with up to 99.6% efficiency (2017) (6)
A high-speed fully integrated optical receiver in standard 130nm CMOS (2008) (6)
Analog Circuit Design: Fractional-N Synthesizers, Design for Robustness, Line and Bus Drivers (2003) (6)
The Impact of Statistical Design on the Area of High Performance CMOS Current-Steering D/A Converters (2001) (6)
A CMOS 240 Mb/s optical receiver with a transimpedance-bandwidth of 18 THz/spl Omega/ (1994) (6)
Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter (2002) (6)
Analog Circuit Design: RF Circuits: Wide band, Front-Ends, DAC's, Design Methodology and Verification for RF and Mixed-Signal Systems, Low Power and Low Voltage (2005) (6)
A Single-Topology Continuously-Scalable-Conversion-Ratio Fully Integrated Switched-Capacitor DC-DC Converter with 0-to-2.22V Output and 93% Peak-Efficiency (2018) (5)
Linearity guidelines for gm-C biquad filter design using architecture optimization with Volterra analysis (2007) (5)
Differential input topologies with immunity to electromagnetic interference (2011) (5)
Behavioral model for D/A converters as VSI virtual components (1998) (5)
A Difference Reference Voltage Buffer for ΔΣ-Converters (2002) (5)
A High Frequency Large Signal Very Low Distortion Transconductor (1990) (5)
From light to electric current—The photodiode (2011) (5)
Fast switch bootstrapping for GS/s high-resolution analog-to-digital converter (2015) (5)
Ultra low power detection circuits in 130nm CMOS for a wireless UWB localization system (2009) (5)
MIMO Switched-Capacitor converter using only parasitic capacitance with Scalable Parasitic Charge Redistribution (2016) (5)
A wideband linearisation technique for non–linear oscillators using a multi–stage polyphase filter (1999) (5)
Dynamic substrate resistance snapback triggering of ESD protection devices (2003) (5)
Design and Assessment of a Robust Voltage Amplifier with 2.5 GHz GBW and >100 kGy Total Dose Tolerance (2011) (5)
EMI resisting smart-power integrated LIN driver with reduced slope pumping (2008) (5)
A New CMOS Current Reference (1987) (5)
A full 1.2 mu m CMOS ECL-CMOS-ECL converter with subnanosecond settling times (1990) (5)
Modelling, design and characterization of Schottky diodes in 28nm bulk CMOS for 850/1310/1550nm fully integrated optical receivers (2017) (5)
A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications (2006) (4)
Low-voltage BIMOS AM front-end amplifier (1990) (4)
A low-power mixing DAC IR-UWB-receiver (2008) (4)
Analog Circuit Design: Smart Data Converters, Filters on Chip, Multimode Transmitters (2009) (4)
A wideband IMRR improving quadrature mixer/LO generator (2001) (4)
A low noise clock generator for high-resolution time-to-digital convertors (2016) (4)
RF CMOS Design, Some Untold Pitfalls (2001) (4)
A 120 GHz QVCO with 16.2 GHz tuning range resistent against VCO pulling in 45 nm CMOS (2015) (4)
A Fully Integrated Switched-Capacitor-Based AC–DC Converter for a 120 VRMS Mains Interface (2019) (4)
Stacking Isolated SC Cores for High-Voltage Wide Input Range Monolithic DC–DC Conversion (2020) (4)
Optimization of a fully integrated low power CMOS GPS receiver (2002) (4)
40mW Power Consumption (2002) (4)
A power amplifier driver using self-oscillating pulse-width modulators (2007) (4)
Advanced modelling and parameter extraction of the MOSFET ESD breakdown triggering in the 90nm CMOS node technologies (2004) (4)
A 1.8-V 6-bit flash ADC with rail-to-rail input range in 0.18 μm CMOS (2003) (4)
Low-Voltage Low-Power CMOS-RF (2002) (4)
High Data Rate Transmitter Circuits: RF CMOS Design and Techniques for Design Automation (2003) (4)
A capacitive DC-DC converter for stacked loads with wide range DVS achieving 98.2% peak efficiency in 40nm CMOS (2018) (4)
A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits (2004) (4)
4.5 A 1V 88dB 20kHz Σ∆ Modulator in 90nm CMOS (2004) (4)
A 3.5Gbit/s post-amplifier in 0.18/spl mu/m CMOS (2005) (4)
Circuit Design Aspects of Multi-Bit Delta-Sigma Converters (2002) (4)
A 10 ps Resolution 1.6 ns Tuning Range CMOS Delay Line for Clock Deskewing in Data Recovery Systems (1995) (4)
A mathematical steady-state design model for fully-integrated boost and buck DC–DC converters (2012) (4)
A Novel Bootstrapped Switch Design, Applied in a 400 MHz Clocked ΔΣ ADC (2006) (4)
Radiation-Tolerant Delta-Sigma Time-to-Digital Converters (2015) (4)
A quadrature direct digital downconverter (2002) (4)
Schottky diodes in 40nm bulk CMOS for 1310nm high-speed optical receivers (2017) (4)
A MGy Radiation-Hardened Sensor Instrumentation SoC in 65nm CMOS Technology (2014) (4)
The folding dickson converter: A step towards fully integrated wide input range capacitive DC-DC converters (2014) (4)
Optimization of fully-integrated power converter circuits comprising tapered inductor layout and temperature effects (2012) (4)
A Double Quadrature Topology for High Accuracy Upconversion in CMOS Transmitters (1996) (4)
Digital communication systems: the problem of analog interface circuits (2005) (3)
Low-phase-noise gigahertz voltage-controlled oscillators in CMOS (1995) (3)
High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices (2003) (3)
Knowledge- and optimization-based design of RF power amplifiers (2004) (3)
A Fully Integrated CMOS Phase-Locked Loop Frequency Synthesizer (1998) (3)
A 1310/1550 nm Fully-Integrated Optical Receiver with Schottky Photodiode and Low-Noise Transimpedance Amplifier in 40 nm Bulk CMOS (2018) (3)
RF-ESD Co-Design for High Performance CMOS LNAs (2003) (3)
Design of high-speed analog-to-digital interface in digital technologies (2001) (3)
Optimizing the Dimensions of Driver and Power Transistor in Switching CMOS RF Amplifiers (2002) (3)
Generation of Gbit/s modulated millimeter wave signals for measurement (2011) (3)
'UIDELINES FOR IMPLEMENTATION OF #-/3 MULTIBIT OVERSAMPLING MODULATORS (1999) (3)
Design, assessment and modeling of an integrated 0.4 µm SiGe Bipolar VCSEL driver under γ-radiation (2008) (3)
A GmC filter design methodology for high-speed continuous-time sigma-delta A/D converters in a deep sub-micron technology (2005) (3)
Output impedance analysis of digital-to-analogue converters (2011) (3)
Design of a MGy tolerant instrumentation amplifier using a correlated double sampling technique in 130 nm CMOS (2011) (3)
An Improved Current Mirror Structure Insensitive to Conducted EMI (2005) (3)
A modelling and design approach for push/pull switched capacitor DC-DC converters (2016) (3)
Comparator-Based Switched-Capacitor Delta-Sigma A/D Converters (2010) (3)
Analog, Mixed-Signal, and RF Circuit Design in Nanometer CMOS (2007) (3)
Design and Radiation Assessment of Optoelectronic Transceiver Circuits for ITER (2008) (3)
Analog circuit design : structured mixed-mode design, multi-bit sigma-delta converters, short range RF circuits (2002) (3)
Stochastic response surface method for dimensioning accelerator cavities (2012) (3)
High ESD performance, low power CMOS LNA for GPS applications (2003) (3)
Wavelength Locking of a Si Ring Modulator Using an Integrated Drop-Port OMA Monitoring Circuit (2016) (3)
Fully Integrated Low Phase-Noise VCOs: From Special Processing to Standard CMOS (2000) (3)
From AC to DC and reverse, the next fully integrated power management challenge (2014) (2)
Analysis of fractional spur reduction using ΣΔ-noise cancellation in digital-PLL (2009) (2)
High-frequency measurement procedure for fully differential building blocks (1997) (2)
17 bit 4.35mW 1kHz Sigma delta ADC and 256-to-1 multiplexer for remote handling instrumentation equipment (2012) (2)
Monolithic power management front end with high voltage dense energy storage for wireless powering (2013) (2)
RF-ESD design and measurement of CMOS LNAs: a comparison between diode and inductive protection (2005) (2)
Low Voltage PA design in standard CMOS (2003) (2)
Fully integrated power management: The missing link? (2017) (2)
Design of a Class E Power Amplifier with LDMOS in Standard CMOS (2005) (2)
A 13.5-Gb/s 5-mV-Sensitivity 26.8-ps-CLK–OUT Delay Triple-Latch Feedforward Dynamic Comparator in 28-nm CMOS (2019) (2)
HIGH VOLTAGE DEVICES FOR RF POWER AMPLIFIERS: AN ADVANTAGE? (2004) (2)
Radiation Tolerant, Low Noise Phase Locked Loops in 65 nm CMOS Technology (2018) (2)
A radiation hard delta Sigma ADC in 130 nm CMOS (2012) (2)
An integrated DC current regulator with high EMI suppression (2007) (2)
A MGy radiation-hardened sensor instrumentation link for nuclear reactor monitoring and remote handling (2015) (2)
A remotely-powered, 20 Mb/s, 5.35 pJ/bit impulse-UWB WSN tag for cm-accurate-localization sensor networks (2014) (2)
MGy Radiation Assessment of a Space-Graded Amplifier and ADC (2015) (2)
A MGy, Low-Offset Programmable Instrumentation Amplifier IC for Nuclear Applications (2015) (2)
RF Communication Circuits (2000) (2)
Active load for differential amplifier with high output impedance and reduced supply voltage (2008) (2)
Proof of General Switched-Capacitor DC-DC Converter Law using Voltage-Domain Analysis (2018) (2)
Design Considerations for OTA-C Integrators and Full CMOS Resistors (1993) (2)
A Mathematical Model: Boost and Buck Converter (2011) (2)
Design of broadband low-noise amplifiers in deep-submicron CMOS technologies (1999) (2)
Modeling, Design, Assessment of a 0.4 $\mu{\hbox {m}}$ SiGe Bipolar VCSEL Driver IC Under $\gamma $ -Radiation (2009) (2)
Ultra low voltage ΔΣ modulation using biased inverters in 130nm CMOS (2012) (2)
A 2.5 MSample/s multi-bit /spl Delta//spl Sigma/ CMOS ADC with 95 dB SNR (2000) (2)
Radiation-tolerant CMOS timing readout circuits for laser detection and ranging in nuclear reactors (2012) (2)
A Charge-Sharing Bandpass Filter Topology with Boosted Q-Factor in 40-NM CMOS (2018) (2)
Radiation Hardened by Design (2015) (2)
An Ultra-Low-Power, Batteryless Microsystem for Wireless Sensor Networks (2012) (2)
Advanced Multiphasing: Pushing the Envelope of Fully Integrated Power Conversion (2019) (2)
The tapered matrix amplifier: a low-power high-gain broadband amplifier (2012) (2)
A 200GHz downconverter in 90nm CMOS (2011) (2)
Advanced Multiphasing Switched-Capacitor DC-DC Converters (2020) (2)
Transimpedance Amplifier Design (2007) (2)
Inductive DC-DC Converter Topologies (2011) (2)
A 2-V, Low Distortion, 1-GHz (1998) (2)
A 2.56 GHz Radiation Hard Phase Locked Loop ASIC for High Speed Serial Communication Links (2018) (1)
1310/1550 nm Optical Receivers With Schottky Photodiode in Bulk CMOS (2020) (1)
Transceivers in the Frequency Domain (2003) (1)
High Voltage Implementations in Standard CMOS (2008) (1)
A CMOS VCXO for FM Stereo Decoders (1987) (1)
Optical Receiver with Schottky Photodiode and TIA with High Gain Amplifier in 28nm Bulk CMOS (2019) (1)
IMPEDANCE TRANSFORMATION AND POWER COMBINATION (2006) (1)
EMI Resisting Bandgap References and Low Dropout Voltage Regulators (2010) (1)
A MGy Radiation-Hardened Sensor Instrumentation SoC in a Commercial CMOS Technology (2014) (1)
A Bandwidth Enhanced Transimpedance Amplifier with Improved Noise Performance (2011) (1)
EMI resisting voltage regulator with large signal PSR up to 1GHz (2013) (1)
Continuous-time Quadrature Modulator Receivers (2002) (1)
A Fully Integrated Switched-Capacitor Based AC-DC Converter for a 120VRMS Mains Interface (2018) (1)
Design and assessment of a 6 ps-resolution time-to-digital converter with 5 MGy gamma-dose tolerance for nuclear instrumentation (2011) (1)
Towards the fully integration of wireless front-end circuits in deep submicron technologies (2003) (1)
High Voltage Design Considerations (2008) (1)
A 28 nm CMOS Triple-Latch Feed-Forward Dynamic Comparator With <27 ps / 1 V and <70 ps / 0.6 V Delay at 5 mV-Sensitivity (2022) (1)
A high performance RDS-detector for low voltage applications (1995) (1)
Linear equalization filter for PMMA fiber channels (2013) (1)
A 30GHz-BW < -57dB-IM3 Direct RF Receiver Analog Front End in 16nm FinFET (2022) (1)
A power-supply decoupling method for mixed-mode low voltage, low power integrated circuits (1996) (1)
Converter Topologies and Fundamentals (2013) (1)
A 7.5 - 42V Input High-VCR Monolithic DC-DC Converter Using Stacked Isolated SC Cores (2019) (1)
A 12-bit 12.5 MS/s multi-bit ΔΣ CMOS ADC (2000) (1)
A 265VRMS mains interface integrated in 0.35μm CMOS (2012) (1)
A stacked full-bridge topology for high voltage DC-AC conversion in standard CMOS technology (2013) (1)
In the Pursuit of the Optimal Accuracy–Speed–Power Analog-to-Digital Converter Architecture: A mathematical framework (2022) (1)
Efficient optimization of fully-integrated inductive DC–DC converters comprising tapered inductor layout synthesis and temperature effects (2014) (1)
A High Level Design Methodology for the Power Optimisation of Highly Integrated Receiver Architectures (1995) (1)
Monolithic CMOS Fractional-N Frequency Synthesizer Design for High Spectral Purity (2003) (1)
Wavelength locking of a Si photonic ring transmitter using a dithering-based OMA stabilizing feedback loop (2016) (1)
Integrated CMOS Optical Receivers (2004) (1)
Voltage-Controlled Oscillator Phase Noise (1998) (1)
Interference and Distortion in Pulsed Ultra Wideband Receivers (2006) (1)
150 Mbit/s Cmos Led-driver And Pin-receiver Ic For Optical Communication. (1992) (1)
Distortion in polar modulated CMOS RF power amplifiers (2009) (1)
Monolithic 1310nm 1Gb/s Optical Receiver with Schottky Photodiode in 40nm Bulk CMOS (2018) (1)
Monolithic integration of a class DE inverter for on-chip resonant DC-DC converters (2012) (1)
High-Ratio Voltage Conversion in CMOS for Efficient Mains-Connected Standby (2016) (1)
Advanced Design of Schottky Photodiodes in Bulk CMOS for High Speed Optical Receivers (2020) (1)
Pico-second TDC for HEP (2015) (1)
A > 4 MGy radiation tolerant 8 THzOhm transimpedance amplifier with 50 dB dynamic range (2013) (1)
A 0.18/spl mu/m CMOS switched capacitor voltage modulator (2005) (1)
Radiation Hardened CMOS Integrated Circuits for Time-Based Signal Processing Conclusion (2018) (1)
Radiation and temperature effects on integrated circuits (2012) (0)
Fully Integrated Switched-Capacitor Fundamentals (2020) (0)
Phase-Locked Loop Frequency Synthesizers (1998) (0)
DC–DC Converter Prototypes (2013) (0)
Performance of Transceivers (2003) (0)
Low-Jitter Relaxation Oscillators (2015) (0)
An active guarding technique for substrate noise suppression on LC-tank oscillators (2011) (0)
Full Integration of a Standard CMOS Optical Transmitter (2004) (0)
Advanced Multiphasing: Pushing the Limits of Fully Integrated Switched-Capacitor Converters (2019) (0)
Integrated CMOS Low-Noise Amplifiers (2005) (0)
The On-Chip Automatic Tuning of Continuous-Time Filters (1993) (0)
Alternative peak detection system for high-speed amplitude measurement in EIT systems (1994) (0)
Low-Noise Amplifiers in CMOS Wireless Receivers (2005) (0)
A Fully-Integrated 6:1 Cascaded Switched-Capacitor DC-DC Converter Achieving 74% Efficiency at 0.1W/mm2 (2019) (0)
Switched RF Transmitters (2008) (0)
A Design Methodology for High Performance CMOS Current Steering D/A Converters (2004) (0)
A first-order current-steering sigma-delta modulator (1990) (0)
LINE DRIVERS: EFFICIENCY, LINEARITY, BANDWIDTH The Last Barrier in Wire-line Communications (2003) (0)
A high-speed, direct up-conversion transmitter for cable applications using very linear 0.5 µm "Cold" CMOS mixers (1998) (0)
Radiation Experiments on CMOS PLLs (2018) (0)
Linearity-enhanced Low-Power Distributed Low-Noise Amplifier in CMOS (2011) (0)
Chapter 8 SINGLE-LOOP MULTI-BIT SIGMA-DELTA MODULATORS (0)
Optical Receiver Fundamentals (2007) (0)
A 186 to 212 GHz Downconverter in 90 nm CMOS (2012) (0)
Class D Self-Oscillating Line Drivers (2003) (0)
High-Level Synthesis (2003) (0)
FP 12.1: Toward Sub 1V Analog Integrated Circuits in Submicron Standard CMOS Technologies (1998) (0)
Voltage-Domain Analysis (2020) (0)
Design of a radiation-tolerant Time-to-Digital Converter for LIDAR application (2010) (0)
Single Shot Time-to-Digital Converters (2018) (0)
Standard CMOS Photodiodes (2007) (0)
High-Frequency CMOS Prescalers (1998) (0)
High Voltage Line Driver Realisations (2008) (0)
Realizing a CMOS Transceiver (2003) (0)
Design of a radiation tolerant front-end for a LIDAR receiver with mm accuracy in 0.13 μm CMOS (2008) (0)
Electronic dispersion correction circuit for Plastic Optical Fiber channels (2013) (0)
From current to voltage—The transimpedance amplifier (2011) (0)
Efficient optimization of fully-integrated inductive DC–DC converters comprising tapered inductor layout synthesis and temperature effects (2013) (0)
A Single-Stage Monolithic Mains Interface in 0.35 μm CMOS (2016) (0)
ANALYSIS AND DESIGN OF THE CLASS E POWER AMPLIFIER IN CMOS (2006) (0)
Modulation-Aware Error Coding (2009) (0)
Reference Design of a Pulse-Based Receive Unit (2009) (0)
Nonlinear Loaded Open-Loop Amplifiers (2009) (0)
A mathematical steady-state design model for fully-integrated boost and buck DC–DC converters (2011) (0)
Transistor Mismatch: Evolution and Relevance (2004) (0)
Background on Time-to-Digital Converters (2015) (0)
A 120 GHz QVCO with 16.2 GHz tuning range resistent against VCO pulling in 45 nm CMOS (2014) (0)
Dynamic Behaviour of Current Steering D/A Converters (2004) (0)
ECCTD ’ 01-European Conference on Circuit Theory and Design , August 28-31 , 2001 , Espoo , Finland A CMOS 1 . 57 GHz Quadrature-VCO for a GPS Receiver Front-End (2001) (0)
A 7.5mW, 1n1-bitContinuous-Time Sigma-Delta A/D Converter forWLAN Applications (2006) (0)
Fully Integrated DC-DC converters: Topologies and Control (2011) (0)
Design and qualification of a MGy tolerant front - end chip in 65 nm CMOS for the read - out of remotely operated sensors and actuators during maintenance in ITER (2014) (0)
Accuracy improvement of the output impedance model for capacitive down-converters (2012) (0)
LOW-POWER LOW-VOLTAGE SIGMA-DELTA MODULATORS: 90 nm AN ADVANTAGE? (2004) (0)
Development of a precise and robust time-to-digital converter (2009) (0)
Systematic Design of High-Performance Data Converters (2002) (0)
MIMO Switched-Capacitor Converter Using Parasitic Coupling (2020) (0)
Control of Fully Integrated DC-DC Converters in CMOS (2012) (0)
An integrated LIN driver with high EMI immunity (2007) (0)
A High-Linearity Sigma-Delta Topology Suitable for Low-Voltage Applications (2003) (0)
CMOS implementation of ultra-wideband systems (2005) (0)
An 11/1 Switched-Capacitor DC–DC Converter for Low Power from the Mains (2016) (0)
High voltage DC–AC conversion in standard 1.2 V CMOS technology (2015) (0)
Bonding Wire Inductance VCOs (1998) (0)
Scalable Parasitic Charge Redistribution (2020) (0)
picoTDC: Design of a TDC with picosecond resolution in 65nm (2016) (0)
Building Blocks for CMOS Transceivers (2003) (0)
A CMOS POWER AMPLIFIER FOR BLUETOOTH (2006) (0)
with 95dB SNR (2000) (0)
Analysis and Performance Comparison of a Cascade 3-1 Delta-Sigma Topology (2007) (0)
Toward Monolithic Integration of Mains Interfaces (2016) (0)
Transmitters and Receivers (2003) (0)
High Voltage xDSL Line Drivers in Nanometer Technologies (2008) (0)
oise Voltage-Controlle ators Using E anced LC- (1995) (0)
Design and Power Considerations (1999) (0)
Increasing the speed—The equalizer (2011) (0)
Power Efficient Reconfigurable Baseband Filters for Multimode Radios (2009) (0)
High-Performance Realizations of Continuous-Time Filters (1993) (0)
5 MGy γ-dose tolerant MASH ΔΣ Time-to-Digital Converter with 5.6 ps resolution and 1.7 mW power consumption (2011) (0)
Time-Domain Signal Processing (2018) (0)
SINGLE-LOOP MULTI-BIT SIGMA-DELTA MODULATORS (2003) (0)
Post-Amplifier Design (2007) (0)
Spatially oversampled TDC with digital resolution enhancement (2011) (0)
AnI/Qbased CMOSPulsed Ultra Wideband Receiver Front Endforthe3.1to10.6 GHzBand (2006) (0)
The SOPA xDSL Line Driver (2008) (0)
A low jitter PLL frequency synthesizer for high resolution TDCs in 65nm CMOS technology (2015) (0)
A 89dBΩ, 400Mhz transimpedance ampliﬁer with improved radiation and temperature tolerance and 1:1600 dynamic range (2012) (0)
A fully integrated 2 GHz LC–VCO with phase noise of –125 dBc/Hz at 600kHz (1999) (0)
Design of Continuous Time Bandpass ΔΣ modulators in CMOS (2001) (0)
Systematic design of a 14-bit 150-MS/s CMOS current-steering dia converter (2000) (0)
CMOS RF Power Amplifier (2005) (0)
Design techniques for low power high bandwidth upconversion in CMOS (2002) (0)
Two-Stage Approach for Compact and Efficient Low Power from the Mains (2016) (0)
Design of mm-wave circuits in CMOS (2010) (0)
A 1 MGy TID Radiation-Tolerant 56 µW CMOS Temperature Sensor with ±1.7°C Accuracy (2015) (0)
Stage Outphasing and Multiphase Soft-Charging (2020) (0)
Towards the fully integration of wireless front-end circuits in deep-submicron technologies (2003) (0)
Control of Fully Integrated Capacitive Converters (2013) (0)
The tapered matrix amplifier: a low-power high-gain broadband amplifier (2012) (0)
Switched-Capacitor DC–DC in Bulk CMOS for On-Chip Power Granularization (2016) (0)
TP 4.6: A 900mV 40μW Switched Opamp DeltaSigma Modulator with 77dB Dynamic Range (1998) (0)
The CMOS Optical Receiver (2004) (0)
High voltage DC–AC conversion in standard 1.2 V CMOS technology (2015) (0)
Pulse based Wideband Radio: Synchronization and Channel Monitoring (2007) (0)
The D/A Converter: Functionality and Specifications (2004) (0)
Electrical Interference in Mixed-Mode Integrated Circuits (2004) (0)
Basic EMC Concepts at IC Level (2010) (0)
The Switched Opamp Technique (1999) (0)
CMOS D/A Converter Architectures (2004) (0)
Development of a controller platform for educational projects: A case study (2013) (0)
A 5MGy gamma-dose tolerant Delta-Sigma Time-to-Digital Converter with 5.6ps resolution for LIDAR application (2011) (0)
Design of a frequency reference based on a PVT-independent transmission line delay (2014) (0)
High-Speed Flash ADCs (2003) (0)
Fully Integrated Switched-Capacitor DC-DC: Bulk CMOS Oriented Design (2012) (0)
Planar-Inductor VCOs (1998) (0)
Mixed-Signal CMOS RF Integrated Circuits (2005) (0)
Towards a rail-to-rail voltage—The post amplifier (2011) (0)
Benefits of ISI in the Indoor Environment (2009) (0)
Monolithic Capacitive Power Converters Towards Higher Voltage Conversion Ratios (2014) (0)
High frequency power supply rejection in analog circuits (1991) (0)
Optical communication—A high-level perspective (2011) (0)
A new feedback strategy to boost Q-factor of charge-sharing bandpass filters (2020) (0)
Analysis of Fractional Spur Reduction using SigmaDelta-noise Cancellation in Digital-PLL. (2009) (0)
Detailed Study of the Common-Source LNA with Inductive Degeneration (2005) (0)
Monolithic Switched-Capacitor Power Converters: Present Trends and Future Predictions (2016) (0)
Modulation-Aware Decoding: Signal Reconstruction (2009) (0)
A radiation hardened TDC with < 10 ps resolution and improved recovery time from single events in 40 nm CMOS (2014) (0)
Σ Modulator Topologies (1999) (0)
Sensitivity Analysis of the Eigenfrequencies of Superconductive Cavities (2011) (0)
1V Dσ A/D converters (1999) (0)
Line Drivers: Efficiency, Linearity, Bandwidth (2003) (0)
A 8 GHz 77 % efficient discrete quarter-wavelength transmission line integrated in 0.13 μm CMOS (2007) (0)
TP 4.6: A 900mV 40p.W Switched Opamp AX Modulator with 77dB Dynamic Range (1998) (0)
Low Jitter Clock Generators (2018) (0)
Low Voltage Circuit Design (1999) (0)
From Mains to Application: High Voltage Conversion Ratio Switched-Capacitor Converters (2015) (0)
Multi-Gigahertz Nyquist Analog-to-Digital Converters - Architecture and Circuit Innovations in Deep-Scaled CMOS and FinFET Technologies, 3 (2023) (0)
Noise Reduction by Multi-Phase Interleaving and Fragmentation (2013) (0)
A monolithic stacked Class-D approach for high voltage DC-AC conversion in standard CMOS (2013) (0)
A CMOS POWER AMPLIFIER FOR GSM-EDGE (2006) (0)
1V DS A/D converters (1999) (0)
A new feedback strategy to boost Q-factor of charge-sharing bandpass filters (2020) (0)
Pulse-Based Wideband Radio (2009) (0)
Highly integrated wavelength-locked Si photonic ring transmitter using direct monitoring of drop-port OMA (2017) (0)
Digital Subscriber Line: Signals, Specifications and Driver Solutions (2008) (0)
Radiation Hard Frequency Synthesizers (2018) (0)
Continuously-Scalable Conversion Ratio Topologies (2020) (0)
FOLDINGIINTERPOLATING ADCS Analog Preprocessing Techniques for High-Speed 8-bit ADC (0)
Time to Digital Conversion: An Alternative View on Synchronization (2009) (0)
ESD Protection in CMOS (2005) (0)
RF-ESD Co-Design for CMOS LNA's (2005) (0)
Monolithic SC DC–DC Toward Even Higher Voltage Conversion Ratios (2016) (0)
Modeling and Design of Capacitive DC–DC Converters (2013) (0)
Digital Communications Over Analog Channels (2009) (0)
Spatially oversampled TDC with digital resolution enhancement (2012) (0)
EMI Resisting Analog Output Circuits (2010) (0)
Analog Interface Circuits–The Limit for AmI Applications (2006) (0)
Radiation Hardened Bandgap References (2015) (0)
Monolithic Integration of DC-DC Converters in CMOS (2013) (0)
Application of High-Speed, High-Accuracy Dacs for Generation of Multiple Channels (2002) (0)
ADCs and DACs for Software‐Defined Radio (2010) (0)
Study on the sediment compaction in relation to the nematode vertical distribution by means of high-resolution X-ray CT (2006) (0)
EMC of Integrated Circuits versus Distortion (2010) (0)
Very Low-Distortion Operational Transconductance Amplifiers for High-Frequency Applications (1993) (0)

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What Schools Are Affiliated With Michiel S. J. Steyaert?

Michiel S. J. Steyaert is affiliated with the following schools:

KU Leuven