Natalie Enright Jerger

Natalie Enright Jerger's AcademicInfluence.com Rankings

Computer Science

#1351

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#9478

Historical Rank

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Computer Science

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According to Wikipedia, Natalie Dana Enright Jerger is an American computer scientist known for research in computer science including computer architecture and interconnection networks. Education and career Born in Plainfield, New Jersey, she attended Kent Place School and received a BS in computer engineering from Purdue University in 2002. She received her PhD from the University of Wisconsin-Madison studying Computer Architecture.

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Natalie Enright Jerger's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives (2009) (724)
Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing (2016) (619)
Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support (2008) (247)
On-Chip Networks (2009) (216)
DBAR: An efficient routing algorithm to support multiple concurrent applications in networks-on-chip (2011) (178)
SCARAB: A single cycle adaptive routing and bufferless network (2009) (170)
Achieving predictable performance through better memory controller placement in many-core CMPs (2009) (162)
Load Value Approximation (2014) (157)
Circuit-Switched Coherence (2008) (151)
Doppelgänger: A cache for approximate computing (2015) (118)
Enabling interposer-based disintegration of multi-core processors (2015) (104)
Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets (2015) (95)
SynFull: Synthetic traffic models capturing cache coherent behaviour (2014) (95)
Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks (2016) (91)
Whole packet forwarding: Efficient design of fully adaptive routing algorithms for networks-on-chip (2012) (88)
Virtual tree coherence: Leveraging regions and in-network multicast trees for scalable cache coherence (2008) (86)
An Evaluation of Server Consolidation Workloads for Multi-Core Designs (2007) (71)
DART: A Programmable Architecture for NoC Simulation on FPGAs (2011) (70)
NoC Architectures for Silicon Interposer Systems: Why Pay for more Wires when you Can Get them (from your interposer) for Free? (2014) (67)
Modular Routing Design for Chiplet-Based Systems (2018) (61)
Fine-Grained Bandwidth Adaptivity in Networks-on-Chip Using Bidirectional Channels (2012) (52)
QuT: A low-power optical Network-on-Chip (2014) (42)
The Bunker Cache for spatio-value approximation (2016) (42)
Interconnect-Memory Challenges for Multi-chip, Silicon Interposer Systems (2015) (41)
Improving DVFS in NoCs with Coherence Prediction (2015) (39)
Moths (1890) (37)
Supporting efficient collective communication in NoCs (2012) (36)
Exploration of Temperature Constraints for Thermal Aware Mapping of 3D Networks on Chip (2012) (35)
SPONGE (2018) (33)
A Taxonomy of General Purpose Approximate Computing Techniques (2018) (33)
On-Chip Networks, Second Edition (2017) (33)
The Anytime Automaton (2016) (29)
Leaving One Slot Empty: Flit Bubble Flow Control for Torus Cache-Coherent NoCs (2015) (29)
Efficient and programmable ethernet switching with a NoC-enhanced FPGA (2014) (28)
Novel Flow Control for Fully Adaptive Routing in Cache-Coherent NoCs (2014) (28)
Texture Cache Approximation on GPUs (2015) (26)
Friendly fire: understanding the effects of multiprocessor prefetches (2006) (23)
The runahead network-on-chip (2016) (22)
DistCL: A Framework for the Distributed Execution of OpenCL Kernels (2013) (22)
The What's Next Intermittent Computing Architecture (2019) (21)
Data Criticality in Network-On-Chip Design (2015) (18)
Dodec: Random-Link, Low-Radix On-Chip Networks (2014) (17)
Power Modeling for Heterogeneous Processors (2014) (14)
Proteus: Exploiting precision variability in deep neural networks (2017) (14)
Exploiting Errors for Efficiency: A Survey from Circuits to Algorithms (2018) (14)
The EH Model: Analytical Exploration of Energy-Harvesting Architectures (2018) (14)
Wormhole: Wisely Predicting Multidimensional Branches (2014) (14)
The EH Model: Early Design Space Exploration of Intermittent Processor Architectures (2018) (14)
WOMEN AND GIRLS IN SCIENCE AND ENGINEERING: UNDERSTANDING THE BARRIERS TO RECRUITMENT, RETENTION AND PERSISTENCE ACROSS THE EDUCATIONAL TRAJECTORY (2006) (13)
A dual grain hit-miss detector for large Die-Stacked DRAM caches (2013) (13)
DRAIN: Deadlock Removal for Arbitrary Irregular Networks (2020) (12)
Experiences with ML-Driven Design: A NoC Case Study (2020) (12)
SWAP: Synchronized Weaving of Adjacent Packets for Network Deadlock Resolution (2019) (12)
Holistic Routing Algorithm Design to Support Workload Consolidation in NoCs (2014) (11)
Exploiting Errors for Efficiency (2018) (11)
Muffin: Minimally-Buffered Zero-Delay Power-Gating Technique in On-Chip Routers (2019) (10)
Efficient synthetic traffic models for large, complex SoCs (2016) (10)
SPONGE: A Scalable Pivot-based On/Off Gating Engine for Reducing Static Power in NoC Routers (2018) (10)
Pitstop: Enabling a Virtual Network Free Network-on-Chip (2021) (10)
Moths: Mobile threads for On-Chip Networks (2010) (9)
UBERNoC: unified buffer power-efficient router for network-on-chip (2019) (8)
Value-Based Deep-Learning Acceleration (2018) (8)
Evaluating the memory system behavior of smartphone workloads (2014) (8)
Performance analysis of broadcasting algorithms on the Intel Single-Chip Cloud Computer (2013) (7)
Network on Chip Architectures (2008) (7)
SigNet: Network-on-chip filtering for coarse vector directories (2010) (7)
DART: Fast and Flexible NoC Simulation using FPGAs (2010) (7)
CD-Xbar: A Converge-Diverge Crossbar Network for High-Performance GPUs (2019) (7)
Interconnects for DNA, Quantum, In-Memory, and Optical Computing: Insights From a Panel Discussion (2022) (6)
Wormhole branch prediction using multi-dimensional histories (2014) (5)
Mocktails: Capturing the Memory Behaviour of Proprietary Mobile Architectures (2020) (5)
Sampling-based approaches to accelerate network-on-chip simulation (2014) (5)
A Taxonomy of Approximate Computing Techniques (2016) (5)
Load Value Approximation : Approaching the Ideal Memory Access Latency (2014) (4)
Outstanding Research Problems in NoC Design: Circuit-, Microarchitecture-, and System-Level Perspectives (2008) (4)
Not Quite My Tempo : Matching Prefetches to Memory Access Times (2015) (3)
A high-level model for exploring multi-core architectures (2018) (3)
SEEC: Stochastic Escape Express Channel (2021) (2)
Exploiting Typical Values to Accelerate Deep Learning (2018) (2)
Fast and Accurate Performance Analysis of Synchronization (2018) (2)
SWAP (2019) (2)
Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning (2018) (1)
ALTOCUMULUS: Scalable Scheduling for Nanosecond-Scale Remote Procedure Calls (2022) (1)
Systems for Very Large-Scale Computing (2011) (1)
UBERNoC (2019) (1)
Approximate Computing (2018) (0)
What Can Chiplets Bring to Multi-Tenant Clouds? (2021) (0)
Hierarchical Clustering for On-Chip Networks (2016) (0)
Accelerating network-on-chip simulation via sampling (2014) (0)
Explaining Parallel Architecture Design (2013) (0)
– Research Statement 1 Statement of Research Interests (0)
Synthesis Lectures on Computer Architecture (2009) (0)
Input image layers 10 s-100 s Annotated image (2018) (0)
Technical perspective: A chiplet prototype system for deep learning inference (2021) (0)
2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Copenhagen, Denmark, 9-11 May, 2012 (2012) (0)
Approximate Computing for Privacy in IoT devices (2020) (0)
Ghostwriter: A Cache Coherence Protocol for Error-Tolerant Applications (2021) (0)
TACO Reviewers 2012 (2013) (0)
Chapter Nine - Power-gating in NoCs (2022) (0)
Approximate Cache Architectures (2018) (0)

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