Prith Banerjee
Indian computer scientist
Prith Banerjee's AcademicInfluence.com Rankings
Download Badge
Computer Science
Why Is Prith Banerjee Influential?
(Suggest an Edit or Addition)According to Wikipedia, Prithviraj "Prith" Banerjee is an Indian American academic and computer scientist and is currently the Chief Technology Officer at ANSYS and board member at Cray and CUBIC. Previously, he was a Senior Client Partner at Korn Ferry where he was responsible for IOT and Digital Transformation Advisory Services within the Global Industrial Practice. Before that he was the Executive Vice President and Chief Technology Officer at Schneider Electric. He was formerly a senior vice president of research at Hewlett Packard and director of HP Labs. Previously he was the Chief Technology Officer and Executive Vice President of ABB Group. He was also the Managing Director of Global Technology R&D at Accenture. . Prith started his early career in academia as a Professor at the University of Illinois and Northwestern University.
Prith Banerjee's Published Works
Published Works
- Demonstration of Automatic Data Partitioning Techniques for Parallelizing Compilers on Multicomputers (1992) (291)
- CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit (2000) (290)
- The Paradigm Compiler for Distributed-Memory Multicomputers (1995) (207)
- Everything as a Service: Powering the New Information Economy (2011) (196)
- Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor (1990) (146)
- Parallel algorithms for VLSI computer-aided design (1994) (134)
- A MATLAB compiler for distributed, heterogeneous, reconfigurable computing systems (2000) (129)
- An Evaluation of Multiple-Disk I/O Systems (1989) (125)
- Algorithms-Based Fault Detection for Signal Processing Applications (1990) (122)
- ESp: Placement by simulated evolution (1989) (121)
- RSYN: a system for automated synthesis of reliable multilevel circuits (1994) (119)
- A Framework for Exploiting Task and Data Parallelism on Distributed Memory Multicomputers (1997) (115)
- Improving locality using loop and data transformations in an integrated framework (1998) (113)
- Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs (2001) (107)
- Parallel Simulated Annealing Algorithms for Cell Placement on Hypercube Multiprocessors (1990) (105)
- Fault Tolerance Techniques for Systolic Arrays (1987) (103)
- PARADIGM: a compiler for automatic data distribution on multicomputers (1993) (94)
- A system for synthesizing optimized FPGA hardware from Matlab(R) (2001) (92)
- A Parallel Branch and Bound Algorithm for Test Generation (1989) (90)
- Bounds on Algorithm-Based Fault Tolerance in Multiple Processor Systems (1986) (89)
- A C compiler for a processor with a reconfigurable functional unit (2000) (85)
- An Approximate Algorithm for the Partitionable Independent Task Scheduling Problem (1990) (80)
- Accurate area and delay estimators for FPGAs (2002) (76)
- ESP: A New Standard Cell Placement Package Using Simulated Evolution (1987) (75)
- An algorithm for trading off quantization error with hardware resources for MATLAB-based FPGA design (2004) (73)
- A Multivalued Algebra For Modeling Physical Failures in MOS VLSI Circuits (1985) (65)
- Performance measurement and trace driven simulation of parallel CAD and numeric applications on a hypercube multicomputer (1990) (64)
- Low Cost Concurrent Error Detection in a VLIW Architecture Using Replicated Instructions (1992) (63)
- Characterization and Testing of Physical Failures in MOS Logic Circuits (1984) (63)
- Fault partitioning issues in an integrated parallel test generation/fault simulation environment (1989) (62)
- Advanced compilation techniques in the PARADIGM compiler for distributed-memory multicomputers (1995) (61)
- FAULT CHARACTERIZATION OF VLSI MOS CIRCUITS. (1982) (58)
- Communication Optimizations Used in the Paradigm Compiler for Distributed-Memory Multicomputers (1994) (56)
- Optimizations for Efficient Array Redistribution on Distributed Memory Multicomputers (1996) (56)
- A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts (1999) (55)
- Compile-time estimation of communication costs on multicomputers (1992) (55)
- An evaluation of parallel simulated annealing strategies with application to standard cell placement (1997) (53)
- Leakage power optimization with dual-V/sub th/ library in high-level synthesis (2005) (53)
- Automatic Selection of Dynamic Data Partitioning Schemes for Distributed-Memory Multicomputers (1995) (53)
- Automatic conversion of floating point MATLAB programs into fixed point FPGA based hardware design (2003) (52)
- Overview of a compiler for synthesizing MATLAB programs onto FPGAs (2004) (51)
- Performance trade-offs in a parallel test generation/fault simulation environment (1991) (51)
- Non-Scan Design-for-Testability Techniques for Sequential Circuits (1993) (51)
- A matrix-based approach to the global locality optimization problem (1998) (50)
- A Convex Programming Approach for Exploiting Data and Functional Parallelism on Distributed Memory Multicomputers (1994) (50)
- Simultaneous exploitation of task and data parallelism in regular scientific applications (1996) (50)
- Simultaneous scheduling, binding and floorplanning in high-level synthesis (1998) (47)
- Macro-models for high-level area and power estimation on FPGAs (2006) (47)
- Strategies for reconfiguring hypercubes under faults (1990) (45)
- Parallel algorithms for FPGA placement (2000) (44)
- An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor (1988) (44)
- A study of I/O behavior of Perfect benchmarks on a multiprocessor (1990) (44)
- Empirical and theoretical studies of the simulated evolution method applied to standard cell placement (1991) (43)
- A global communication optimization technique based on data-flow analysis and linear algebra (1999) (43)
- A hyperplane based approach for optimizing spatial locality in loop nests (1998) (43)
- Exploiting spatial regularity in irregular iterative applications (1995) (43)
- Compiler-Assisted Synthesis of Algorithm-Based Checking in Multiprocessors (1990) (43)
- A methodology for high-level synthesis of communication on multicomputers (1992) (42)
- A parallel algorithm for fault simulation based on PROOFS (1995) (42)
- Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment (2007) (41)
- FPGA hardware synthesis from MATLAB (2001) (40)
- A parallel simulated annealing algorithm for channel routing on a hypercube multiprocessor (1988) (40)
- An intelligent IT infrastructure for the future (2009) (40)
- Fault-secure algorithms for multiple-processor systems (1984) (40)
- PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations (2002) (39)
- Gracefully degradable disk arrays (1991) (37)
- Automatic translation of software binaries onto FPGAs (2004) (37)
- A scheduling algorithm for parallelizable dependent tasks (1991) (36)
- Performance of a Parallel Algorithm for Standard Cell Placement on the Intel Hypercube (1987) (36)
- Parallel simulated annealing strategies for VLSI cell placement (1996) (35)
- Distributed algorithms for shortest-path, deadlock-free routing and broadcasting in arbitrarily faulty hypercubes (1990) (35)
- An algebraic array shape inference system for MATLAB® (2006) (35)
- Parallel genetic algorithms for simulation-based sequential circuit test generation (1997) (34)
- Portable parallel test generation for sequential circuits (1992) (34)
- Compiling MATLAB programs to ScaLAPACK: exploiting task and data parallelism (1996) (33)
- Design, Analysis, and Simulation of I/O Architectures for Hypercube (1990) (33)
- Generating Tests for Physical Failures in MOS Logic Circuits (1983) (33)
- Tolerance determination for algorithm-based checks using simplified error analysis techniques (1993) (32)
- Parallel test generation for sequential circuits on general-purpose multiprocessors (1991) (32)
- Techniques to overlap computation and communication in irregular iterative applications (1994) (32)
- ProperCAD: a portable object-oriented parallel environment for VLSI CAD (1992) (31)
- PHIGURE: a parallel hierarchical global router (1990) (30)
- Fault tolerant VLSI systems (1993) (30)
- Optimization by simulated evolution with applications to standard cell placement (1990) (30)
- Processor Allocation and Scheduling of Macro Dataflow Graphs on Distributed Memory Multicomputers by the PARADIGM Compiler (1993) (30)
- An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design (2004) (30)
- MATCH: A MATLAB Compiler For Configurable Computing Systems (1999) (29)
- A message passing coprocessor for distributed memory multicomputers (1990) (29)
- Processor Tagged Descriptors: A Data Structure for Compiling for Distributed-Memory Multicomputers (1994) (28)
- A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application (1994) (28)
- Algorithm-Based Fault Location and Recovery for Matrix Computations on Multiprocessor Systems (1996) (27)
- A Layout-Conscious Iteration Space Transformation Technique (2001) (27)
- An Algorithm-Based Error Detection Scheme for the Multigrid Method (2003) (27)
- An incremental floorplanner (1999) (27)
- Simultaneous scheduling, binding and floorplanning for interconnect power optimization (1999) (27)
- Algorithm-based fault location and recovery for matrix computations (1994) (26)
- A technique for the effective and automatic reuse of classical compiler optimizations on multithreaded code (2011) (26)
- Static array storage optimization in MATLAB (2003) (26)
- CONCURRENT FAULT DIAGNOSIS IN MULTIPLE PROCESSOR SYSTEMS. (1986) (26)
- Interprocedural Array Redistribution Data-Flow Analysis (1996) (26)
- The Cubical Ring Connected Cycles: A Fault-Tolerant Parallel Computation Network (1988) (26)
- Actor Based Parallel VHDL Simulation Using Time Warp (1996) (25)
- A Fault Tolerant Massively Parallel Processing Architecture (1987) (25)
- Enhancing Spatial Locality via Data Layout Optimizations (1998) (25)
- Tradeoffs in the Design of Efficient Algorithm-Based Error Detection Schemes for Hypercube Multiprocessors (1990) (24)
- I/O Embedding in Hypercubes (1988) (24)
- Overview of the FREEDOM compiler for mapping DSP software to FPGAs (2004) (24)
- A Framework for Exploiting Data and Functional Parallelism on Distributed Memory Multicomputers (1994) (23)
- SPITFIRE: scalable parallel algorithms for test set partitioned fault simulation (1997) (23)
- Parallel algorithms for simultaneous scheduling, binding and floorplanning in high-level synthesis (1998) (22)
- Automating Parallelism of Regular Computations for Distributed-Memory Multicomputers in the Paradigm Compiler (1993) (22)
- Algorithm-Based Error Detection Schemes for Iterative Solution of Partial Differential Equations (1996) (22)
- Functional abstraction of logic gates for switch-level simulation (1991) (22)
- Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach (1992) (22)
- Design and Evaluation of Gracefully Degradable Disk Arrays (1993) (21)
- ProperHITEC: A Portable, Parallel, Object-Oriented Approach to Sequential Test Generation (1994) (21)
- Compiler techniques for optimizing communication and data distribution for distributed-memory multicomputers (1996) (20)
- Efficient circuit partitioning algorithms for parallel logic simulation (1989) (20)
- A parallel implementation of a fast multipole based 3-D capacitance extraction program on distributed memory multicomputers (2000) (19)
- Behavioral synthesis of data-dominated circuits for minimal energy implementation (2005) (19)
- Logic Partitioning and Resynthesis for Testability (1991) (19)
- ProperPLACE: a portable parallel algorithm for standard cell placement (1994) (19)
- A Matrix-Based Approach to Global Locality Optimization (1999) (18)
- A Fault-Tolerant Parallel Algorithm for Iterative Solution of the Laplace Equation (1993) (18)
- Design and Evaluation of Hardware Strategies for Reconfiguring Hypercubes and Meshes Under Faults (1994) (18)
- A graph based framework to detect optimal memory layouts for improving data locality (1999) (18)
- Hardware Support for Message Routing in a Distributed Memory Multicomputer (1990) (18)
- An overview of a compiler for mapping MATLAB programs onto FPGAs (2003) (18)
- PARADIGM (version 2.0): a new HPF compilation system (1999) (17)
- An Overview of a Compiler for Mapping Software Binaries to Hardware (2007) (17)
- An integer linear programming approach for optimizing cache locality (1999) (17)
- The MAGICA Type Inference Engine for MATLAB (2003) (17)
- A framework for interprocedural locality optimization using both loop and data layout transformations (1999) (17)
- Dynamic template generation for resource sharing in control and data flow graphs (2006) (17)
- Match virtual machine: an adaptive runtime system to execute MATLAB in parallel (2000) (17)
- An efficient uniform run-time scheme for mixed regular-irregular applications (1998) (16)
- Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs (2007) (15)
- Parallel algorithms for VLSI circuit extraction (1991) (15)
- Minimizing data and synchronization costs in one-way communication (1998) (15)
- Reconfiguration strategies in VLSI processor arrays (1988) (15)
- SNEL: a switch-level simulator using multiple levels of functional abstraction (1990) (15)
- Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB (2001) (15)
- Parallel algorithms for logic synthesis using the MIS approach (1995) (15)
- Parallel Algorithms for Geometric Connected Component Labeling on a Hypercube Multiprocessor (1992) (15)
- PACE2: an improved parallel VLSI extractor with parameter extraction (1989) (14)
- Correctly detecting intrinsic type errors in typeless languages such as MATLAB (2000) (14)
- Design and analysis of software reconfiguration strategies for hypercube multicomputers under multiple faults (1992) (14)
- Static and Dynamic Locality Optimizations Using Integer Linear Programming (2001) (14)
- A portable parallel algorithm for VLSI circuit extraction (1993) (13)
- ProperSYN: A portable parallel algorithm for logic synthesis (1992) (13)
- A system-level synthesis algorithm with guaranteed solution quality (2000) (13)
- A Model for Simulating Physical Failures in MOS VLSI Circuits (1982) (13)
- A parallel algorithm for state assignment of finite state machines (1996) (12)
- Open Innovation at HP Labs (2010) (12)
- Fault-Tolerant Computing: An Overview (1991) (12)
- A parallel algorithm for hierarchical circuit extraction (1990) (12)
- Performance Evaluation of Multiple-Disk I/O Systems (1989) (12)
- Simulated annealing based parallel state assignment of finite state machines (1997) (12)
- A translator system for the MATLAB language (2007) (12)
- The runtime abort graph and its application to software transactional memory optimization (2011) (12)
- A Parallel Row-Based Algorithm for Standard Cell Placement with Integrated Error Control (1989) (12)
- Automating Parallelization of Regular Computations for Distributed-Memory (1993) (12)
- Macro-models for high level area and power estimation on FPGAs (2004) (12)
- Power optimization of delay constrained circuits (2000) (12)
- Parallelization of MATLAB Applications for a Multi-FPGA System (2001) (12)
- A Probabilistic Model of Algorithm-Based Fault Tolerance in Array Processors for Real-Time Systems (1986) (11)
- Reliability driven logic synthesis of multilevel circuits (1992) (11)
- An algorithm for synthesis of large time-constrained heterogeneous adaptive systems (2001) (11)
- Sustainable data centers: Enabled by supply and demand side management (2009) (11)
- Parallel Logic Synthesis Using Partitioning (1994) (11)
- Sequential circuit testability enhancement using a nonscan approach (1995) (11)
- An improved simulated annealing algorithm for standard cell placement (1988) (10)
- An α-approxmimate algorithm for delay-constraint technology mapping (1999) (10)
- State space abstraction for parameterized self-stabilizing embedded systems (2008) (10)
- Partitioning sequential circuits for low power (1998) (10)
- Retiming for Synchronous Data Flow Graphs (2007) (10)
- Efficient Techniques for the Analysis of Algorithm-Based Fault Tolerance (ABFT) Schemes (1996) (10)
- A study parallel disk organizations (1989) (10)
- A type inference system for matlab with applications to code optimization (2003) (10)
- On reducing false sharing while improving locality on shared memory multiprocessors (1999) (10)
- Parallel algorithms for force directed scheduling of flattened and hierarchical signal flow graphs (1996) (9)
- A software pipelining algorithm in high-level synthesis for FPGA architectures (2009) (9)
- A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement (1999) (9)
- Power aware interface synthesis for bus-based SoC designs (2004) (9)
- A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality (1998) (9)
- A New Error Analysis Based Method for Tolerance Computation for Algorithm-Based Checks (1996) (9)
- Exploiting task and data parallelism in parallel Hough and Radon transforms (1997) (9)
- PowerShake: a low power driven clustering and factoring methodology for Boolean expressions (1998) (9)
- Integrating task and data parallelism in an irregular application: a case study (1996) (9)
- A novel approach to system-level fault tolerance in hypercube multiprocessors (1988) (9)
- Efficient equivalence checking of multi-phase designs using retiming (1998) (8)
- Software schemes of reconfiguration and recovery in distributed memory multicomputers using the actor model (1995) (8)
- Describing, Assessing and Embedding Flexibility in System Architectures with Application to Wireless Terrestrial Networks and Handset Processors (2004) (8)
- An implicit algorithm for finding steady states and its application to FSM verification (1998) (8)
- A portable parallel algorithm for logic synthesis using transduction (1994) (8)
- An Iteration Space Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality (1999) (8)
- Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework (2003) (8)
- Scheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB (2000) (8)
- Towards a net-zero data center (2012) (8)
- PREST: a system for logic partitioning and resynthesis for testability (1993) (8)
- ICE: incremental 3-dimensional capacitance and resistance extraction for an iterative design environment (1999) (8)
- A parallel algorithm for zero skew clock tree routing (1998) (8)
- Optimizing Spatial Locality in Loop Nests using Linear Algebra (1998) (8)
- Parallel construction algorithms for BDDs (1999) (8)
- Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code (2005) (8)
- A Library Based Compiler to Execute Matlab Programs on a Heterogeneous Platform (2007) (7)
- Fault-tolerant multiprocessor and distributed systems: principles (1996) (7)
- Task scheduling for exploiting parallelism and hierarchy in VLSI CAD algorithms (1993) (7)
- Compiler-assisted generation of error-detecting parallel programs (1996) (7)
- Compiler Support for Parallel I/O Operations (1991) (7)
- Evaluation of scheduling and allocation algorithms while mapping assembly code onto FPGAs (2004) (7)
- Dynamic Data Partitioning for Distributed-Memory Multicomputers (1996) (7)
- A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs (1996) (7)
- A theory for algorithm-based fault tolerance in array processor systems (checks, bounds, graph-theoretic, errors) (1984) (7)
- Parallel Algorithms for VLSI Layout Verification (1996) (7)
- Evaluation of compiler and runtime library approaches for supporting parallel regular applications (1998) (7)
- Performance Evaluation of Hardware Support for Message Passing in Distributed Memory Multicomputers (1991) (6)
- A translator system for the MATLAB language: Research Articles (2007) (6)
- A Data Layout Optimization Technique Based on Hyperplanes (1997) (6)
- Parallel global routing algorithms for standard cells (1997) (6)
- MURPHY: A LOGIC SIMULATOR FOR MOS VLSI CIRCUITS. (1983) (6)
- Implementing an array shape inference system for matlab using mathematica (2002) (6)
- Streaming implementation of the ZLIB decoder algorithm on an FPGA (2009) (6)
- Distributed Object Oriented Data Structures and Algorithms for VLSI CAD (1996) (6)
- High Performance Computing – HiPC’99 (1999) (6)
- An algorithm based error detection scheme for the multigrid algorithm (1999) (6)
- Design and Implementation of an Actor Based Parallel VHDL Simulator (1996) (6)
- Automatic Parallelization of Compiled Event Driven VHDL Simulation (2002) (6)
- Parallel compiled event driven VHDL simulation (1998) (6)
- FAULT CHARACTERIZATION AND DELAY FAULT TESTING OF GAAS LOGIC CIRCUITS. (1987) (6)
- A dynamic-programming algorithm for reducing the energy consumption of pipelined System-Level streaming applications (2008) (6)
- Asynchronous parallel algorithms for test set partitioned fault simulation (1997) (6)
- Load balancing and work load minimization of overlapping parallel tasks (1997) (6)
- Efficient equivalence checking of multi-phase designs using phase abstraction and retiming (1998) (6)
- Comparative study of parallel algorithms for 3-D capacitance extraction on distributed memory multiprocessors (2000) (6)
- Smart Bit-width Allocation for Low Power Optimization in a SystemC based ASIC Design Environment (2006) (6)
- A generalized framework for global communication optimization (1998) (5)
- ProperCAD II: A Run-Time Library for Portable, Parallel, Object-Oriented Programming with Applications to VLSI CAD (1993) (5)
- An Approach to Array Shape Determination in MATLAB (2003) (5)
- Compiler support for hybrid irregular accesses on multicomputers (1996) (5)
- Handling data streams while compiling C programs onto hardware (2004) (5)
- Accurate Data and Context Management in Message-Passing Programs (1999) (5)
- Algorithm-based error detection for signal processing applications on a hypercube multiprocessor (1989) (5)
- Static Single Assignment Form for Message-Passing Programs (2001) (5)
- Parallel algorithms for power estimation (1998) (5)
- Manual and compiler assisted methods for generating fault-tolerant parallel programs (1996) (5)
- Performance evaluation of a C++ library based multithreaded system (1997) (5)
- Compiler support for privatization on distributed-memory machines (1996) (5)
- A Parallel 3-D Capacitance Extraction Program (1999) (5)
- Algorithm-Based Fault Tolerance for Adaptive Least Squares Lattice Filtering on a Hypercube Multiprocessor (1989) (5)
- Computing Array Shapes in MATLAB (2001) (5)
- A low-power logic optimization methodology based on a fast power-driven mapping (1998) (5)
- The Use of Parallel Processing in VLSI Computer-Aided Design Applications (1989) (5)
- Automatic classification of node types in switch-level descriptions (1990) (5)
- Handling context-sensitive syntactic issues in the design of a front-end for a MATLAB compiler (2000) (4)
- On the Construction of Communication Networks Satisfying Bounded Fan-In of Service Ports (1988) (4)
- An Efficient Assertion Checker For Combinational Properties (1997) (4)
- PACE: a parallel VLSI extractor on the Intel hypercube multiprocessor (1988) (4)
- An automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs (2003) (4)
- Enhancing Spatial Locality using Data Layout Optimizations (1997) (4)
- WADE: a Web-based automated parallel CAD environment (1998) (4)
- Global optimization techniques for automatic parallelization of hybrid applications (2001) (4)
- Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications (2000) (4)
- An ILP Approach for Optimizing Cache Locality (1998) (4)
- APT: an area-performance-testability driven placement algorithm (1992) (4)
- A Shared Memory Parallel Algorithm for Logic Synthesis (1993) (4)
- Resource optimization and deadlock prevention while generating streaming architectures from ordinary programs (2011) (4)
- POWER OPTIMIZATION ISSUES IN DUAL VOLTAGE (2000) (4)
- Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB(R) (2001) (4)
- Resynthesis of sequential circuits for low power (1998) (4)
- Potential-NRG: placement with incomplete data (1998) (3)
- A LAYOUT DRIVEN DESIGN FOR TESTABILITY TECHNIQUE FOR MOS VLSI CIRCUITS (1991) (3)
- A novel compilation framework for supporting semi-regular distributions in hybrid applications (1999) (3)
- Simultaneous Allocation and Scheduling Using Convex Programming Techniques (1995) (3)
- Parallel algorithms for standard cell placement using simulated annealing (1996) (3)
- CHIMAERA : Integrating a Reconfigurable Unit into a High-Performance , Dynamically-Scheduled Superscalar Processor (3)
- A comparison of parallel approaches for algebraic factorization in logic synthesis (1997) (3)
- High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits (2005) (3)
- A fault secure dictionary machine (1987) (3)
- Reliability Evaluation of Disk Array Architectures (1993) (3)
- ProperTEST: a portable parallel test generator for sequential circuits (1997) (2)
- A parallel algorithm for timing-driven global routing for standard cells (1998) (2)
- Efficient synthesis of array intensive computations onto FPGA based accelerators (2001) (2)
- Placement with Incomplete Data (1999) (2)
- The Design, Analysis and Simulation of a Fault-Tolerant Interconnection Network Supporting the Fetch-and-Add Primitive (1994) (2)
- CRAFT: Compiler-Assisted Algorithm-Based Fault Tolerance in Distributed Memory Multiprocessors (1991) (2)
- An Efficient System-Level to RTL Verification Framework for Computation-Intensive Applications (2005) (2)
- The Type Inference Engine for MATLAB (2003) (2)
- Incremental capacitance extraction and its application to iterative timing-driven detailed routing (1999) (2)
- High level area, delay and power estimation for FPGAs (2004) (2)
- High-level synthesis algorithms for low power asic design (2004) (2)
- OVERVIEW OF THE MATCH COMPILER FOR COMPILING MATLAB PROGRAMS INTO HARDWARE (2001) (2)
- Compiler Optimization of Dynamic Data Distributions for Distributed-Memory Multicomputers (2001) (2)
- A Method for Evaluating Message Communication in Faulty Hypercubes (1990) (2)
- A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs (2002) (2)
- On a Technique for Transparently Empowering Classical Compiler Optimizations on Multithreaded Code (2012) (2)
- Compile-time estimation of communication costs in multicomputers. Technical report (1991) (2)
- A compiler infrastructure for compiling assembly and binary programs onto fpgas (2005) (2)
- Streaming implementation of a sequential decompression algorithm on an FPGA (2009) (2)
- PowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis (1998) (2)
- Parallel implementations (1999) (2)
- An accurate timing model for fault simulation in MOS circuits (1989) (2)
- A parallel circuit-partitioned algorithm for timing driven cell placement (1997) (2)
- The Efficient Computation of Ownership Sets in HPF (2001) (2)
- Implications of VHDL timing models on simulation and software synthesis (1997) (2)
- Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs (2003) (2)
- I/O issues for hypercubes (1989) (2)
- SPITFIRE: Synchronous and Asynchronous Scalable Parallel Algorithms for Test Set Partitioned Fault Simulation (1997) (2)
- Functions in Reconfigurable Hardware for Matrix and Signal Processing Operations in MATLAB ∗ (2007) (2)
- Graphic-theoretic bounds for on-line checks in multiple processor systems (1986) (2)
- A procedure for software synthesis from VHDL models (1997) (2)
- An automated algorithm to generate stream programs (2009) (1)
- Space-borne computing for the year 2000 and beyond (1988) (1)
- Improving Locality Using a Graph-Based Technique for Detecting Memory Layouts of Arrays (1999) (1)
- Automatic Generation of Stream Descriptors for Streaming Architectures (2010) (1)
- AUTOMATIC DATA PARTITIONING (1990) (1)
- Application of algorithm-based fault tolerance to high-level synthesis of signal flow graphs (1994) (1)
- An Algorithm for Converting F to Fixed-point in MATLA oat i ng -Poi n t Corn pu tat ions 3 based FPGA design (2004) (1)
- A Combined Communication and Synchronization Optimization Algorithm for One-Way Communication (1997) (1)
- A methodology for translating scheduled software binaries onto field programmable gate arrays (2005) (1)
- RECBAR : A Reconfigurable Massively Parallel Processing Architecture (1986) (1)
- Novel algorithms for placement and routing and their parallel implementations (1997) (1)
- AUTOMATIC DATA PARTITIONING ON DISTRIBUTED MEMORY MULTIPROCESSORS D 1 " ' 1 C (1)
- Efficient Equivalence Checking In a Modular Design Environment (1998) (1)
- Performance measurement and support software for the message-driven model on multiprocessors (1997) (1)
- A Survey of Parallel Algorithms for VLSI cell Placement (1993) (1)
- Performance evaluation of message-driven parallel VLSI CAD applications on general purpose multiprocessors (1997) (1)
- Reconfiguration and recovery in distributed memory multicomputers (1994) (1)
- Exploiting Ownership Sets in HPF (2000) (1)
- A Fixed Size Array Processor for Computing the Fast Fourier Transform (1987) (1)
- An MILP Based Algorithm for Automatic System Level Synthesis (1999) (1)
- Parallel Processing for VLSI CAD Applications a Tutorial (1993) (1)
- Power aware high-level synthesis techniques for fpgas (2004) (1)
- Optimizing Communication Using Global Dataflow Analysis (1997) (1)
- Fine-grained parallel VLSI synthesis for commercial CAD on a network of workstations (2000) (1)
- Proceedings of the 6th International Conference on High Performance Computing (1999) (0)
- A parallel algorithm for global routing (1990) (0)
- PACT: Power Aware Compilation and Architectural Techniques (2003) (0)
- Advanced Compilation Techniques in the PARADIGM Compiler for NASA-CR- 199283 -i.buted-Memory Multicomputer (2008) (0)
- m-Base Error-Detection Schemes folr Iterative Solution ifferential Equations (1996) (0)
- N O T I C E THIS DOCUMENT HAS BEEN REPRODUCED FROM MICROFICHE. ALTHOUGH IT IS RECOGNIZED THAT CERTAIN PORTIONS ARE ILLEGIBLE, IT IS BEING RELEASED IN THE INTEREST OF MAKING AVAILABLE AS MUCH (2009) (0)
- Potential NRG: placement with incomplete data (1998) (0)
- The future of cloud computing : an HP Labs perspective (2010) (0)
- A parallel algorithm for channel routing on a hypercube (1987) (0)
- An Integer Linear Programming Approach for Optirnizing Cache Locality (1999) (0)
- Geometric Connected Component Labeling on Distributed Memory Multicomputers (1990) (0)
- Automatic parallelization and optimizations for synthesizing matlab programs on multi-fpga systems (2001) (0)
- Assertion Checker for Combinational Properties (1997) (0)
- Design and Implementation of an Actor Based Parallel (1995) (0)
- Experiments with Data Layouts (1997) (0)
- A MATLAB Compilation Environment for Adaptive Computing Systems (2002) (0)
- Compiler Support 3.1 Speculative Execution 3.2 Compiler Assisted Synthesis of Algorithm-based Checking in Multiprocessors 3 (1994) (0)
- A Method for Evaluatin Message Communication in Faulty ypercubes (1990) (0)
- Parallel algorithms for sequential circuit fault simulation and test generation (1997) (0)
- Adaptive computing: what can it do, where can it go? (2003) (0)
- A NOVEL SYSTEM LEVEL APPROACH TO SEP 2 3 1994 FAULT TOLERANCE IN F DISTRIBUTED MEMORY MULTICOMPUTERS (0)
- Complete-k-Distinguishability for retiming and resynthesis equivalence checking without restricting synthesis (2009) (0)
- Center for Reliable and High-Performance Computing AUTOMATIC DATA PARTITIONING ON DISTRIBUTED MEMORY MULTIPROCESSORS (2017) (0)
- Reliability Driven Synthesis of Sequential Circuits (1996) (0)
- High Performance Computing - HiPC'99: 6th International Conference, Calcutta, India, December 17-20, 1999 Proceedings (1999) (0)
- The Paradigm Compiler for Distri buted=Memory (1995) (0)
- Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000 (2000) (0)
- Advanced Compilation Techniques in the Paradigm Compiler for -i.buted-memory Multicomputer (2008) (0)
- VLSI CAD on Scalable High Performance Computing Platforms (1998) (0)
This paper list is powered by the following services:
Other Resources About Prith Banerjee
What Schools Are Affiliated With Prith Banerjee?
Prith Banerjee is affiliated with the following schools: