Randal E. Bryant
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Randal E. Bryant's AcademicInfluence.com Rankings
Randal E. Bryantengineering Degrees
Engineering
#2166
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#3028
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Electrical Engineering
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#398
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Randal E. Bryantcomputer-science Degrees
Computer Science
#3092
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#3242
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Database
#601
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#631
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Engineering Computer Science
Randal E. Bryant's Degrees
- PhD Electrical Engineering and Computer Science University of Colorado Boulder
- Masters Electrical Engineering Stanford University
Why Is Randal E. Bryant Influential?
(Suggest an Edit or Addition)Randal E. Bryant's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- Graph-Based Algorithms for Boolean Function Manipulation (1986) (8621)
- Symbolic Boolean manipulation with ordered binary-decision diagrams (1992) (2325)
- Efficient implementation of a BDD package (1990) (1382)
- Semantics-aware malware detection (2005) (786)
- On the Complexity of VLSI Implementations and Graph Representations of Boolean Functions with Application to Integer Multiplication (1991) (574)
- Computer Systems: A Programmer's Perspective (1991) (397)
- A Switch-Level Model and Simulator for MOS Digital Systems (1984) (391)
- SIMULATION OF PACKET COMMUNICATION ARCHITECTURE COMPUTER SYSTEMS (1977) (352)
- Verification of Arithmetic Circuits with Binary Moment Diagrams (1995) (348)
- Formal verification by symbolic evaluation of partially-ordered trajectories (1995) (294)
- COSMOS: a compiled simulator for MOS circuits (1987) (288)
- Modeling and Verifying Systems Using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions (2002) (273)
- Binary decision diagrams and beyond: enabling technologies for formal verification (1995) (267)
- Effective use of Boolean satisfiability procedures in the formal verification of superscalar and VLIW microprocessors (2001) (234)
- Graph-Based Algorithms for Boolean Function Manipulation12 (1986) (226)
- Boolean Analysis of MOS Circuits (1987) (204)
- Data-Intensive Supercomputing: The case for DISC (2007) (198)
- Big-Data Computing: Creating revolutionary breakthroughs in commerce, science, and society (2008) (197)
- Concurrent programming (1980) (190)
- Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic (1999) (154)
- Symbolic Manipulation of Boolean Functions Using a Graphical Representation (1985) (148)
- Deciding Bit-Vector Arithmetic with Abstraction (2007) (138)
- Formally Verifying a Microprocessor Using a Simulation Methodology (1994) (130)
- Deciding Separation Formulas with SAT (2002) (116)
- Formal verification of superscalar microprocessors with multicycle functional units, exceptions, and branch prediction (2000) (114)
- A Symbolic Approach to Predicate Abstraction (2003) (113)
- Formal hardware verification by symbolic ternary trajectory evaluation (1991) (111)
- Exploiting Positive Equality in a Logic of Equality with Uninterpreted Functions (1999) (111)
- Constructing Quantified Invariants via Predicate Abstraction (2004) (100)
- A Performance Study of BDD-Based Model Checking (1998) (98)
- Symbolic simulation—techniques and applications (1990) (94)
- Parrot: a practical runtime for deterministic, stable, and reliable threads (2013) (94)
- Superscalar Processor Verification Using Efficient Reductions of the Logic of Equality with Uninterpreted Functions to Propositional Logic (1999) (92)
- Indexed Predicate Discovery for Unbounded System Verification (2004) (92)
- A hybrid SAT-based decision procedure for separation logic with uninterpreted functions (2003) (89)
- Modeling and Verification of Out-of-Order Microprocessors in UCLID (2002) (87)
- Boolean satisfiability with transitivity constraints (2000) (83)
- MOSSIM: A Switch-Level Simulator for MOS LSI (1981) (80)
- Effective use of boolean satisfiability procedures in the formal verification of superscalar and VLIW (2001) (80)
- Test Pattern Generation for Sequential MOS Circuits by Symbolic Fault Simulation (1989) (76)
- Limitations and challenges of computer-aided design technology for CMOS VLSI (2001) (75)
- Formal Verification of Digital Circuits Using Symbolic Ternary System Models (1990) (74)
- SetA*: an efficient BDD-based heuristic search algorithm (2002) (73)
- A methodology for hardware verification based on logic simulation (1987) (71)
- Algorithmic Aspects of Symbolic Switch Network Analysis (1987) (71)
- A Survey of Switch-Level Algorithms (1987) (66)
- Symbolic Verification of MOS Circuits (1985) (63)
- Formal Verification Of Content Addressable Memories Using Symbolic Trajectory Evaluation (1997) (61)
- Extraction of gate level models from transistor circuits by four-valued symbolic analysis (1991) (56)
- Deciding quantifier-free Presburger formulas using parameterized solution bounds (2004) (53)
- Data-Intensive Scalable Computing for Scientific Applications (2011) (52)
- Bit-level analysis of an SRT divider circuit (1995) (51)
- Predicate abstraction with indexed predicates (2004) (51)
- Formal verification of PowerPC arrays using symbolic trajectory evaluation (1996) (47)
- *PHDD: an efficient graph representation for floating point circuit verification (1997) (46)
- Deductive Verification of Advanced Out-of-Order Microprocessors (2003) (42)
- Performance Evaluation of FMOSSIM, a Concurrent Switch-Level Fault Simulator (1985) (41)
- Fault Tolerant Planning: Toward Probabilistic Uncertainty Models in Symbolic Non-Deterministic Planning (2004) (41)
- Verification of Floating-Point Adders (1998) (41)
- Exploiting positive equality and partial non-consistency in the formal verification of pipelined microprocessors (1999) (40)
- Space- and time-efficient BDD construction via working set control (1998) (39)
- ACV: an arithmetic circuit verifier (1996) (39)
- Synchronous circuit verification by symbolic simulation: an illustration (1990) (39)
- Unbounded, Fully Symbolic Model Checking of Timed Automata using Boolean Methods (2003) (38)
- Exploiting symmetry when verifying transistor-level circuits by symbolic trajectory evaluation (1999) (37)
- Formal verification of an ARM processor (1999) (35)
- Ordered binary decision diagrams (2001) (35)
- Automatic discovery of API-level exploits (2005) (35)
- Bit-Level Abstraction in the Verfication of Pipelined Microprocessors by Correspondence Checking (1998) (34)
- Formal verification of memory circuits by switch-level simulation (1991) (31)
- An abstraction-based decision procedure for bit-vector arithmetic (2009) (31)
- Massively Parallel Switch-Level Simulation: A Feasibility Study (1989) (31)
- Formal hardware verification by symbolic trajectory evaluation (1997) (30)
- A SWITCH-LEVEL SIMULATION MODEL FOR INTEGRATED LOGIC CIRCUITS (1981) (28)
- Efficient Modeling of Memory Arrays in Symbolic Simulation (1997) (28)
- Adaptive eager boolean encoding for arithmetic reasoning in verification (2005) (26)
- Concurrent fault simulation of MOS digital circuits (1983) (26)
- TLSim and EVC: a term-level symbolic simulator and an efficient decision procedure for the logic of equality with uninterpreted functions and memories (2005) (26)
- Symbolic Simulation with Approximate Values (2000) (25)
- Optimizing Symbolic Model Checking for Constraint-Rich Models (1999) (25)
- Convergence Testing in Term-Level Bounded Model Checking (2003) (24)
- State-set branching: Leveraging BDDs for heuristic search (2008) (24)
- EVC: A Validity Checker for the Logic of Equality with Uninterpreted Functions and Memories, Exploiting Positive Equality, and Conservative Transformations (2001) (23)
- On Solving Boolean Combinations of UTVPI Constraints (2007) (23)
- Verification of arithmetic circuits using binary moment diagrams (2001) (23)
- A Hardware Architecture for Switch-Level Simulation (1985) (22)
- Formal Verification of a Superscalar Execution Unit (1997) (22)
- Parallel discrete event simulation: The making of a field (2017) (20)
- Efficient Modeling of Memory Arrays in Symbolic Ternary Simulation (1998) (20)
- Inverter minimization in multi-level logic networks (1993) (19)
- Computer systems : a programmer's perspective beta version (2003) (19)
- ATLAS: Automatic Term-level abstraction of RTL designs (2010) (17)
- Introducing computer systems from a programmer's perspective (2001) (17)
- Data parallel switch-level simulation (1988) (17)
- Guided Symbolic Universal Planning (2003) (17)
- Computing logic-stage delays using circuit simulation and symbolic Elmore analysis (2001) (16)
- Exploiting Symmetry When Verifying Transitor-Level Circuits by Symbolic Trajectory Evaluation (1997) (15)
- Verifying Nondeterministic Implementations of Deterministic Systems (1996) (15)
- Chain Reduction for Binary and Zero-Suppressed Decision Diagrams (2017) (15)
- Binary Decision Diagrams (2018) (15)
- Logic Simulation On Massively Parallel Architectures (1989) (15)
- Verifying a static RAM design by logic simulation (1988) (14)
- Automatic Clock Abstraction from Sequential Circuits (1995) (14)
- Introductory Computer Science Education at Carnegie Mellon University: A Deans’ Perspective (2010) (14)
- Breadth-First with Depth-First BDD Construction: A Hybrid Approach, (1997) (14)
- Revisiting Positive Equality (2004) (13)
- Generating Extended Resolution Proofs with a BDD-Based SAT Solver (2021) (13)
- Learning conditional abstractions (2011) (13)
- Computer systems - a programmers perspective (2003) (13)
- Formal verification of memory arrays (1997) (13)
- Verification of Pipelined Microprocessors by Comparing Memory Execution Sequences in Symbolic Simulation (1997) (12)
- Nonsilicon, Non-von Neumann Computing - Part I [Scanning the Issue] (2019) (12)
- An efficient graph representation for arithmetic circuitverification (2001) (12)
- Advances in Artificial Intelligence Require Progress Across all of Computer Science (2017) (12)
- Formal Methods for Functional Verification (2003) (12)
- For incremental circuit analysis using extracted hierarchy (1988) (12)
- Modeling and verifying circuits using generalized relative timing (2005) (12)
- CMOS circuit verification with symbolic switch-level timingsimulation (2001) (11)
- Efficient bdd-based planning for non-deterministic, fault-tolerant, and adversarial domains (2003) (11)
- Symbolic functional and timing verification of transistor-level circuits (1999) (10)
- A Theory of Consistency for Modular Synchronous Systems (2000) (9)
- Simulator for MOS Circuits (1987) (9)
- Verification of Synchronous Circuits by Symbolic Logic Simulation (1989) (9)
- Unbounded system verification using decision procedure and predicate abstraction (2004) (9)
- Arithmetic circuit verification based on word-level decision diagrams (1998) (9)
- Microprocessor Verification Using Efficient Decision Procedures for a Logic of Equality with Uninterpreted Functions (1999) (9)
- Intractability in linear switch-level simulation (1993) (9)
- Set manipulation with Boolean functional vectors for symbolic reachability analysis (2003) (8)
- Mapping switch-level simulation onto gate-level hardware accelerators (1991) (8)
- An Efficient BDD-Based A* Algorithm (2002) (8)
- A View from the Engine Room: Computational Support for Symbolic Model Checking (2008) (8)
- Verification of pipelined microprocessors by correspondence checking in symbolic ternary simulation (1998) (8)
- Extraction of finite state machines from transistor netlists by symbolic simulation (1995) (7)
- Bit-Level Abstraction in the Verification of Pipelined (1998) (7)
- Incorporating timing constraints in the efficient memory model for symbolic ternary simulation (1998) (6)
- Automatic Discovery of API-Level Vulnerabilities (2008) (6)
- Digital circuit verification using partially-ordered state models (1994) (6)
- Term-Level Verification of a Pipelined CISC Microprocessor (2005) (6)
- Symbolic timing simulation using cluster scheduling (2000) (6)
- Synthesis of Fault Tolerant Plans for Non-Deterministic Domains (2003) (5)
- Geometric characterization of series-parallel variable resistor networks (1993) (5)
- A Boolean approach to unbounded, fully symbolic model checking of timed automata (2003) (4)
- Modified MasteringEngineering with Pearson eText - ValuePack Access Card - For Computer Systems: A Programmer's Perspective (2015) (4)
- Formal verification of memory arrays using symbolic trajectory evaluation (1997) (4)
- Incremental switch-level analysis (1988) (4)
- Inverter Minimization in Logic Networks (1993) (4)
- Tbuddy: A Proof-Generating BDD Package (2022) (3)
- Computer systems : a programmer\'s perspective / Randal E. Bryant, David R. O\'Hallaron. (2011) (3)
- Third Caltech Conference on Very Large Scale Integration : [papers] (1983) (3)
- Nonsilicon, Non-von Neumann Computing - Part II (2020) (3)
- Abstracting RTL Designs to the Term Level (2008) (3)
- From Data to Knowledge to Action : Enabling Advanced Intelligence and Decision-Making for America ’ s Security (2010) (3)
- Symbolic analysis methods for masks, circuits and systems (1993) (3)
- On Solving Boolean Combinations of Generalized 2SAT Constraints (2004) (2)
- Symbolic representation with ordered function templates (2003) (2)
- Proof Generation for CDCL Solvers Using Gauss-Jordan Elimination (2023) (2)
- Formal Verification of Infinite State Systems Using Boolean Methods (2006) (2)
- Implementing Malloc: Students and Systems Programming (2018) (2)
- The Hardness of Approximating Minima in OBDDs, FBDDs and Boolean Functions (2000) (2)
- Bipartite Perfect Matching Benchmarks (2021) (2)
- Formal Verification of Pipelined Processors (1998) (2)
- A methodology for formal hardware verification based on symbolic trajectory evaluation (1999) (2)
- CAD tool needs for system designers (1988) (2)
- Teaching Computer Systems from a Programmer's Perspective (2001) (1)
- A symbolic simulation-based methodology for generating black-box timing models of custom macrocells (2001) (1)
- Symbolic Simulation, Model Checking and Abstraction with Partially Ordered Boolean Functional Vectors (2004) (1)
- x86-64 Machine-Level Programming (2005) (1)
- System modeling and verification with UCLID (2004) (1)
- Switch-Level Modeling of MOS Digital Circuits (1982) (1)
- Verifying properties of hardware and software by predicate abstraction and model checking (2004) (1)
- Reducing Separation Formulas to Propositional Logic (2003) (1)
- Automatic Discovery ofAPI-Level Exploits (2005) (1)
- An Analysis of Hashing on Parallel and Vector Computers (1993) (1)
- Alpha Assembly Language Guide (1998) (1)
- Symbolic simulation-techniques and applications (1990) (1)
- Efficient modeling of memoryarrays in symbolic simulation (1997) (1)
- Two Papers on a Symbolic Analyzer for MOS (Metal-Oxide Semiconductors) Circuits. (1987) (1)
- Symbolic Verification of MOS Circuits 1 (1985) (1)
- Deciding quantifier-free Presburger formulas using finite instantiation based on parameterized solution bounds (2003) (1)
- From Data to Knowledge to Action: Enabling the Smart Grid (2020) (1)
- EduPar 2016 Keynote (2016) (1)
- Formal Verification of Pipelined Y 86-64 Microprocessors with U CLID 5 (2018) (1)
- Nonsilicon, Non-von Neumann Computing—Part I insight into recent technologicaldevelopments in the (2018) (0)
- Voltage Reduction Test Issue 1.0 (2004) (0)
- CS : APP 2 e Web Aside ASM : X 87 : X 87-Based Support for Floating Point ∗ (2012) (0)
- Verifying Nondeterministic Implementations of Deterministic Systems 1 (1996) (0)
- Reasoning about Infinite State Systems Using Boolean Methods (2003) (0)
- Fault Tolerant Planning : Toward Probabilistic Domain Models in Symbolic Non-Deterministic Planning (2004) (0)
- CS:APP2e Web Aside ASM:SSE: SSE-Based Support for Floating Point (2014) (0)
- Efficient Modeling of MemoryArrays in Symbolic Simulation 1 (1997) (0)
- Space-and Time-Efficient BDD Construction via Working SetControl (1999) (0)
- CS:APP Chapter 3: Machine-Level Representations of Programs (2002) (0)
- Decision Procedures Customized for Formal Verification (2005) (0)
- Exploiting symmetry when verifying transistor-level circuits by symbolic trajectory evaluation: a summary (2001) (0)
- Parallel Simulation of Message Routing Networks 12 Euromicro Pdp'95 (0)
- Multi-level Logic Synthesis Based on Kronecker and Boolean Ternary Decision Diagrams for Incompletely Specified Functions Using Functions Properties for Multi-level and Multi-domain Logic (2008) (0)
- 2009 CAV award announcement (2010) (0)
- CS:APP2e Web Aside ASM:EASM: Combining Assembly Code with C Programs (2012) (0)
- Software Tools for Technology Transfer Manuscript No. Veriication of Arithmetic Circuits Using Binary Moment Diagrams ? (2007) (0)
- Fault Tolerant Planning : Moving Toward Probabilistic Uncertainty Models in Symbolic Non-Deterministic Planning (2004) (0)
- Panel: University-Industry Ties: How Can They Be Improved? (1995) (0)
- 5.2 Gate Level Veriication 4.2 Model Checking 4.1 Symbolic Simulation Fitting Formal Methods into the Design Cycle (1994) (0)
- 2 Ju l 2 00 4 Predicate Abstraction with Indexed Predicates (2018) (0)
- Binary Decision Diagrams : An Algorithmic Basis for Symbolic Model Checking (2019) (0)
- Chang, Dean,... "BigTable: A Distributed Storage System for (2011) (0)
- Comparing Techniques for Out-of-Order Processor Verification in UCLID (2003) (0)
- CS : APP Web Aside DATA : BOOL : More on Boolean Algebra and Boolean Rings ∗ (2012) (0)
- An Analysis of U.S. Patent #5,243,538 “Comparison and Verification System for Logic Circuits and Method Thereof" (1994) (0)
- Multipliers and Dividers: Insights on Arithmetic Circuits Verification (Extended Abstract) (1995) (0)
- Modules to Abstract RTL Random Simulation Generate Term-Level Model Invoke Verifier Simulation Traces Learn Abstraction Conditions Abstraction Conditions Valid ? Yes Done Counter example Spurious ? (2015) (0)
- Symbolic Simulation—Techniques and Applications (cid:0) (2018) (0)
- The 2008 CAV Award citation (2009) (0)
- The National Strategic Computing Initiative (2015) (0)
- Computer Systems A Programmer's Perspective 1 (Beta Draft) (2001) (0)
- Concurrent Programming with Threads (2001) (0)
- It Is Most Suited for Verifying Functional Properties Of (1994) (0)
- Work Efficient Hashing on Parallel and Vector Computers (1992) (0)
- Making the Smart Energy Grid Even Smarter (2010) (0)
- Data Parallel S witch-Level Simulation* (1988) (0)
- Reasoning about Data: Bits, bit vectors, or words (2008) (0)
- Formal Verification of a Superscalar Execution Unit 1 (1997) (0)
- CS:APP2e Web Aside ASM:OPT: Machine Code Generated with Higher Levels of Optimization (2012) (0)
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What Schools Are Affiliated With Randal E. Bryant?
Randal E. Bryant is affiliated with the following schools:
