Samvel K. Shoukourian

Samvel K. Shoukourian's AcademicInfluence.com Rankings

Computer Science

#10714

World Rank

#11267

Historical Rank

Database

#10363

World Rank

#11018

Historical Rank

computer-science Degrees

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Computer Science

Why Is Samvel K. Shoukourian Influential?

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According to Wikipedia, Samvel K. Shoukourian is an Armenian Computer scientist and engineer. Doctor of Science in Physics and Mathematics , Professor , academician of National Academy of Sciences of Armenia , Biography Samvel K. Shoukourian was born in Yerevan in the family of doctor, RA Honored Scientist Kim Shoukourian. In 1972 he graduated from Yerevan Polytechnic Institute. In 1972-1993 he worked at the Yerevan Computer Research and Development Institute, meanwhile, since 1977, at Yerevan State University. 1993-2007 he was the Head of the Chair of Algorithmic Languages, since 2007 - Head of the Department of Information Systems and Information Systems of the Information Technologies Research and Education Center. He has been Chief Scientific Advisor and Development Director in different international companies. Since 2000, he is directing the Department of Embedded Test and Repair at Virage Logic Corporation and since 2010, the same department at Synopsys, Inc .

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Samvel K. Shoukourian's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Embedded-memory test and repair: infrastructure IP for SoC yield (2003) (187)
SoC yield optimization via an embedded-memory test and repair infrastructure (2004) (61)
An approach for evaluation of redundancy analysis algorithms (2001) (36)
A Robust Solution for Embedded Memory Test and Repair (2011) (33)
A methodology for design and evaluation of redundancy allocation algorithms (2004) (20)
A New Method for March Test Algorithm Generation and Its Application for Fault Detection in RAMs (2012) (20)
Generic BIST architecture for testing of content addressable memories (2011) (14)
The equivalence problem of multidimensional multitape automata (2008) (13)
Symmetry Measure for Memory Test and Its Application in BIST Optimization (2011) (11)
Experimental study on Hamming and Hsiao codes in the context of embedded applications (2017) (10)
Memory Physical Aware Multi-Level Fault Diagnosis Flow (2018) (10)
Extending fault periodicity table for testing faults in memories under 20nm (2014) (9)
An effective solution for building memory BIST infrastructure based on fault periodicity (2013) (9)
Test solutions for nanoscale Systems-on-Chip: Algorithms, methods and test infrastructure (2013) (9)
Impact of process variations on read failures in SRAMs (2013) (8)
The Equivalence Problem of Deterministic Multitape Finite Automata: A New Proof of Solvability Using a Multidimensional Tape (2010) (7)
An approach for system tests design and its application (1995) (5)
Overview study on fault modeling and test methodology development for FinFET-based memories (2015) (5)
Securing test infrastructure of system-on-chips (2016) (5)
An efficient testing methodology for embedded flash memories (2017) (4)
Fault Awareness for Memory BIST Architecture Shaped by Multidimensional Prediction Mechanism (2019) (4)
Polynomial algorithm for equivalence problem of deterministic multitape finite automata (2020) (2)
A Unified Design Methodology for Offline and Online Testing (1998) (2)
A power based memory BIST grouping methodology (2015) (2)
Application of defect injection flow for fault validation in memories (2013) (1)
Advanced ECC-Based FIT Rate Mitigation Technique for Automotive SoCs (2018) (1)
Some Results on Regular Events for Multitape Finite Automata: A Preliminary Report (2021) (1)
An approach for formal verification of business processes (2009) (1)
Innovative Practices on In-System Test and Reliability of Memories (2019) (1)
Equivalence of two-dimensional multitape automata (2008) (1)
A mechanism of row redundancy sharing for reparable memory systems (2017) (1)
An Approach for Access Differentiation Design in Medical Distributed Applications Built on Databases (1999) (0)
An efficient fault diagnosis and localization algorithm for Successive-Approximation Analog to Digital Converters (2013) (0)
Learning Technology Newsletter, Vol. 7 Issue 4, October 2005 (2005) (0)
An efficient approach for memory repair by reducing the number of spares (2015) (0)
Fault and Test Algorithm Periodicity Hypothesis in MemoryDevices and Its Application to Memory BIST ProcessorArchitecture (2012) (0)
KHARKOV NATIONAL UNIVERSITY OF RADIOELECTRONICS (2010) (0)
Student Competence: Approach to Study and Research in Virtual and Real Educational Environment (2018) (0)
Automated flow for test pattern creation for IPs in SoC (2017) (0)
Learning Technology Ieee Computer Society Technical Committee on Learning Technology (tclt) Armenian Reading Equipment with Voice (arev): a System of Information Communication for Persons with Impaired New Method of Teaching Ecological Disciplines in Institutions of Higher Education of Armenia...... (2005) (0)
IP Session 7C: Design for Yield and Manufacturability (2008) (0)
15th IEEE VLSI test symposium (1996) (0)
Alternative Combination of Processes (2006) (0)
Armenia: Communicating to World Community in Electronic Test and Design (2019) (0)
Memory FIT Rate Mitigation Technique for Automotive SoCs (2019) (0)

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