Sarita Adve

Q: What Schools Are Affiliated With Sarita Adve

Sarita Adve is affiliated with the following schools: Rice University, University of Wisconsin–Madison, IIT Bombay, University of Illinois Urbana-Champaign

Sarita Adve's AcademicInfluence.com Rankings

Sarita Adve

Computer Science

#1340

World Rank

#1385

Historical Rank

Database

#7355

World Rank

#7621

Historical Rank

computer-science Degrees

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Computer Science

Why Is Sarita Adve Influential?

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According to Wikipedia, Sarita Vikram Adve is the Richard T. Cheng Professor of Computer Science at the University of Illinois at Urbana-Champaign. Her research interests are in computer architecture and systems, parallel computing, and power and reliability-aware systems.

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Sarita Adve's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Shared Memory Consistency Models: A Tutorial (1996) (1211)
The impact of technology scaling on lifetime reliability (2004) (609)
Weak ordering—a new definition (1990) (590)
Foundations of the C++ concurrency memory model (2008) (500)
The case for lifetime reliability-aware microprocessors (2004) (440)
Addressing failures in exascale computing (2014) (386)
A type and effect system for deterministic parallel Java (2009) (382)
Reconfigurable caches and their application to media processing (2000) (294)
Understanding the propagation of hard errors to software and implications for resilient system design (2008) (276)
Exploiting structural duplication for lifetime reliability enhancement (2005) (244)
A Unified Formalization of Four Shared-Memory Models (1993) (237)
Lifetime reliability: toward an architectural solution (2005) (223)
RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors (2002) (218)
Parallel programming must be deterministic by default (2009) (208)
Performance of database workloads on shared-memory systems with out-of-order processors (1998) (207)
The ALPBench benchmark suite for complex multimedia applications (2005) (204)
Predictive dynamic thermal management for multimedia applications (2003) (177)
Performance of image and video processing with general-purpose processors and media ISA extensions (1999) (177)
Weak ordering-a new definition (1990) (176)
DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism (2011) (170)
RSIM: An Execution-Driven Simulator for ILP-Based Shared-Memory Multiprocessors and Uniprocessors (1997) (169)
Saving energy with architectural and frequency adaptations for multimedia applications (2001) (167)
Relyzer: exploiting application-level fault equivalence to analyze application resiliency to transient faults (2012) (162)
RSIM Reference Manual: Version 1.0 (1997) (155)
SoftArch: an architecture-level tool for modeling and analyzing soft errors (2005) (152)
Performance directed energy management for main memory and disks (2004) (145)
Detecting data races on weak memory systems (1991) (144)
Using speculative retirement and larger instruction windows to narrow the performance gap between memory consistency models (1997) (138)
Using likely program invariants to detect hardware errors (2008) (137)
Architectures for online error detection and recovery in multicore processors (2011) (131)
Low-cost program-level detectors for reducing silent data corruptions (2012) (129)
Designing memory consistency models for shared-memory multiprocessors (1993) (127)
Memory models: a case for rethinking parallel languages and hardware (2009) (120)
Accurate microarchitecture-level fault modeling for studying hardware faults (2009) (117)
Analytic evaluation of shared-memory systems with ILP processors (1998) (117)
mSWAT: Low-cost hardware fault detection and diagnosis for multicore systems (2009) (117)
GRACE-1: cross-layer adaptation for multimedia quality and battery energy (2006) (113)
Programming for Different Memory Consistency Models (1992) (110)
Soft real-time scheduling on simultaneous multithreaded processors (2002) (103)
Variability in the execution of multimedia applications and implications for architecture (2001) (102)
Design and evaluation of a cross-layer adaptation framework for mobile multimedia systems (2003) (101)
Memory models (2010) (92)
Comparison of hardware and software cache coherence schemes (1991) (90)
The impact of instruction-level parallelism on multiprocessor performance and simulation methodology (1997) (86)
RAMP : A Model for Reliability Aware MicroProcessor Design (2003) (85)
Safe nondeterminism in a deterministic-by-default parallel language (2011) (85)
Online Estimation of Architectural Vulnerability Factor for Soft Errors (2008) (83)
An evaluation of fine-grain producer-initiated communication in cache-coherent multiprocessors (1997) (80)
An evaluation of memory consistency models for shared-memory systems with ILP processors (1996) (78)
Code transformations to improve memory parallelism (1999) (76)
Joint local and global hardware adaptations for energy (2002) (74)
The energy efficiency of CMP vs. SMT for multimedia workloads (2004) (70)
Stash: Have your scratchpad and cache it too (2015) (67)
GRACE-2: integrating fine-grained application adaptation with global adaptation for saving energy (2009) (67)
A comparison of entry consistency and lazy release consistency implementations (1996) (66)
Parallel SAH k-D tree construction (2010) (66)
Approxilyzer: Towards a systematic framework for instruction-level approximate computing and its application to hardware resiliency (2016) (65)
The Illinois GRACE Project: Global Resource Adaptation through CoopEration (2002) (61)
Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions (2007) (61)
Efficient GPU synchronization without scopes: Saying no to complex consistency models (2015) (60)
Trace-based microarchitecture-level diagnosis of permanent hardware faults (2008) (59)
DeNovoND: efficient hardware support for disciplined non-determinism (2013) (55)
Cross-component energy management: Joint adaptation of processor and memory (2007) (55)
Implementing Sequential Consistency in Cache-Based Systems (1990) (54)
GangES: Gang error simulation for hardware resiliency evaluation (2014) (54)
Cross-layer adaptive video coding to reduce energy on general-purpose processors (2003) (53)
GRACE: A Hierarchical Adaptation Framework for Saving Energy (2004) (53)
Improving the accuracy vs. speed tradeoff for simulating shared-memory multiprocessors with ILP processors (1999) (48)
Managing energy-performance tradeoffs for multithreaded applications on multiprocessor architectures (2007) (47)
You don't know jack about shared variables or memory models (2011) (46)
HPVM: heterogeneous parallel virtual machine (2018) (45)
The Interaction Of Software Prefetching With Ilp Processors In Shared-memory Systems (1997) (43)
Recent advances in memory consistency models for hardware shared memory systems (1999) (43)
Performance Simulation Tools (2002) (40)
PyTorchFI: A Runtime Perturbation Tool for DNNs (2020) (36)
OpenSPARC : An Open Platform for Hardware Reliability Experimentation (2008) (36)
SWAT : An Error Resilient System (2008) (35)
Data races are evil with no exceptions (2010) (35)
Relyzer: Application Resiliency Analyzer for Transient Faults (2013) (35)
Changing Interaction of Compiler and Architecture (1997) (33)
DeNovoSync: Efficient Support for Arbitrary Synchronization without Writer-Initiated Invalidations (2015) (31)
A formal approach to frequent energy adaptations for multimedia applications (2004) (31)
ALP: Efficient support for all levels of parallelism for complex media applications (2007) (31)
Chasing Away RAts: Semantics and evaluation for relaxed atomics on heterogeneous systems (2017) (30)
RSIM: Rice simulator for ILP multiprocessors (1997) (30)
CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions (2012) (29)
Spandex: A Flexible Interface for Efficient Heterogeneous Coherence (2018) (27)
RSIM: a simulator for shared-memory multiprocessor and uniprocessor systems that exploit ILP (1997) (26)
The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors (1999) (26)
Revisiting the Complexity of Hardware Cache Coherence and Some Implications (2014) (25)
Memory-side prefetching for linked data structures for processor-in-memory systems (2005) (25)
LOW-COST HARDWARE FAULT DETECTION AND DIAGNOSIS FOR MULTICORE SYSTEMS RUNNING MULTITHREADED WORKLOADS (23)
Lifetime reliability aware microprocessors (2006) (22)
Specifying system requirements for memory consistency models (1993) (22)
Metrics for Architecture-Level Lifetime Reliability Analysis (2008) (21)
Sufficient Conditions for Implementing theData-Race-Free-1 Memory Model, * (1992) (21)
Memory-Side Prefetching for Linked Data Structures (2001) (21)
HeteroSync: A benchmark suite for fine-grained synchronization on tightly coupled GPUs (2017) (20)
Performance modeling and programming environments for petaflops computers and the Blue Gene machine (2004) (20)
Minotaur: Adapting Software Testing Techniques for Hardware Errors (2019) (17)
HarDNN: Feature Map Vulnerability Evaluation in CNNs (2020) (17)
Exploring Extended Reality with ILLIXR: A New Playground for Architecture Research (2020) (16)
Inter-Disciplinary Research Challenges in Computer Systems for the 2020s (2018) (15)
gem5-Approxilyzer: An Open-Source Tool for Application-Level Soft Error Analysis (2019) (15)
Weak ordering- a new definition and some implications (1989) (15)
ApproxHPVM: a portable compiler IR for accuracy-aware optimizations (2019) (13)
Lifetime Reliability Awareness for Microprocessors (2004) (13)
Comparing the Energy Efficiency of CMP and SMT Architectures for Multimedia Workloads (2003) (12)
The ALPBench Benchmark Suite for Multimedia Applications (2005) (12)
Performance directed energy management for main memory and disks (2005) (12)
ILLIXR: Enabling End-to-End Extended Reality Research (2021) (12)
Comparing and combining read miss clustering and software prefetching (2001) (11)
A Unified Formalization of (1993) (11)
Detecting and recovering from in-core hardware faults through software anomaly treatment (2011) (11)
DeNovo: Rethinking Hardware for Disciplined Parallelism (2010) (10)
A Customized MVA Model for ILP Multiprocessors (1998) (9)
Optimizing Selective Protection for CNN Resilience (2021) (9)
ApproxTuner: a compiler and runtime system for adaptive approximations (2021) (9)
Impact of Software Approximations on the Resiliency of a Video Summarization System (2018) (8)
Inter-kernel Reuse-aware Thread Block Scheduling (2020) (8)
Hardware Fault Recovery for I/O Intensive Applications (2014) (8)
Exploiting instruction-level parallelism for memory system performance (2000) (8)
Specializing Coherence, Consistency, and Push/Pull for GPU Graph Analytics (2020) (7)
GSI: A GPU Stall Inspector to characterize the sources of memory stalls for tightly coupled GPUs (2016) (7)
Performance-directed energy management for storage systems (2004) (6)
Sufficient System Requirements for Supporting the PLpc Memory Model (1993) (6)
The Interaction of Architecture and Compilation Technology for High-Performance Processor Design (1997) (6)
A Reliability Odometer - Lemon Check Your Processor! (2004) (6)
DeNovoND: Efficient Hardware for Disciplined Nondeterminism (2014) (6)
Scaling of Architecture Level Soft Error Rate for Superscalar Processors ∗ (2005) (5)
Using Information From the Programmer to Implement System Optimizations Without Violating Sequential Consistency (1996) (5)
Secure and Resilient SoCs for Autonomous Vehicles (2021) (5)
Retrospective: weak ordering—a new definition (1998) (5)
Metrics for Lifetime Reliability (2006) (5)
Future Directions for Parallel and Distributed Computing: SPX 2019 Workshop Report (2019) (5)
Towards a Software-Hardware Co-Designed Resilient System (2007) (4)
ILLIXR: An Open Testbed to Enable Extended Reality Systems Research (2022) (4)
The Importance of Heat-Sink Modeling for DTM and a Correction to "Predictive DTM for Multimedia Applications" (2005) (4)
Guest Editors' Introduction: Reliability-Aware Microarchitecture (2005) (4)
Replacing Locks by Higher-Level Primitives (2007) (3)
Workshop on Advancing Computer Architecture Research ( ACAR-1 ) Failure is not an Option : Popular Parallel Programming (2010) (3)
HPVM: Hardware-Agnostic Programming for Heterogeneous Parallel Systems (2022) (3)
Trireme: Exploring Hierarchical Multi-Level Parallelism for Domain Specific Hardware Acceleration (2022) (2)
Virtual Instruction Set Computing for Heterogeneous Systems (2012) (2)
Eliminating on-chip traffic waste: are we there yet? (2015) (2)
General-purpose processors for multimedia applications: predictability and energy efficiency (2003) (2)
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems (2014) (2)
Minotaur (2019) (2)
On-Device CPU Scheduling for Sense-React Systems (2022) (1)
HPVM (2018) (1)
Understanding Why Symptom Detectors Work by Studying Data-Only Application Values (2011) (1)
A Language for Deterministic-by-Default Parallel Programming ⋆ (2010) (1)
Rethinking shared-memory languages and hardware (2011) (1)
Resilience characterization of a vision analytics application under varying degrees of approximation (2016) (1)
Combining IntraFrame with Inter-Frame Hardware Adaptations to Save Energy (2002) (1)
Early Stage Microarchitectural Design for Lifetime Reliability (1)
You Don’t Know Jack about Shared Variables or Memory Models (2011) (1)
Towards More Precision in Approximate Computing ∗ (2016) (1)
Power, Performance, and Image Quality Tradeoffs in Foveated Rendering (2023) (0)
Optimization of Simultaneous Multithreading Machines-Using Hybrid Genetic Algorithm (2017) (0)
A Reliability OdometerLemon OdometerLemon OdometerLemon Check Your Processor ! (2004) (0)
Making Parallel Programming Easy: Research Contributions from Illinois (2013) (0)
Trireme: Exploration of Hierarchical Multi-Level Parallelism for Hardware Acceleration (2023) (0)
ApproxTuner (2021) (0)
Using Information from the Programmer to Implement Shared-Memory Optimizations Without Violating Sequential Consistency (1998) (0)
To appear in Proceedings of ISCA-24 (June, 1997) The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems (2018) (0)
Chasing Away RAts (2017) (0)
Offloading Visual-Inertial Odometry for Low Power Extended Reality (2023) (0)
ADAPTIVEFUSION: Low Power Scene Reconstruction (2023) (0)
Session details: Vulnerabilities (2007) (0)
General-purpose architectures for media processing and database workloads (2000) (0)
On-Device CPU Scheduling for Robot Systems (2022) (0)
Position Paper for Nsf Workshop on Computer Performance Evaluation (0)
FEATURE MAP VULNERABILITY EVALUATION IN CNNS (2020) (0)
A Case for Fine-grain Coherence Specialization in Heterogeneous Systems (2021) (0)
Principles of Concurrency Principles of Concurrency Lecture 12 Memory Models : C 11 1 Based on :-Foundations of the C + + Concurrency Memory Model (2022) (0)
Multiple-Instruction Issue (2011) (0)
Dynamically Tuning Processor Resources with Adaptive Processing (2001) (0)
MIMD Lattice Computation (2011) (0)
POSTER - hVISC: A portable abstraction for heterogeneous parallel systems (2016) (0)
TITLE Memory Models BYLINE (2010) (0)
Memory models: a case for rethinking parallel languages and hardware (2009) (0)
Program chair's message (2014) (0)
Scalable Specialization: Architectures, Interfaces, & Applications (2020) (0)
SELECTED FOR PROC. OF THE IEEE, SPECIAL ISSUE ON DISTRIBUTED SHARED-MEMORY, 1999 (NOT THE FINAL VERSION) 1 Recent Advances in Memory Consistency Models for Hardware Shared-Memory Systems (2018) (0)
Session 1: Phase Behavior (2005) (0)
Guest Editors' Introduction: Top Picks from the Computer Architecture Conferences of 2007 (2008) (0)
Coordinated Science Laboratory 70th Anniversary Symposium: The Future of Computing (2022) (0)

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What Schools Are Affiliated With Sarita Adve?

Sarita Adve is affiliated with the following schools: