Sudhakar Yalamanchili

Sudhakar Yalamanchili's AcademicInfluence.com Rankings

Engineering

#7762

World Rank

#9178

Historical Rank

Electrical Engineering

#2435

World Rank

#2550

Historical Rank

Applied Physics

#2725

World Rank

#2769

Historical Rank

engineering Degrees

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Engineering

Why Is Sudhakar Yalamanchili Influential?

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According to Wikipedia, Sudhakar Yalamanchili from the Georgia Institute of Technology, Atlanta, GA was named Fellow of the Institute of Electrical and Electronics Engineers in 2014 for contributions to high-performance multiprocessor architecture and communication.

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Sudhakar Yalamanchili's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Interconnection networks - an engineering approach (2002) (2188)
Neurocube: A Programmable Digital Neuromorphic Architecture with High-Density 3D Memory (2016) (348)
Ocelot: A dynamic optimization framework for bulk-synchronous applications in heterogeneous systems (2010) (235)
Interconnection Networks (2011) (199)
Adaptive routing protocols for hypercube interconnection networks (1993) (195)
Harmony: an execution model and runtime for heterogeneous many core systems (2008) (194)
A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks (1995) (181)
On adaptive resource allocation for complex real-time applications (1997) (175)
A characterization and analysis of PTX kernels (2009) (135)
Keeneland: Bringing Heterogeneous GPU Computing to the Computational Science Community (2011) (118)
Modeling GPU-CPU workloads and systems (2010) (109)
An energy efficient cache design using Spin Torque Transfer (STT) RAM (2010) (107)
Kernel Weaver: Automatically Fusing Database Primitives for Efficient GPU Computation (2012) (95)
Power constrained design of multiprocessor interconnection networks (1997) (89)
Characterization and analysis of dynamic parallelism in unstructured GPU applications (2014) (81)
SIMD re-convergence at thread frontiers (2011) (80)
Red Fox: An Execution Environment for Relational Query Processing on GPUs (2014) (74)
MMR: a high-performance MultiMedia Router-architecture and design trade-offs (1999) (69)
FARA-a framework for adaptive resource allocation in complex real-time systems (1998) (68)
Manifold: A parallel simulation framework for multicore systems (2014) (63)
A framework for dynamically instrumenting GPU compute applications within GPU Ocelot (2011) (62)
Dynamic Thread Block Launch: A lightweight execution mechanism to support irregular applications on GPUs (2015) (61)
Introductory VHDL: From Simulation to Synthesis (2000) (60)
Power Modeling for GPU Architectures Using McPAT (2014) (58)
Optimizing Data Warehousing Applications for GPUs Using Kernel Fusion/Fission (2012) (57)
Harmonia: Balancing compute and memory power in high-performance GPUs (2015) (54)
Cooperative boosting: needy versus greedy power management (2013) (52)
A high performance router architecture for interconnection networks (1996) (51)
LaPerm: Locality Aware Scheduler for Dynamic Parallelism on GPUs (2016) (50)
Extraction of moving object descriptions via differencing (1982) (49)
Software-Based Rerouting for Fault-Tolerant Pipelined Communication (2000) (49)
All-To-All Communication with Minimum Start-Up Costs in 2D/3D Tori and Meshes (1998) (48)
Demystifying the characteristics of 3D-stacked memories: A case study for Hybrid Memory Cube (2017) (46)
Slim NoC: A Low-Diameter On-Chip Network Topology for High Energy Efficiency and Scalability (2018) (46)
Ariadne—an adaptive router for fault-tolerant multicomputers (1994) (42)
Distributed Deadlock-Free Routing in Faulty, Pipelined, Direct Interconnection Networks (1996) (42)
Reconfiguration Strategies for Parallel Architectures (1985) (41)
Coordinated energy management in heterogeneous processors (2013) (38)
Pipelined circuit-switching: a fault-tolerant variant of wormhole routing (1992) (37)
Centralized buffer router: A low latency, low power router for high radix NOCs (2013) (36)
Near Data Processing: Impact and Optimization of 3D Memory System Architecture on the Uncore (2015) (35)
Adaptive virtual channel partitioning for network-on-chip in heterogeneous architectures (2013) (33)
Software Based Fault-Tolerant Oblivious Routing in Pipelined Networks (1995) (33)
A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective (2011) (33)
Analysis of a model for parallel image processing (1985) (33)
Lynx: A dynamic instrumentation system for data-parallel applications on GPGPU architectures (2012) (31)
Application-Specific Performance-Aware Energy Optimization on Android Mobile Devices (2017) (31)
Co-design of multicore architectures and microfluidic cooling for 3D stacked ICs (2013) (31)
Architectural support for reducing communication overhead in multiprocessor interconnection networks (1997) (31)
Design space exploration of on-chip ring interconnection for a CPU-GPU heterogeneous architecture (2013) (31)
Eiger: A framework for the automated synthesis of statistical performance models (2012) (30)
Architectural Reliability: Lifetime Reliability Characterization and Management ofMany-Core Processors (2015) (30)
Speculative execution on multi-GPU systems (2010) (30)
An undergraduate computer engineering rapid systems prototyping design laboratory (1999) (29)
A universal parallel front-end for execution driven microarchitecture simulation (2012) (29)
Configurable flow control mechanisms for fault-tolerant routing (1995) (29)
Performance impact of virtual machine placement in a datacenter (2012) (28)
A power capping controller for multicore processors (2012) (27)
Dynamically Configurable Message Flow Control for Fault-Tolerant Routing (1999) (25)
ALRESCHA: A Lightweight Reconfigurable Sparse-Computation Accelerator (2020) (24)
Relational algorithms for multi-bulk-synchronous processors (2013) (24)
ERIDANUS: Efficiently Running Inference of DNNs Using Systolic Arrays (2019) (23)
Ariadne/spl minus/an adaptive router for fault-tolerant multicomputers (1994) (22)
Parallel image normalization on a mesh connected array processor (1987) (22)
Scouting: fully adaptive, deadlock-free routing in faulty pipelined networks (1994) (21)
Performance Evaluation of the Multimedia Router with MPEG-2 Video Traffic (1999) (20)
Improving cache efficiency via resizing + remapping (2007) (19)
Deadlock- and livelock-free routing protocols for wave switching (1997) (19)
High Performance Non-blocking Switch Design in 3D Die-Stacking Technology (2009) (19)
DeepTrain: A Programmable Embedded Platform for Training Deep Neural Networks (2018) (19)
Early analysis of cost/performance trade-offs in MCM systems (1996) (19)
Characterization and Transformation of Unstructured Control Flow in GPU Applications (2011) (19)
Dynamic compilation of data-parallel kernels for vector processors (2012) (18)
Characterization and transformation of unstructured control flow in bulk synchronous GPU applications (2012) (18)
Managing performance-reliability tradeoffs in multicore processors (2015) (17)
Adaptive resource allocation for embedded parallel applications (1996) (17)
A system organization for parallel image processing (1985) (17)
Throughput regulation in multicore processors via IPA (2012) (17)
Extending HyperTransport Protocol for Improved Scalability (2009) (16)
VHDL Starter's Guide (1997) (16)
Energy Introspector: A parallel, composable framework for integrated power-reliability-thermal modeling for multicore architectures (2014) (15)
Thermal system identification (TSI): A methodology for post-silicon characterization and prediction of the transient thermal field in multicore chips (2012) (15)
A Ferroelectric FET based Power-efficient Architecture for Data-intensive Computing (2018) (14)
Multipredicate Join Algorithms for Accelerating Relational Graph Processing on GPUs (2014) (14)
Switch scheduling in the multimedia router (MMR) (2000) (14)
Performance Regulation of Event-Driven Dynamical Systems Using Infinitesimal Perturbation Analysis (2016) (14)
Accelerating simulation of agent-based models on heterogeneous architectures (2013) (14)
ShareStreams: a scalable architecture and hardware support for high-speed QoS packet schedulers (2004) (13)
LODESTAR: Creating Locally-Dense CNNs for Efficient Inference on Systolic Arrays* (2019) (13)
Algorithms for all-to-all personalized exchange in 2D and 3D tori (1996) (13)
A Cost-Effective Hardware Link Scheduling Algorithm for the Multimedia Router (MMR) (2001) (13)
KitFox: Multiphysics Libraries for Integrated Power, Thermal, and Reliability Simulations of Multicore Microarchitecture (2015) (13)
A Characterization and Analysis of Parallel Processor Interconnection Networks (1987) (12)
Architecture and hardware for scheduling gigabit packet streams (2002) (12)
Power/Performance Trade-offs for Direct Networks (1997) (12)
Adaptive routing in generalized hypercube architectures (1991) (12)
Lightweight SIMT core designs for intelligent 3D stacked DRAM (2017) (11)
Understanding Energy Aspects of Processing-near-Memory for HPC Workloads (2015) (11)
Efficient Instrumentation of GPGPU Applications Using Information Flow Analysis and Symbolic Execution (2014) (11)
Workstations in a Local Area Network Environment (1984) (11)
A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies (2009) (10)
Designing Configurable, Modifiable and Reusable Components for Simulation of Multicore Systems (2012) (10)
Control Principles and On-Chip Circuits for Active Cooling Using Integrated Superlattice-Based Thin-Film Thermoelectric Devices (2014) (10)
Software-based dynamic reliability management for GPU applications (2016) (10)
Throughput Regulation in Shared Memory Multicore Processors (2015) (9)
Configurable Algorithms for Complete Exchange in 2D Meshes (2000) (9)
Large Join Optimization on a Hypercube Multiprocessor (1994) (9)
Analytical models of bandwidth allocation in pipelined k-ary n-cubes (1993) (9)
Integrating academic services in a modern networked environment (1996) (9)
ParallelJS: An Execution Framework for JavaScript on Heterogeneous Systems (2014) (9)
Leakage power characterization and minimization in 3D stacked multi-core chips with microfluidic cooling (2014) (9)
Instruction-based energy estimation methodology for asymmetric manycore processor simulations (2012) (8)
Power Multiplexing for Thermal Field Management in Many-Core Processors (2013) (8)
Optimizing parallel simulation of multicore systems using domain-specific knowledge (2013) (8)
GPU Application Development, Debugging, and Performance Tuning with GPU Ocelot (2012) (8)
Temperature regulation in multicore processors using adjustable-gain integral controllers (2015) (8)
Software Reliability Enhancements for GPU Applications (2013) (8)
High performance computing for engineering applications (1995) (8)
Customizable Fault Tolerant Caches for Embedded Processors (2006) (8)
Investigating switch scheduling algorithms to support qos in the multimedia router (2002) (7)
Parallel Processing Methodologies for Image Processing and Computer Vision (1993) (7)
A Dynamic, Partitioned Global Address Space Model for High Performance Clusters (2008) (7)
IPA in the loop: Control design for throughput regulation in computer processors (2016) (7)
Traffic scheduling solutions with QoS support for an input-buffered multimedia router (2005) (7)
QUIC: a quality of service network interface layer for communication in NOWs (1999) (7)
Amdahl's law for lifetime reliability scaling in heterogeneous multicore processors (2016) (7)
Technical Report : GIT-CERCS-09-06 A Characterization and Analysis of GPGPU Kernels (2009) (7)
General-purpose join algorithms for large graph triangle listing on heterogeneous systems (2016) (7)
Parallel computer routing and communication : second International Workshop, PCRCW '97, Atlanta, Georgia, USA, June 26-27, 1997 : proceedings (1998) (6)
Satisfying Data-Intensive Queries Using GPU Clusters (2012) (6)
Reliability Implications of Power / Thermal Constrained Operation in Asymmetric Multicore Processors (2012) (6)
Heterogeneous integration for artificial intelligence: Challenges and opportunities (2019) (6)
An utilization driven framework for energy efficient caches (2008) (6)
Oncilla: A GAS runtime for efficient resource allocation and data movement in accelerated clusters (2013) (6)
Regulating Locality vs. Parallelism Tradeoffs in Multiple Memory Controller Environments (2011) (6)
DIFFERENCING OPERATIONS FOR THE SEGMENTATION OF MOVING OBJECTS IN DYNAMIC SCENES. (1980) (6)
Using rapid prototyping in computer architecture design laboratories (1996) (6)
A Performance Model of Pipelined K-ary n-cubes (1995) (6)
A Power Characterization and Management of GPU Graph Traversal (2014) (6)
PARALLEL IMAGE NORMALIZATION. (1985) (6)
Energy Introspector : Simulation Infrastructure for Power , Temperature , and Reliability Modeling in Manycore Processors (2011) (5)
Communications Latency Hiding Techniques for a Reconfigurable Optical Interconnect: Benchmark Studies (1998) (5)
Active Fluidic Cooling on Energy Constrained System-on-Chip Systems (2017) (5)
Application Modeling for Scalable Simulation of Massively Parallel Systems (2015) (5)
Active SANs : Hardware Support for Integrating Computation and Communication (2002) (5)
Bubble sharing: Area and energy efficient adaptive routers using centralized buffers (2014) (5)
Instruction-throughput regulation in computer processors with data-center applications (2018) (5)
Understanding the Impact of Air and Microfluidics Cooling on Performance of 3D Stacked Memory Systems (2016) (4)
A Study of the Effect of Partitioning on Parallel Simulation of Multicore Systems (2013) (4)
A Framework for Compiler Driven Design Space Exploration for Embedded System Customization (2004) (4)
MOTION AND IMAGE DIFFERENCING. (1981) (4)
Data trace cache: an application specific cache architecture (2006) (4)
Controller design for tracking induced miss-rates in cache memories (2010) (4)
Leveraging block decisions and aggregation in the ShareStreams QoS architecture (2003) (4)
Post-Silicon Characterization and On-Line Prediction of Transient Thermal Field in Integrated Circuits Using Thermal System Identification (2014) (4)
HyperTransport Over Ethernet - A Scalable, Commodity Standard for Resource Sharing in the Data Center (2011) (4)
A portable benchmark suite for highly parallel data intensive query processing (2015) (4)
Compiling Stream Kernels for Polymorphous Computing Architectures (2003) (4)
Tuning buffer size in the multimedia router (MMR) (2001) (4)
Reliability-performance tradeoffs between 2.5D and 3D-stacked DRAM processors (2016) (4)
Multi-Physics Driven Co-Design of 3D Multicore Architectures (2015) (4)
An efficient front-end for timing-directed parallel simulation of multi-core system (2014) (4)
FROM ADAPTIVE TO SELF-TUNED SYSTEMS (2007) (4)
A new switch scheduling algorithm to improve QoS in the multimedia router (2002) (4)
FNM: An Enhanced Null-Message Algorithm for Parallel Simulation of Multicore Systems (2016) (4)
Genie: An environment for partitioning and mapping in embedded multiprocessors (1993) (4)
SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype (2015) (4)
Post-Silicon Estimation of Spatiotemporal Temperature Variations Using MIMO Thermal Filters (2015) (4)
Harmonica: An FPGA-Based Data Parallel Soft Core (2014) (4)
Design Space Exploration of On-chip Ring Interconnection for a CPU-GPU Architecture (2012) (3)
Partitioning and mapping in embedded multiprocessor architectures in the presence of constraints (1995) (3)
Modeling and analysis of multiprocessor architectures (1989) (3)
Dominant representations: a paradigm for mapping parallel computations (1992) (3)
Modulation of YAP/ TAZ by statins to improve survival in epithelioid hemangioendothelioma (EHE). (2020) (3)
Dynamic Partitioned Global Address Spaces for power efficient DRAM virtualization (2010) (3)
Commodity Converged Fabrics for Global Address Spaces in Accelerator Clouds (2012) (3)
Thermally Adaptive Cache Access Mechanisms for 3D Many-Core Architectures (2016) (3)
A multimedia router architecture to provide high performance and QoS guarantees to mixed traffic (2002) (3)
Incorporating multi-chip module packaging constraints into system design (1996) (3)
A solution for handling hybrid traffic in clustered environments: the MultiMedia Router MMR (2003) (3)
An Extensible Message Layer for High-Performance Clusters (2000) (2)
A Model For Parallel Image Processing (1984) (2)
LODESTAR (2019) (2)
Power regulation in high performance multicore processors (2017) (2)
Partitioning Algorithms for a Class of Application Specific Multiprocessor Architectures (1993) (2)
Simulation of marked graphs on SIMD architectures using efficient memory management (1994) (2)
Complete Exchange in General Multidimensional Mesh Networks * (2)
Integration of tools for the Design and Assessment of High-Performance, Highly Reliable Computing Systems (DAHPHRS), phase 1 (1992) (2)
Parallel Computer Routing and Communication (2000) (2)
Assured Service Concepts and Models. Volume 1. Summary (1992) (2)
ASSURED SERVICE CONCEPTS AND MODELS Availability in Distributed MLS Systems (2)
Efficiently Solving Partial Differential Equations in a Partially Reconfigurable Specialized Hardware (2021) (2)
University of Castilla-La Mancha A publication of the Department of Computer Science MMR : A MultiMedia Router Architecture to Support Integrated Workloads (2002) (2)
MAHASIM: Machine-Learning Hardware Acceleration Using a Software-Defined Intelligent Memory System (2020) (2)
Centralized Buffer Router with Elastic Links and Bubble Flow Control (2013) (2)
Partitioning Signal Flow Graphs for Execution on Heterogeneous Signal Processing Architectures (1992) (2)
A Messaging Layer for Heterogeneous Endpoints in Resource Rich Clusters (2000) (2)
Global Memory Model For Improved Memory Efficiency (2009) (2)
A Hardware Approach to QoS Support in Cluster Environments: The Multimedia Router MMR (2003) (2)
Introduction of rapid systems prototyping into undergraduate computer engineering curricula (1995) (2)
Position Paper: Software-based Techniques for Reducing the Vulnerability of GPU Applications (2014) (2)
The architecture of a video image processor for the space station (1987) (2)
Thermal simulations in support of multi-scale co-design of energy efficient information technology systems (2015) (2)
Partitioning Coarse-Grain Signal Flow Graphs for Heterogeneous DSP Architectures (1994) (2)
Algebraic properties of some parallel processor interconnection networks (1984) (2)
PARALLEL IMAGE PROCESSING WITH THE SHUFFLE EXCHANGE NETWORK. (1984) (2)
Tango: An Optimizing Compiler for Just-In-Time RTL Simulation (2020) (1)
Partitioning and Mapping a Class of Parallel Multiprocessor Simulation Models. (1993) (1)
IEEE Computer Architecture Letters (2019) (1)
Cymric : A Framework for Prototyping Near-Memory Architectures (2015) (1)
Parallelism in sequential multiprocessor simulation models: a case study (1995) (1)
Algorithms for Switch-Scheduling in the Multimedia Router for LANs (2002) (1)
Proceedings of the Second International Workshop on Parallel Computer Routing and Communication (1997) (1)
Energy Introspector : Standard Physical Library Interface for Full-System Microarchitecture and Multi-Physics Simulations (2014) (1)
Architecture Simulation Framework for 3 D IC (2012) (1)
Memory Slices: A Modular Building Block for Scalable, Intelligent Memory Systems (2018) (1)
Pagevault: securing off-chip memory using page-based authentication (2017) (1)
System Impact of 3D Processor-Memory Interconnect: A Limit Study (2011) (1)
NeuroTrainer: An Intelligent Memory Module for Deep Learning Training (2017) (1)
An integrated solution to distributed data requirements (1995) (1)
ShareStreams-V: A Virtualized QoS Packet Scheduling Accelerator (2008) (1)
S3-P9: Thermal and electrical performance of microfluidically cooled 3D ICs with non-uniform power dissipation (2014) (1)
Formulation of parallel image processing tasks (1984) (1)
High Performance Embedded Computing Systems for the Next Decade (2005) (1)
On-line real-time temperature and power estimation of an IC using time-domain thermal filters (2013) (1)
The Customization Landscape for Embedded Systems (2002) (1)
Augmented Binary Hypercube: A New Architecture for Processor Management (1996) (1)
Paradigms for Modeling and Simulation of Multiprocessor Architectures (1996) (1)
State Space Search (2011) (1)
Assured Service Concepts and Models. Volume 3. Availability in Distributed MLS Systems (1992) (1)
Customized Placement for High Performance Embedded Processor Caches (2007) (1)
Power-Constrained Performance Scheduling of Data Parallel Tasks (2016) (1)
Scalable Computing: Why and How (2010) (1)
Active management of cache resources (2008) (0)
Server Farm (2011) (0)
Switching Techniques (2011) (0)
Partitioning algorithms for signal flow graphs (1991) (0)
System Impact of Integrated Interconnects (2009) (0)
Electrical-Thermal Co-Design of Microsystems (2014) (0)
CHAPTER 7 – Network Architectures (2003) (0)
A HyperTransport-Enabled Global Memory Model For Improved Memory Efﬁciency (2009) (0)
MAHASIM: Machine-Learning Hardware Acceleration Using a Software-Defined Intelligent Memory System (2020) (0)
Assured Service Concepts and Models. Volume 2. Security in Distributed Systems (1992) (0)
A Tunable Communications Library for Data Injection (2002) (0)
Workshop on Modeling & Simulation of Systems and Applications (2014) (0)
Memory Controller Memory Controller CPU Cache Hierarchy CPU Cache Hierarchy (2010) (0)
Tutorial T8: Energy-efficient Adaptive Circuits and Systems (2013) (0)
Proceedings of the 5th International Workshop on Energy Efficient Supercomputing (2013) (0)
VDPred: Predicting Voltage Droop for Power-Effient 3D Multi-core Processor Design (2021) (0)
TRINITY: Coordinated Performance, Energy and Temperature Management in 3D Processor-Memory Stacks (2018) (0)
POSTER: Tango: An Optimizing Compiler for Just-In-Time RTL Simulation (2019) (0)
HyVM - Hybrid Virtual Machines - Efficient Use of Future Heterogeneous Chip Multiprocessors (2010) (0)
Short-Stack : Pushing Back the Pin Bandwidth Wall with FinFET-based eDRAM In-Package Last Level Cache (2015) (0)
Essential Role of PACU Nursing in Developing and Sustaining a Multidisciplinary Enhanced Recovery Program (2016) (0)
A Test-driven Methodology for Real-time On-line Temperature Prediction and Power Estimation (2013) (0)
Evaluation of dynamic compilation technologies for cognitive information processing architectures (2007) (0)
Message from the General Co-Chairs (2010) (0)
Supernode Partitioning (2011) (0)
Position Paper for DOE OS/R Call for Papers Core Containers: System Support for Provisioning and Controlling Dynamic Exascale Codes (2012) (0)
Exploration of the energy and thermal behaviors of emerging architectures (2014) (0)
FNM (2016) (0)
Time scale combining of conservative parallel discrete event simulations (1995) (0)
Techniques and tools for efficiently modeling multiprocessor systems (1990) (0)
Workshop on Modeling and Simulation of Systems and Applications, August 13-14, 2014, University of Washington, Seattle (2014) (0)
Adaptive Cache Placement for Scientific Computation (2007) (0)
Architecture-Independent Modeling of Intra-Node Data Movement (2014) (0)
Partitioning and mapping a class of parallel simulation models (1993) (0)
Sinonasal Undifferentiated Carcinoma: The Experience of One Multidisciplinary Team over a 10-Year Period (2014) (0)
Optimistic parallel computation: an example from computational chemistry (1996) (0)
Parallel Optimization and Execution of Large Join Queries (1992) (0)
GIT-CERCS Thermal Field Management for Many-core Processors (2009) (0)
Special-Purpose Machines (2011) (0)
Execution Environment Support for Many Core Heterogeneous Accelerator Platforms (2010) (0)
On-line Optimization of Power Efficiency in 3D Multicore Processors (2018) (0)
Cost-Effective Software Based Fault-Tolerant Routing in Pipelined Networks * (2007) (0)
Keeneland: Computational Science Using Heterogeneous GPU Computing (2017) (0)
Energy Introspector: Coordinated Architecture-Level Simulation of Processor Physics (2013) (0)
Instruction-throughput regulation in computer processors with data-center applications (2017) (0)
Mechanisms for reliable message delivery in pipelined interconnection networks (1996) (0)
A Spectral Method for Mapping Dataaow Graphs a Spectral Method for Mapping Dataaow Graphs 2 Min-cut Mapping for Dataaow Graphs 17 3 State-of-the-art Mapping and Scheduling 30 (2007) (0)
Virtualizing Heterogeneous Many-core Platforms (2007) (0)
Thermal Field Management for Many-core Processors (2009) (0)
HARDWARE-ASSISTED SECURITY : BLOOM CACHE – SCALABLE LOW-OVERHEAD CONTROL FLOW INTEGRITY CHECKING (2014) (0)
Coordinated energy management in heterogeneous processors 1 (2014) (0)
IBM Power (2011) (0)
MMR: A MultiMedia Router architecture to support hybrid workloads (2006) (0)
Teaching pipelining and concurrency using hardware description languages (1999) (0)
Multiprocessor reconfiguration techniques (1988) (0)

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Published Works

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What Schools Are Affiliated With Sudhakar Yalamanchili?

Sudhakar Yalamanchili's AcademicInfluence.com Rankings