Tak Hung Ning

Tak Hung Ning's AcademicInfluence.com Rankings

Tak Hung Ning

Engineering

#7371

World Rank

#8741

Historical Rank

Electrical Engineering

#2297

World Rank

#2405

Historical Rank

engineering Degrees

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Engineering

Tak Hung Ning's Degrees

PhD Electrical Engineering Stanford University
Masters Electrical Engineering Stanford University
Bachelors Electrical Engineering Stanford University

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Tak Hung Ning's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

Fundamentals of Modern VLSI Devices (1998) (1994)
Emission probability of hot electrons from silicon into silicon dioxide (1977) (284)
The scattering of electrons by surface oxide charges and by lattice vibrations at the silicon-silicon dioxide interface (1972) (243)
1 µm MOSFET VLSI technology: Part IV—Hot-electron design constraints (1979) (227)
Optically induced injection of hot electrons into SiO2 (1974) (214)
Hot-electron emission in N-channel IGFET's (1979) (209)
High‐field capture of electrons by Coulomb‐attractive centers in silicon dioxide (1976) (192)
Effect of emitter contact on current gain of silicon bipolar devices (1980) (174)
Method for determining the emitter and base series resistances of bipolar transistors (1984) (168)
Hot-electron emission from silicon into silicon dioxide (1978) (144)
Self-aligned bipolar transistors for high-performance and low-power-delay VLSI (1981) (116)
Electron scattering in silicon inversion layers by oxide and surface roughness (1976) (115)
Electron trapping in SiO2 due to electron‐beam deposition of aluminum (1978) (103)
Capture cross section and trap concentration of holes in silicon dioxide (1976) (94)
Multivalley Effective-Mass Approximation for Donor States in Silicon. I. Shallow-Level Group-V Impurities (1971) (90)
Effect of electron trapping on IGFET characteristics (1977) (88)
Thermal reemission of trapped electrons in SiO2 (1978) (86)
A Room Temperature 0.1 /spl mu/m CMOS on SOI (1993) (77)
Theory of Scattering of Electrons in a Nondegenerate-Semiconductor-Surface Inversion Layer by Surface-Oxide Charges (1972) (76)
High performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFET (2012) (68)
A model for negative bias temperature instability (NBTI) in oxide and high κ pFETs (2004) (64)
Optimization of pH sensing using silicon nanowire field effect transistors with HfO2 as the sensing surface (2011) (60)
Effect of emitter contact on current gain of silicon bipolar devices (1979) (52)
Hot-carrier charge trapping and trap generation in HfO2 and Al2O3 field-effect transistors (2003) (51)
Mechanism and process dependence of negative bias temperature instability (NBTI) for pMOSFETs with ultrathin gate dielectrics (2001) (50)
Electron trapping at positively charged centers in SiO2 (1975) (49)
A novel high-performance lateral bipolar on SOI (1991) (46)
1 pm MOSFET VLSI Technology: Part lV— Hot-Electron Design Constraints (1979) (45)
Vertical SiGe-base bipolar transistors on CMOS-compatible SOI substrate (2003) (44)
1.25 /spl mu/m Deep-Groove-Isolated Self-Aligned Bipolar Circuits (1982) (44)
Design considerations of high-performance narrow-emitter bipolar transistors (1987) (40)
An advanced high-performance trench-isolated self-aligned bipolar technology (1987) (39)
Why BiCMOS and SOI BiCMOS (2002) (39)
Threshold instability in IGFET’s due to emission of leakage electrons from silicon substrate into silicon dioxide (1976) (38)
1 /spl mu/m MOSFET VLSI technology. IV. Hot-electron design constraints (1979) (38)
CMOS scaling in the 0.1-µm, 1.X-volt regime for high-performance applications (1995) (38)
A submicrometer high-performance bipolar technology (1989) (37)
Multivalley Effective-Mass Approximation for Donor States in Silicon. II. Deep-Level Group-VI Double-Donor Impurities (1971) (35)
On the Performance and Scaling of Symmetric Lateral Bipolar Transistors on SOI (2013) (35)
Scaling properties of bipolar devices (1980) (34)
Bipolar trends (1986) (34)
A High Performance 0.25/spl mu/m CMOS (1993) (33)
High-performance devices for a 0.15- mu m CMOS technology (1993) (31)
Reliability analysis of self-aligned bipolar transistor under forward active current stress (1986) (31)
Fabrication of CMOS on ultrathin SOI obtained by epitaxial lateral overgrowth and chemical-mechanical polishing (1990) (31)
SOI for a 1-volt CMOS technology and application to a 512 Kb SRAM with 3.5 ns access time (1993) (30)
On the narrow-emitter effect of advanced shallow profile bipolar transistors (1988) (29)
Subnanosecond self-aligned I2L/MTL circuits (1980) (27)
Fully-depleted-collector polysilicon-emitter SiGe-base vertical bipolar transistor on SOI (2002) (26)
History and future perspective of the modern silicon bipolar transistor (2001) (26)
A simulation study on thin SOI bipolar transistors with fully or partially depleted collector (2002) (25)
Hot-electron-induced instability in 0.5- mu m p-channel MOSFETs patterned using synchrotron X-ray lithography (1989) (24)
Complementary thin-base symmetric lateral bipolar transistors on SOI (2011) (24)
A comparative study of NBTI as a function of Si substrate orientation and gate dielectrics (SiON and SiON/HfO/sub 2/) (2005) (22)
A 27 GHz 20 ps PNP technology (1989) (21)
Photothermal ionization via excited states of sulfur donor in silicon (1971) (20)
A comprehensive study of hot-carrier instability in p- and n-type poly-Si gated MOSFET's (1994) (18)
A subnanosecond 5-kbit bipolar ECL RAM (1988) (17)
A comparison between bipolar transistor and nanowire field effect transistor biosensors (2015) (17)
On the Device Design and Drive-Current Capability of SOI Lateral Bipolar Transistors (2014) (16)
73ps si bipolar ECL circuits (1986) (16)
A 23 ps/2.1 mW ECL gate (1989) (16)
A model for negative bias temperature instability (NBTI) in oxide and high /spl kappa/ pFETs 13/spl times/-C6D8C7F5F2 (2004) (16)
Observation of Mobility Anisotropy of Electrons on (110) Silicon Surfaces at Low Temperatures (1972) (15)
A High Speed, Low Power P-Channel Flash EEPROM Using Silicon Rich Oxide as Tunneling Dielectric (1992) (15)
Hot-carrier charge trapping and reliability in high-k dielectrics (2002) (15)
Technologies to further reduce soft error susceptibility in SOI (2009) (15)
CMOS in the new millennium (2000) (14)
Effect of off-axis implant on the characteristics of advanced self-aligned bipolar transistors (1987) (13)
A high performance BiCMOS technology using 0.25 mu m CMOS and double poly 47 GHz bipolar (1992) (13)
A Perspective on Symmetric Lateral Bipolar Transistors on SOI as a Complementary Bipolar Logic Technology (2015) (13)
Radiation damage and its effect on hot-carrier induced instability of 0.5 μm CMOS devices patterned using synchrotron x-ray lithography (1990) (13)
Sub-300-ps CBL circuits (1989) (13)
Proton radiation effects in vertical SiGe HBTs fabricated on CMOS-compatible SOI (2005) (13)
Effects of inhomogeneities of surface-oxide charges on the electron energy levels in a semiconductor surface-inversion layer (1974) (13)
Advancing the state of the art in high-performance logic and array technology (1992) (12)
Substrate bias effects in vertical SiGe HBTs fabricated on CMOS-compatible thin film SOI (2005) (12)
Self-aligned npn bipolar transistors (1980) (12)
A perspective on the theory of MOSFET scaling and its impact (2007) (11)
The design and electrical characteristics of high-performance single-poly ion-implanted bipolar transistors (1989) (11)
Bipolar transistors on thin SOI: concept, status and prospect (2004) (11)
Hot-electron emission currents in N-channel IGFET's (1977) (11)
SiGe-on-insulator symmetric lateral bipolar transistors (2015) (10)
Sub-nanosecond self-aligned I2L/MTL circuits (1979) (10)
A Perspective on SOI Symmetric Lateral Bipolar Transistors for Ultra-Low-Power Systems (2016) (10)
IIIa-2 characterization of electronic gate current in IGFETS operating in the linear and saturation regions (1977) (10)
Hot-electron design constraints for one-micron IGFET's (1978) (9)
SOI lateral bipolar transistor with drive current >3mA/μm (2013) (9)
On the Base Current Components in SOI Symmetric Lateral Bipolar Transistors (2016) (9)
Will SOI have a life for the low-power market? (2008) (9)
A sub-50 ps single poly planar bipolar technology (1988) (8)
Silicon technology directions in the new millennium (2000) (8)
Photoionization cross sections of a two-electron donor center in silicon (1976) (8)
SOI for Low-Voltage and High-Speed CMOS (1994) (8)
A self-aligned inverse-T gate fully overlapped LDD device for sub-half micron CMOS (1989) (8)
Subnanosecond Self-Aligned I/sup 2/L/MTL Circuits (1980) (8)
Substrate-Voltage Modulation of Currents in Symmetric SOI Lateral Bipolar Transistors (2016) (8)
Stacked devices for SEU immune design (2010) (7)
Submicrometer Si and Si-Ge epitaxial-base double-poly self-aligned bipolar transistors (1991) (7)
A CMOS technology roadmap for the next fifteen years (1995) (7)
Epitaxial-base double-poly self-aligned bipolar transistors (1990) (6)
Multi-valley effective-mass approximation of shallow donor levels in silicon (1970) (6)
SOI series MOSFET for embedded high voltage applications and soft-error immunity (2008) (5)
On the impurity profiles of down scaled bipolar transistors (1986) (5)
Silicon VLSI trends - what else besides scaling CMOS to its limit? (2003) (5)
A study of process-related electrical defects in SOI lateral bipolar transistors fabricated by ion implantation (2018) (5)
0.25 /spl mu/m low power CMOS devices and circuits from 8 inch SOI materials (1995) (5)
Directions for silicon technology as we approach the end of CMOS scaling (2010) (4)
Trade-offs between SiGe and GaAs bipolar ICs (1995) (4)
Advances in Bipolar IC Technology (1987) (3)
CMOS Device Design (2009) (3)
A comparative study of hot-carrier instabilities in p- and n-type poly gate MOSFETs (1989) (3)
Summary Abstract: Materials and physics issues in scaling bipolar devices (1987) (3)
A perspective on future nanoelectronic devices (2013) (3)
Polysilicon-emitter SiGe-base bipolar transistors-what happens when Ge gets into the emitter? (2003) (3)
Bipolar junction transistor based sensors for chemical and biological sensing (2016) (3)
Voltage and Temperature Dependence of Interface Trap Generation by Hot Electrons in P- and N- Poly Gated MOSFETs (1991) (3)
Effect of End-of-Range Defects on Device Leakage in Direct Silicon Bonded (DSB) Technology (2008) (2)
Trends in CMOS technology and application development (1997) (2)
Silicon VLSI technology-today and tomorrow (1991) (2)
Group-VI donor impurities in silicon (1971) (2)
Silicon technology-emerging trends from a system application perspective (2003) (2)
FEOL technology trend (1998) (2)
TP-A1 shallow-level electron traps in SiO2 (1978) (2)
The Potential of Bipolar Devices for VLSI (1981) (2)
Ultra-Low Leakage Silicon-on-Insulator Technology for 65 nm Node and Beyond (2007) (2)
Comparison of Effects of Ionizing Radiation and High-Current Stress on Characteristics of Self-Aligned Bipolar Transistors (1988) (1)
GLSVLSI 2008 invited/keynote talk (2008) (1)
A high performance low temperature 0.3 mu m CMOS on SIMOX (1992) (1)
First demonstration of symmetric lateral NPN transistors on SOI featuring epitaxially-grown emitter/collector regions (2017) (1)
Heterojunction bipolar transistors with hydrogenated amorphous silicon contacts on crystalline silicon (2012) (1)
History, Present Trends, and Scaling of Silicon Bipolar Technology (1987) (1)
A Statistical Mechanics Model for NBTI in Oxides (2006) (1)
SiGe HBTs on CMOS-Compatible SOI (2005) (1)
0.1μm Technology and Beol (1996) (1)
Hot-carrier induced instability of 0.5 mu m CMOS devices patterned using synchrotron X-ray lithography (1989) (1)
With SiGe, who needs GaAs? (1998) (1)
Future directions for CMOS device technology development from a system application perspective (2007) (1)
Semiconductor-On-Insulator lateral bipolar transistors for high-speed low-power applications (2017) (1)
The Wiring Challenge: Complexity and Crowding (1996) (0)
On Shockley's 1952 Proceedings Of The IRE Paper (1997) (0)
Multi-Valley Effective-Mass Approximation of Group -v and Group-Vi Donor States in Silicon. (1971) (0)
Design and technology challenges for sub-0.5 mu m CMOS and bipolar (1989) (0)
Eeprom memory cell structure and its manufacturing method (1993) (0)
Leakage Engineering Enabling PDSOI Ring Oscillators Operating in Sub-100pA/µm Ioff Regime (2011) (0)
The physics of scaled bipolar devices (2008) (0)
A Study of NBTI and PBTI (Charge Trapping) in High k Stacks with NiSi, TiN, Re Gates (2007) (0)
Polycrystalline Silicon in ULSI Technologies: Challenges for Deep-Submicron Structures (1990) (0)
Session 15 Integrated circuits—Bipolar integrated circuits (1980) (0)
Increasing the current driving capability of epitaxial Schottky-barrier diodes using high-energy implantation (1985) (0)
Demonstration of Symmetric Lateral NPN Transistors on SOI Featuring Epitaxially Grown Emitter/Collector Regions (2018) (0)
Silicon VLSI Technology Trends (1992) (0)
Invited Possibilities and Limitations of Bipolar Devices (2008) (0)
Include sensors, the lateral complementary bipolar transistors (2016) (0)
Session 8 Integrated circuitsAdvanced bipolar integrated circuits (1979) (0)
Invited The Technology Trends in Sub-O , 5 pm Bipolar (2008) (0)
Ge-on-insulator lateral bipolar transistors (2016) (0)
Future silicon technology trends from a system application perspective (2003) (0)
The Technology Trends in Sub-0.5 μm Bipolar (1990) (0)
Measuring biomolecules and charged ions in an electrolyte (2011) (0)
Simulation Study of Simple CMOS-Compatible Thin-SOI Vertical Bipolar Transistors on Thin BOX with an Inversion Collector (2004) (0)
CMOS performance and density trends as we approach 0.1 /spl mu/m (1998) (0)
The Future of CMOS -- Limits and Opportunities (2007) (0)

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Tak Hung Ning's Academic­Influence.com Rankings

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Why Is Tak Hung Ning Influential?

Tak Hung Ning's Published Works

Published Works

Tak Hung Ning's AcademicInfluence.com Rankings