Todd M. Austin
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Todd M. Austin's AcademicInfluence.com Rankings
Todd M. Austincomputer-science Degrees
Computer Science
#8628
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#9071
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Computer Architecture
#55
World Rank
#57
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Computer Engineering
#109
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#110
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Database
#5624
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#5836
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Computer Science
Why Is Todd M. Austin Influential?
(Suggest an Edit or Addition)Todd M. Austin's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- MiBench: A free, commercially representative embedded benchmark suite (2001) (3720)
- The SimpleScalar tool set, version 2.0 (1997) (3308)
- SimpleScalar: An Infrastructure for Computer System Modeling (2002) (1723)
- Razor: a low-power pipeline based on circuit-level timing speculation (2003) (1395)
- Leakage Current: Moore's Law Meets Static Power (2003) (1259)
- A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor (2003) (991)
- DIVA: a reliable substrate for deep submicron microarchitecture design (1999) (797)
- Evaluating Future Microprocessors: the SimpleScalar Tool Set (1996) (698)
- Efficient detection of all pointer and array access errors (1994) (450)
- A self-tuning DVS processor using delay-error detection and correction (2005) (429)
- Cache-conscious data placement (1998) (299)
- A 2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency (2006) (224)
- BulletProof: a defect-tolerant CMP switch architecture (2006) (207)
- Dynamic Dependency Analysis of Ordinary Programs (1992) (199)
- A2: Analog Malicious Hardware (2016) (188)
- Making typical silicon matter with Razor (2004) (177)
- Exploring Variability and Performance in a Sub-200-mV Processor (2008) (174)
- CryptoManiac: a fast flexible architecture for secure communication (2001) (166)
- Energy-Efficient Subthreshold Processor Design (2009) (163)
- Opportunities and challenges for better than worst-case design (2005) (163)
- A fault tolerant approach to microprocessor design (2001) (159)
- Razor: circuit-level correction of timing errors for low-power operation (2004) (141)
- ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks (2016) (140)
- Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation (2007) (137)
- Ultra low-cost defect protection for microprocessor pipelines (2006) (135)
- Improving the accuracy and performance of memory communication through renaming (1997) (132)
- Regaining lost cycles with HotCalls: A fast interface for SGX secure enclaves (2017) (119)
- High Coverage Detection of Input-Related Security Faults (2003) (114)
- Fetch directed instruction prefetching (1999) (113)
- A scalable front-end architecture for fast instruction delivery (1999) (111)
- Efficient dynamic scheduling through tag elimination (2002) (111)
- Architectural support for fast symmetric-key cryptography (2000) (109)
- Fault-based attack of RSA authentication (2010) (104)
- Energy optimization of subthreshold-voltage sensor network processors (2005) (104)
- Zero-cycle loads: microarchitecture support for reducing load latency (1995) (101)
- Cyclone: a broadcast-free dynamic instruction scheduler with selective replay (2003) (90)
- Measuring Architectural Vulnerability Factors (2003) (87)
- On high-bandwidth data cache design for multi-issue processors (1997) (87)
- MASE: a novel infrastructure for detailed microarchitectural modeling (2001) (87)
- SenseBench: toward an accurate evaluation of sensor network processors (2005) (79)
- Performance and Variability Optimization Strategies in a Sub-200mV, 3.5pJ/inst, 11nW Subthreshold Processor (2007) (79)
- Reliable Systems on Unreliable Fabrics (2008) (73)
- MEVBench: A mobile computer vision benchmarking suite (2011) (71)
- Streamlining data cache access with fast address calculation (1995) (69)
- CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework (2008) (69)
- Polymorphic On-Chip Networks (2008) (68)
- Online design bug detection: RTL analysis, flexible mechanisms, and evaluation (2008) (67)
- Dynamic hammock predication for non-predicated instruction set architectures (1998) (64)
- StressTest: an automatic approach to test generation via activity monitors (2005) (60)
- DIVA: A Dynamic Approach to Microprocessor Verification (2000) (57)
- Architectural support for fast symmetric-key cryptography (2000) (56)
- Shielding against design flaws with field repairable control logic (2006) (55)
- Microprocessor Verification via Feedback-Adjusted Markov Models (2007) (52)
- Cold Boot Attacks are Still Hot: Security Analysis of Memory Scramblers in Modern Processors (2017) (50)
- Efficient checker processor design (2000) (50)
- High-Bandwidth Address Translation for Multiple-Issue Processors (1996) (48)
- Mobile supercomputers (2004) (48)
- Optimizations Enabled by a Decoupled Front-End Architecture (2001) (45)
- A second-generation sensor network processor with application-driven memory optimizations and out-of-order execution (2005) (45)
- Demand-driven software race detection using hardware performance counters (2011) (44)
- Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation (2006) (43)
- Challenges for architectural level power modeling (2002) (41)
- Performance Simulation Tools (2002) (40)
- Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn (2019) (40)
- A Flexible Software-Based Framework for Online Detection of Hardware Defects (2009) (40)
- A case for unlimited watchpoints (2012) (38)
- Low-Energy Data Cache Using Sign Compression and Cache Line Bisection (2002) (37)
- Reducing pipeline energy demands with local DVS and dynamic retiming (2004) (36)
- EFFEX: An embedded processor for computer vision based feature extraction (2011) (35)
- Architectural optimizations for low-power, real-time speech recognition (2003) (34)
- When good protections go bad: Exploiting anti-DoS measures to accelerate rowhammer attacks (2017) (34)
- Exploring specialized near-memory processing for data intensive operations (2016) (31)
- CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions (2012) (29)
- Low-Cost Protection for SER Upsets and Silicon Defects (2007) (29)
- Zero-cycle loads: microarchitecture support for reducing load latency (1995) (26)
- Deployment of better than worst-case design: solutions and needs (2005) (26)
- Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design (2021) (25)
- Error analysis for the support of robust voltage scaling (2005) (24)
- Scalable hybrid verification of complex microprocessors (2001) (24)
- Exploiting selective placement for low-cost memory protection (2008) (24)
- Microarchitectural power modeling techniques for deep sub-micron microprocessors (2004) (20)
- What input-language is the best choice for high level synthesis (HLS)? (2010) (20)
- Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors (2008) (20)
- Compiler controlled value prediction using branch predictor based confidence (2000) (20)
- Getting in control of your control flow with control-data isolation (2015) (19)
- A Hacker’s Guide to the SimpleScalar Architectural Research Tool Set (1996) (19)
- Testudo: Heavyweight security analysis via statistical sampling (2008) (18)
- Challenges in processor modeling and validation [Guest Editors?? introduction] (1999) (18)
- Design for Verification? (2001) (17)
- Architectural implications of brick and mortar silicon manufacturing (2007) (17)
- Cyclone: Detecting Contention-Based Cache Information Leaks Through Cyclic Interference (2019) (17)
- Classifying load and store instructions for memory renaming (1999) (16)
- A user's and hacker's guide to the simplescalar architectural research tool set (1997) (16)
- DVS for on-chip bus designs based on timing error correction (2005) (14)
- Recent extensions to the SimpleScalar tool suite (2004) (14)
- Performance analysis using pipeline visualization (2001) (14)
- A Self-Tuning Dynamic Voltage Scaled Processor Using Delay-Error Detection and Correction (2006) (13)
- Assessing SEU Vulnerability via Circuit-Level Timing Analysis (2005) (13)
- Exploiting the analog properties of digital circuits for malicious hardware (2017) (13)
- Insights into the Memory Demands of Speech Recognition Algorithms (2002) (13)
- Tetra: Evaluation of Serial Program Performance on Fine-Grain Parallel Processors (1993) (13)
- EVA: An efficient vision architecture for mobile systems (2013) (12)
- Guest Editors' Introduction: Challenges in Processor Modeling and Validation (1999) (12)
- High Performance and Energy Efficient Serial Prefetch Architecture (2009) (11)
- Smokestack: Thwarting DOP Attacks with Runtime Stack Layout Randomization (2019) (11)
- Øzone: Efficient execution with zero timing leakage for modern microarchitectures (2017) (11)
- Memory Renaming: Fast, Early and Accurate Processing of Memory Communication (1999) (11)
- Profile Guided Load Marking for Memory Renaming (1998) (11)
- Highly scalable distributed dataflow analysis (2011) (11)
- Architecting a reliable CMP switch architecture (2007) (10)
- ISPASS 2009: IEEE International symposium on Performance Analysis of Systems and Software (2009) (10)
- Reducing the Overhead of Authenticated Memory Encryption Using Delta Encoding and ECC Memory (2018) (10)
- Circuit-aware architectural simulation (2004) (9)
- Effective support of simulation in computer architecture instruction (2002) (9)
- Cyclone (2019) (8)
- Application specific architectures: a recipe for fast, flexible and power efficient designs (2001) (7)
- Efficient Software Decoder Design (2001) (7)
- uSFI: Ultra-lightweight software fault isolation for IoT-class devices (2018) (7)
- SWAN: Mitigating Hardware Trojans with Design Ambiguity (2018) (7)
- Remora: A Dynamic Self-Tuning Processor (2002) (6)
- Knapsack: a Zero-cycle Memory Hierarchy Component (1993) (6)
- Locking down insecure indirection with hardware-based control-data isolation (2015) (6)
- Bridging the Moore's Law Performance Gap with Innovation Scaling (2015) (6)
- Memory system design space exploration for low-power, real-time speech recognition (2004) (5)
- Using introspective software-based testing for post-silicon debug and repair (2010) (5)
- Memory System Design Space Exploration for Low-Power, Real-Time Speech Recognition (2004) (5)
- Designing robust microarchitectures (2004) (5)
- NSF Computer Performance Evaluation Workshop: Summary and Action Items (2002) (5)
- SiPterposer: A Fault-Tolerant Substrate for Flexible System-in-Package Design (2019) (4)
- Practical Selective Replay for Reduced-Tag Schedulers (2003) (4)
- Hardware and software mechanisms for reducing load latency (1996) (4)
- Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware (2021) (4)
- BitRaker Anvil : Binary Instrumentation for Rapid Creation of Simulation and Workload Analysis Tools (2004) (4)
- Reliability-aware data placement for partial memory protection in embedded processors (2006) (3)
- Schnauzer: scalable profiling for likely security bug sites (2013) (3)
- Microprocessor Verification via (2007) (2)
- Depth-driven verification of simultaneous interfaces (2006) (2)
- Scene Understanding for the Visually Impaired Using Visual Sonification by Visual Feature Analysis and Auditory Signatures (2012) (2)
- A Power Efficient Speculative Fetch Architectur (2000) (2)
- The potential of sampling for dynamic analysis (2011) (2)
- SNIFFER: A high-accuracy malware detector for enterprise-based systems (2017) (2)
- The SimpleScalar tool set as an instructional tool: experiences and future directions (1998) (2)
- Vulnerability-Tolerant Secure Architectures (2018) (1)
- MVSS: Michigan Visual Sonification System (2012) (1)
- Neverland: Lightweight Hardware Extensions for Enforcing Operating System Integrity (2019) (1)
- Software-driven Security Attacks: From Vulnerability Sources to Durable Hardware Defenses (2021) (1)
- Microarchitectural Power Modeling Techniques for Deep SubMicron (2002) (1)
- Keynote talk I: Ending the Tyranny of Amdahl's Law (2015) (1)
- SimpleDSP : A Fast and Flexible DSP Processor Model ( EXTENDED ABSTRACT ) (2003) (1)
- Robust Computing in the Nanoscale Era (2016) (0)
- Position Paper : The Potential of Sampling for Dynamic Analysis (2011) (0)
- SWAN : Hardware Trojan Security With Ambiguous Netlists (2018) (0)
- M icroarc h itect u ral Power MO ng Techniques for Deep Su b-Micron Microprocessors* (2004) (0)
- VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms: 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papers (2019) (0)
- Wrangling in the Power of Code Pointers with ProxyCFI (2019) (0)
- 8. Conclusion Availability 7.3. Block Tour Information 7.4. Block Reuse Information (1998) (0)
- On the rules of low-power design (and how to break them) (2008) (0)
- An adaptive L2 cache prefetching mechanism for effective exploitation of abundant memory bandwidth of 3-D IC technology (2013) (0)
- Dynamic Dependency Analysis of Ordinary Programs 1 (1992) (0)
- Robust low power computing in the nanoscale era (2006) (0)
- Analysis of Low Leakage and High Performance 4 bit CLA Full Adder (2020) (0)
- On Architectural Support for Systems Security (2016) (0)
- Exploiting implicit parallelism in SPARC instruction execution (1990) (0)
- Sequestered Encryption: A Hardware Technique for Comprehensive Data Privacy (2022) (0)
- Session details: Clocks, scheduling, and stores (2007) (0)
- Session details: Computation in the post-Turing era (2009) (0)
- The Gigascale Systems Research Center (GSRC) - Addressing the Information-System Platform Design Challenges for the Late- and Post- (2010) (0)
- Keynote: Peering into the post Moore's Law world (2017) (0)
- Design in the Late-and Post-Silicon Eras (2008) (0)
- Twine: A Chisel Extension for Component-Level Heterogeneous Design (2022) (0)
- Thwarting Control Plane Attacks with Displaced and Dilated Address Spaces (2020) (0)
- Developed to provide an infrastructure for simulation and architectural modeling, the SimpleScalar toolset offers an open source distribution especially suited to the needs of researchers and instructors. (2002) (0)
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What Schools Are Affiliated With Todd M. Austin?
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