Anant Agarwal
#4,279
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Computer architecture researcher
Anant Agarwal's AcademicInfluence.com Rankings
Anant Agarwalcomputer-science Degrees
Computer Science
#396
World Rank
#412
Historical Rank
#224
USA Rank
Computer Architecture
#5
World Rank
#5
Historical Rank
#4
USA Rank
Database
#7127
World Rank
#7375
Historical Rank
#840
USA Rank
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Computer Science
Anant Agarwal's Degrees
- PhD Electrical Engineering and Computer Science Stanford University
Why Is Anant Agarwal Influential?
(Suggest an Edit or Addition)According to Wikipedia, Anant Agarwal is an Indian computer architecture researcher. He is a professor of Electrical Engineering and Computer Science at the Massachusetts Institute of Technology , where he led the development of Alewife, an early cache coherent multiprocessor, and also has served as director of the MIT Computer Science and Artificial Intelligence Laboratory. He is the founder and CTO of Tilera, a fabless semiconductor company focusing on scalable multicore embedded processor design. He also serves as the CEO of edX, a joint partnership between MIT and Harvard University that offers free online learning.
Anant Agarwal's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs (2002) (1021)
- On-Chip Interconnection Architecture of the Tile Processor (2007) (890)
- Baring It All to Software: Raw Machines (1997) (678)
- Limits on Interconnection Network Performance (1991) (547)
- An evaluation of directory schemes for cache coherence (1988) (532)
- Graphite: A distributed parallel simulator for multicores (2010) (520)
- DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling (2012) (507)
- Evaluation of the Raw microprocessor: an exposed-wire-delay architecture for ILP and streams (2004) (458)
- APRIL: a processor architecture for multiprocessing (1990) (454)
- LimitLESS directories: A scalable cache coherence scheme (1991) (382)
- The MIT Alewife machine: architecture and performance (1995) (368)
- Factored operating systems (fos): the case for a scalable operating system for multicores (2009) (365)
- Dynamic knobs for responsive power-aware computing (2011) (336)
- An analytical cache model (1989) (335)
- THE MIT ALEWIFE MACHINE: A LARGE-SCALE DISTRIBUTED-MEMORY MULTIPROCESSOR (1991) (330)
- Directory-based cache coherence in large-scale multiprocessors (1990) (294)
- Column-associative Caches: A Technique For Reducing The Miss Rate Of Direct-mapped Caches (1993) (281)
- Cache performance of operating system and multiprogramming workloads (1988) (246)
- ATAC: A 1000-core cache-coherent processor with on-chip optical network (2010) (232)
- ATUM: a new technique for capturing address traces using microcode (1986) (228)
- Performance Tradeoffs in Multithreaded Processors (1992) (202)
- Application heartbeats: a generic interface for specifying program performance and goals in autonomous computing environments (2010) (181)
- Sparcle: an evolutionary processor design for large-scale multiprocessors (1993) (181)
- Logic emulation with virtual wires (1997) (165)
- Scalar operand networks: on-chip interconnect for ILP in partitioned architectures (2003) (163)
- Integrating message-passing and shared-memory: early experience (1993) (159)
- Foundations of Analog and Digital Electronic Circuits (2005) (148)
- Scalability of parallel machines (1991) (141)
- Using Code Perforation to Improve Performance, Reduce Energy Consumption, and Respond to Failures (2009) (141)
- Automatic Partitioning of Parallel Loops and Data Arrays for Distributed Shared-Memory Multiprocessors (1995) (122)
- Analysis of cache performance for operating systems and multiprogramming (1989) (121)
- Adaptive Backoff Synchronization Techniques (1989) (120)
- The RAW benchmark suite: computation structures for general purpose computing (1997) (113)
- An operating system for multicore and clouds: mechanisms and implementation (2010) (111)
- Memory-reference characteristics of multiprocessor applications under MACH (1988) (108)
- Maps: a compiler-managed memory system for Raw machines (1999) (106)
- LoPC: modeling contention in parallel algorithms (1997) (100)
- Multiprocessor cache analysis using ATUM (1988) (93)
- Anatomy of a message in the Alewife multiprocessor (1993) (91)
- Self-aware computing in the Angstrom processor (2012) (89)
- Comparison of Decision-Making Strategies for Self-Optimization in Autonomic Computing Systems (2012) (82)
- The KILL Rule for Multicore (2007) (82)
- Application heartbeats for software performance and health (2010) (81)
- Software-extended coherent shared memory: performance and cost (1994) (81)
- Compositional dependence of the nonlinear refractive index of new germanium-based chalcogenide glasses (2009) (79)
- MGS: A Multigrain Shared Memory System (1996) (78)
- Scalar operand networks (2005) (77)
- Thousand-Core Chips [Roundtable] (2008) (76)
- Waiting algorithms for synchronization in large-scale multiprocessors (1993) (75)
- A 16-issue multiple-program-counter microprocessor with point-to-point scalar operand network (2003) (71)
- Baring it all to Software: The Raw Machine (1997) (66)
- Controlling software applications via resource allocation within the heartbeats framework (2010) (66)
- A generalized software framework for accurate and efficient management of performance goals (2013) (64)
- SEEC: A Framework for Self-aware Computing (2010) (57)
- Evaluating the performance of software cache coherence (1989) (55)
- Solving graph problems with dynamic computation structures (1996) (52)
- SEEC: A General and Extensible Framework for Self-Aware Computing (2011) (49)
- Blocking: exploiting spatial locality for trace compaction (1990) (49)
- Enabling technologies for self-aware adaptive systems (2010) (49)
- TraceBack: first fault diagnosis by reconstruction of distributed control flow (2005) (48)
- Software-based instruction caching for embedded processors (2006) (47)
- Power Optimization in Embedded Systems via Feedback Control of Resource Allocation (2013) (47)
- MIPS-X: a 20-MIPS peak, 32-bit microprocessor with on-chip cache (1987) (47)
- ATAC: Improving performance and programmability with on-chip optical networks (2010) (42)
- TIERS: Topology IndependEnt Pipelined Routing and Scheduling for VirtualWire™ Compilation (1995) (42)
- Cross-layer Energy and Performance Evaluation of a Nanophotonic Manycore Processor System Using Real Application Workloads (2012) (42)
- Teaching electronic circuits online: Lessons from MITx's 6.002x on edX (2013) (41)
- The Raw Compiler Project (1999) (41)
- Closing the window of vulnerability in multiphase memory transactions (1992) (39)
- Smartlocks: lock acquisition scheduling for self-aware synchronization (2010) (38)
- A Unified Operating System for Clouds and Manycore: fos (2009) (38)
- Software Standards for the Multicore Era (2009) (37)
- Experience with fine-grain synchronization in MIMD machines for preconditioned conjugate gradient (1993) (37)
- Exploiting two-case delivery for fast protected messaging (1998) (36)
- The MIT Alewife Machine (1999) (35)
- Exploring optimal cost-performance designs for Raw microprocessors (1998) (35)
- Automatic Partitioning of Parallel Loops for Cache-Coherent Multiprocessors (1993) (35)
- Self-Aware Computing (2009) (35)
- Decision making in autonomic computing systems: comparison of approaches and techniques (2011) (33)
- Compiler Support for Scalable and Efficient Memory Systems (2001) (32)
- Versatility and VersaBench: A New Metric and a Benchmark Suite for Flexible Architectures (2004) (32)
- Remote Store Programming (2010) (30)
- A Stream Algorithm for the SVD (2003) (29)
- Low-Cost Support for Fine-Grain Synchronization in Multiprocessors (1992) (29)
- Software Technologies for Reconfigurable Systems (1996) (29)
- On-Chip Instruction Caches for High Performance Processors, (1987) (27)
- Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed-Memory Multiprocessors (1996) (27)
- Core Count vs Cache Size for Manycore Architectures in the Cloud (2010) (27)
- rMPI: Message Passing on Multicore Processors with On-Chip Interconnect (2008) (27)
- Memory bank disambiguation using modulo unrolling for Raw machines (1998) (25)
- SimpleFit: A Framework for Analyzing Design Trade-Offs in Raw Architectures (2001) (23)
- Multicore Performance Optimization Using Partner Cores (2011) (23)
- Stream Algorithms and Architecture (2004) (22)
- Seec: a framework for self-aware management of goals and constraints in computing systems (power-aware computing, accuracy-aware computing, adaptive computing, autonomic computing) (2013) (22)
- SEEC: A Framework for Self-aware Management of Multicore Resources (2011) (22)
- The Raw Processor: A Composeable 32-Bit Fabric for Embedded and General Purpose Computing (2001) (22)
- ATAC: A Manycore Processor with On-Chip Optical Network (2009) (21)
- Power-Aware Computing with Dynamic Knobs (2010) (21)
- Hierarchical Compilation of Macro Dataflow Graphs for Multiprocessors with Local Memory (1994) (20)
- The sensitivity of communication mechanisms to bandwidth and latency (1998) (20)
- FUGU: Implementing Translation and Protection in a Multiuser, Multimodel Multiprocessor (1994) (19)
- Analyzing multiprocessor cache behavior through data reference modeling (1993) (19)
- Kerr nonlinearity and multi-photon absorption in germanium at mid-infrared wavelengths (2017) (18)
- A Comparison of Autonomic Decision Making Techniques (2011) (18)
- Application Performance on the MIT Alewife Machine (1996) (16)
- Energy Scalability of On-Chip Interconnection Networks in Multicore Architectures (2008) (15)
- Smartlocks: Self-Aware Synchronization through Lock Acquisition Scheduling (2009) (14)
- Integrating message-passing and shared-memory: early experience (1993) (13)
- SUDS: Primitive Mechanisms for Memory Dependence Speculation (1999) (12)
- Constructing virtual architectures on a tiled processor (2006) (12)
- A quantitative comparison of reconfigurable, tiled, and conventional architectures on bit-level computation (2004) (12)
- PIKA: A Network Service for Multikernel Operating Systems (2014) (12)
- The Case for a Factored Operating System (fos) (2008) (12)
- Selecting Spatiotemporal Patterns for Development of Parallel Applications (2012) (11)
- Materials For Monolithic Silicon Microphotonics (1997) (11)
- TEMPORAL, PROCESSOR, AND SPATIAL LOCALITY IN MULTIPROCESSOR MEMORY REFERENCES (1990) (10)
- Fleets: Scalable Services in a Factored Operating System (2011) (9)
- Compile-time Techniques for Processor Allocation in Macro Dataflow Graphs for Multiprocessors (1992) (9)
- A Generalized Software System for Accurate and Efficient Management of Application Performance Goals (2013) (8)
- Control-theoretical CPU allocation : Design and Implementation with Feedback Control (2011) (8)
- Configurable fine-grain protection for multicore processor virtualization (2012) (7)
- ARCc: A case for an architecturally redundant cache-coherence architecture for large multicores (2011) (7)
- Sparcle: A Multithreaded VLSI Processor for Parallel Computing (1992) (7)
- Partitioning strategies: Spatiotemporal patterns of program decomposition (2009) (7)
- Shared Memory Versus Message Passing for Iterative Solution of Sparse Irregular Problems (1996) (6)
- Trace compaction using cache filtering with blocking (1987) (5)
- Tiled Multicore Processors (2009) (5)
- Modeling a circuit switched multiprocessor interconnect (1989) (5)
- 6.002 Circuits and Electronics, Fall 2000 (2000) (5)
- Remote Store Programming: Mechanisms and Performance (2009) (5)
- How to Choose the Grain Size of a Parallel Computer (1994) (5)
- Correction to 'Directory-based cache coherence in large-scale multiprocessor' (1990) (5)
- ATAC: On-Chip Optical Networks for Multicore Processors (2014) (5)
- The case for elastic operating system services in fos (2012) (5)
- Assessment in Digital At-scale Learning Environments: MOOCs and technology to advance learning and learning research (Ubiquity symposium) (2014) (5)
- Emulation of a Sparc Microprocessor with the MIT Virtual Wires Emulation System (1994) (4)
- How to build scalable on-chip ILP networks for a decentralized architecture (2000) (4)
- Application Performance on the MIT Alewife Multiprocessor (1996) (4)
- Efficient Cache Coherence on Manycore Optical Networks (2010) (4)
- Gigabit routing on a software-exposed tiled-microprocessor (2005) (4)
- Partitioning Strategies for Concurrent Programming (2009) (4)
- Organic Computing (2008) (4)
- Memory Assignment for Multiprocessor Caches through Grey Coloring (1994) (3)
- Energy scalability of on-chip interconnection networks (2007) (3)
- Scalar Operand Networks: Design, Implementation, and Analysis (2004) (3)
- Vote the OS off your Core (2011) (3)
- Versatile Tiled-Processor Architectures: The Raw Approach (2004) (3)
- Foundations of Analog and Digital Electronic Circuits (The Morgan Kaufmann Series in Computer Architecture and Design) (2005) (3)
- Multiprocessor Address Tracing and Performance Analysis (1991) (3)
- Addressing Partitioned Arrays in Distributed Memory Multiprocessors – the Software Virtual Memory Approach (1998) (3)
- Message Passing in a Factored OS (2011) (2)
- Conclusions and Suggestions for Future Work (1989) (2)
- A pattern for efficient parallel computation on multicore processors with scalar operand networks (2010) (2)
- Cache Performance Analysis for System References (1989) (2)
- Networks of the Tilera Multicore Processor (2010) (2)
- Alleviating Memory Contention in Matrix Computations on Large-Scale . . . (1993) (2)
- Proceedings of the eighth international conference on Architectural support for programming languages and operating systems (1998) (1)
- Retrospective: the MIT Alewife machine: architecture and performance (1998) (1)
- Architectural and implementation issues for multithreading (panel session I) (1994) (1)
- MIPS-X: the external interface (1987) (1)
- APRIL: A processor architecture for multiprocessing. Technical report (1991) (1)
- Self-aware Computing in the Angstrom Processor Citation (2012) (1)
- FOS: A Factored Operating Systems for High Assurance and Scalability on Multicores (2012) (1)
- Surface Smoothing of Polycrystalline Si Waveguides With Gas-Cluster Ion Beams (1999) (1)
- RawNet: Network Processing on the Raw Processor (2002) (1)
- Software orchestration of instruction level parallelism on tiled processor architectures (2005) (1)
- The Raw Microprocessor: Enabling Embedded Signal Processing on a General Purpose Computer Architecture (2002) (1)
- Bayesian Inference Algorithm on Raw by Alda Luong (2006) (0)
- Critical problems in very-large-scale computer systems. Semiannual technical report, 1 April-30 September 1989 (1988) (0)
- Cache Analyses Techniques — An Analytical Cache Model (1989) (0)
- A Retrospective on The MIT Alewife Machine : Ar chitecture and Performance AnantAgarwal (2002) (0)
- Tracing and Performance Analysis (0)
- Dpool: a distributed data structure for factored operating systems (2012) (0)
- Il 1 C ifLE " 0 Memory-Reference Characteristics co of ( f ) Multiprocessor Applications under MACH Sl ELECTED ' (0)
- AD-Al 8 i 716 AN ANALYTICAL CACHE MODEL DTlC (0)
- Keynote 3 (Banquet Talk) Digital space (2009) (0)
- Engineering materials for mid-infrared optical sensor applications (2013) (0)
- PCA RAW FABRIC: Architectural Prototyping, Demonstration and Evaluation (2007) (0)
- Transient Cache Analysis — Trace Sampling and Trace Stitching (1989) (0)
- Critical problems in very-large-scale computer systems. Semiannual technical report, 1 October 1989-31 March 1990 (1990) (0)
- EVALUATING THE PERFORMANCE OF SOFTWARE CACHE COHERENCE DTIC Sa ELECTE (0)
- Stream Multicore Processors (2007) (0)
- Modeling Multiprogrammed Caches (2008) (0)
- An Extended SSD-Based Cache for Efficient Object Store Access in SAP IQ (2022) (0)
- Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors (2001) (0)
- Obtaining Accurate Trace Data (1989) (0)
- 2001 Conference Proceedings of the 23rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society (Cat. No.01CH37272) (2001) (0)
- The MIT alewife machine : Distributed shared memory systems (1999) (0)
- WAM 2.3 A 32b Microprocessor with OnChip ZKbyte Instruction Cache (1984) (0)
- Alewife Systems Memo #10 Overview of the Alewife Project (1990) (0)
- Application Performance on theMIT Alewife (1996) (0)
- Photonic Crystals on Erbium doped tellurite Thin Films for Broadband Enhanced Photoluminescence at Near Infrared (2012) (0)
- MIT / LCS / TM-397 TEMPORAL , PROCESSOR , AND SPATIAL LOCALITY IN MULTIPROCESSOR MEMORY (0)
- The Other Face of On-Chip Interconnect (2009) (0)
- 7. Conclusions 6. Related Work (0)
- Keynote: The Other Face of On-Chip Interconnect (2009) (0)
- Remote Store Programming : Reflective Memory for Multicore ∗ (2009) (0)
- Keynote 3 (Banquet Talk) (2009) (0)
- Impact of Multiprogramming on Cache Performance (1989) (0)
- The Raw Fabric: A Technology for Rapid Embedded System Customization (2004) (0)
- Smart Queue , SkipList , PairHeap , Stack Reinforcement Learning Publication ListE . g . : 1 4 ( of a discrete var ) Smart Skip List S t Serial Skip List 32 Interface Lock cancoun (2011) (0)
- Addressing Partitioned Arrays in Distributed MemoryMultiprocessors { the Software Virtual Memory (1993) (0)
- Adaptive Backoff Synchronization Techniques 1 (0)
- ATAC: Improving performance and programmability (2010) (0)
- Scalable Applications on a Factored Operating System (2011) (0)
- Building Blocks for Intrachip Optical Networks (2008) (0)
- Multiprocessor Cache Analysis (1989) (0)
- Another Direction for Future Research (1992) (0)
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Anant Agarwal is affiliated with the following schools:
