Michael J. Flynn
#4,063
Most Influential Person Now
American professor emeritus at Stanford University
Michael J. Flynn's AcademicInfluence.com Rankings
Michael J. Flynncomputer-science Degrees
Computer Science
#266
World Rank
#278
Historical Rank
#157
USA Rank
Computer Architecture
#1
World Rank
#1
Historical Rank
#1
USA Rank
Database
#7742
World Rank
#8049
Historical Rank
#973
USA Rank
Michael J. Flynnengineering Degrees
Engineering
#296
World Rank
#539
Historical Rank
#134
USA Rank
Electrical Engineering
#2491
World Rank
#2611
Historical Rank
#316
USA Rank
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Computer Science Engineering
Michael J. Flynn's Degrees
- PhD Electrical Engineering Purdue University
Why Is Michael J. Flynn Influential?
(Suggest an Edit or Addition)According to Wikipedia, Michael J. Flynn is an American professor emeritus at Stanford University. Early life and education Flynn was born in New York City. Career Flynn proposed Flynn's taxonomy, a method of classifying parallel digital computers, in 1966.
Michael J. Flynn's Published Works
Number of citations in a given year to any of this author's works
Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author
Published Works
- Division Algorithms and Implementations (1997) (327)
- An area model for on-chip memories and its application (1991) (198)
- Design Issues in Division and Other Floating-Point Operations (1997) (186)
- Advanced Computer Arithmetic Design (2001) (161)
- On Division by Functional Iteration (1970) (149)
- Computer Organization and Architecture (1978) (137)
- Deep submicron microprocessor design issues (1999) (125)
- Microprocessor design issues: thoughts on the road ahead (2005) (122)
- PAM-Blox: high performance FPGA design for adaptive computing (1998) (109)
- Parallel architectures (1996) (109)
- Designing high-performance digital circuits using wave pipelining: algorithms and practical experiences (1993) (91)
- Fast division using accurate quotient approximations to reduce the number of iterations (1991) (84)
- The SNAP project: design of floating point arithmetic units (1997) (82)
- Beyond Traditional Microprocessors for Geoscience High-Performance Computing Applications (2011) (79)
- High-Speed Addition in CMOS (1992) (70)
- Moving from petaflops to petadata (2013) (67)
- Fast division algorithm with a small lookup table (1999) (58)
- A comparison of hardware prefetching techniques for multimedia benchmarks (1996) (57)
- Hardware software tri-design of encryption for mobile communication units (1998) (54)
- Instruction Window Size Trade-Offs and Characterization of Program Parallelism (1994) (51)
- Parallel square and cube computations (2000) (50)
- On fast IEEE rounding (1991) (48)
- Producer-consumer communication in distributed shared memory multiprocessors (1999) (45)
- Hardware and software cache prefetching techniques for MPEG benchmarks (2000) (45)
- Inserting active delay elements to achieve wave pipelining (1989) (45)
- Optimal Pipelining (1990) (44)
- Performance trade-offs for microprocessor cache memories (1988) (41)
- The case for a redundant format in floating point arithmetic (2003) (39)
- An Analysis of Division Algorithms and Implementations (1995) (38)
- The Effect Of Page Allocation On Caches (1992) (38)
- Limits of Scaling MOSFETs (1995) (36)
- Strategies for branch target buffers (1991) (35)
- An improved algorithm for high-speed floating-point addition (1990) (35)
- Tempest: a substrate for portable parallel programs (1995) (33)
- Systematic IEEE rounding method for high-speed floating-point multipliers (2004) (32)
- Computer System Design: System-on-Chip (2011) (32)
- Early Detection of All-Zero Coefficients in H.263 (1997) (31)
- Scaling Reverse Time Migration Performance through Reconfigurable Dataflow Engines (2014) (29)
- Object-oriented domain specific compilers for programming FPGAs (2001) (29)
- Finite-Difference Wave Propagation Modeling on Special-Purpose Dataflow Machines (2013) (29)
- Technology Scaling Effects on Multipliers (1998) (29)
- Approaching a nanosecond: a 32 bit adder (1988) (29)
- High-performance floating point divide (2001) (27)
- Comparative Studies of Pipelined Circuits (1993) (27)
- Performance enhancement of H.263 encoder based on zero coefficient prediction (1997) (25)
- Leading One Detection --- Implementation, Generalization, and Application (1991) (25)
- Page allocation to reduce access time of physical caches (1990) (25)
- Performance Factors for Superscalar Processors (1995) (25)
- A Variable Latency Pipelined Floating-Point Adder (1996) (23)
- Minimizing the complexity of SRT tables (1998) (23)
- Area - Time - Power and Design effort: the basic tradeoffs in Application Specific Systems (2005) (23)
- StReAm: object-oriented programming of stream architectures using PAM-Blox (2000) (23)
- ABSS v2.0: a SPARC Simulator (1998) (22)
- Update-based cache coherence protocols for scalable shared-memory multiprocessors (1994) (21)
- Design And Implementation Of The Snap Floating-Point Adder (1991) (21)
- ON DIVISION AND RECIPROCAL CACHES (1995) (21)
- Linked list cache coherence for scalable shared memory multiprocessors (1993) (20)
- Dataflow supercomputing (2012) (20)
- Reducing division latency with reciprocal caches (1996) (19)
- Binary multiplication Using Partially Redundant Multiples (1992) (19)
- Fast multiplication in VLSI using wave pipelining techniques (1994) (19)
- Branch Strategies: Modeling and Optimization (1991) (18)
- Hardware starting approximation for the square root operation (1993) (18)
- High-performance arithmetic for division and the elementary functions (2002) (18)
- Design Issues in Floating-Point Division (1994) (18)
- Flynn's Taxonomy (2011) (17)
- Rational arithmetic units in computer systems (2000) (16)
- Basic issues in microprocessor architecture (1999) (16)
- Fast IEEE Rounding for Division by Functional Iteration (1996) (15)
- Improving the effectiveness of floating point arithmetic (2001) (15)
- Implementing Division and Other Floating-Point Operations: A System Perspective (1995) (14)
- An automated method for software controlled cache prefetching (1998) (14)
- Improving performance for software MPEG players (1996) (14)
- Writes caches as an alternative to write buffers (1991) (14)
- The SNAP project: towards sub-nanosecond arithmetic (1995) (13)
- EMMY: an emulation system for user microprogramming (1975) (13)
- Rapid Redesign Of Analog Standard Cells Using Constrained Optimization Techniques (1992) (13)
- Hardware Starting Approximation Method and Its Application to the Square Root Operation (1996) (12)
- Dynamic clock-frequencies for FPGAs (2006) (12)
- ONE PREDICTION-IMPLEMENTATION , GENERALIZATION , AND APPLICATION (1998) (12)
- ASIC microprocessors (1989) (11)
- Reducing the Mean Latency of Floating-Point Addition (1998) (11)
- A 16/spl times/16-bit static CMOS wave-pipelined multiplier (1994) (11)
- Reducing Cache Miss Rates Using Prediction Caches (1996) (11)
- Cost-efficient high-radix division (1991) (11)
- Surviving the end of scaling of traditional micro processors in HPC (2010) (11)
- Prediction caches for superscalar processors (1997) (11)
- Parallel High-Radix Nonrestoring Division (1993) (11)
- The Design and Implementation of a High-Performance Floating-Point Divider (1994) (10)
- Optimum Placement and Routing of Multiplier Partial Product Trees (1996) (10)
- Environmental Limits on the Performance of CMOS Wave-Pipelined Circuits (1994) (10)
- Multiprocessor architecture using an audit trail for fault tolerance (1999) (10)
- Performance/Area Tradeoffs in Booth Multipliers (1995) (9)
- Stochastic Congestion Model for VLSI Systems (1997) (8)
- An area-utility model for on-chip memories and its application (1990) (8)
- A Redundant Digit Floating Point System (2003) (8)
- Computer Engineering 30 Years After the IBM Model 91 (1998) (8)
- Approximating the sine function with combinational logic (1992) (8)
- System design using wave-pipelining: a CMOS VLSI vector unit (1995) (8)
- Evaluating Performance Tradeoffs Between Fine-Grained and Coarse-Grained Alternatives (1995) (7)
- Measuring the Complexity of SRT Tables (1995) (7)
- What's ahead in computer design? (1997) (7)
- Multipliers and Datapaths (1994) (7)
- Analytical modeling of multithreaded pipeline performance (1994) (7)
- The effects of processor architecture on instruction memory traffic (1990) (7)
- Strategies to improve I/O cache performance (1993) (7)
- USING A FLOATING-POINT MULTIPLIER'S INTERNALS FOR HIGH-RADIX DIVISION AND SQUARE ROOT (1993) (7)
- Vliw processors: efficiently exploiting instruction level parallelism (2000) (7)
- Wave Pipelining Of High Performance Cmos Static Ram (1994) (7)
- Suggestions for implementing a fast IEEE multiply-add-fused instruction (1991) (6)
- Computer Architecture and Technology: Some Thoughts on the Road Ahead (2004) (6)
- Latency Tolerance for Dynamic Processors (1996) (6)
- Optimum instruction-level parallelism (ILP) for superscalar and VLIW processors (2001) (5)
- Towards better instruction sets (1983) (5)
- Performance and Area Analysis of Processor Configurations with Scaling of Technology (1994) (5)
- Exploiting fine-grain concurrency: Analytical insights in superscalar processor design (1991) (5)
- Communication mechanisms in shared memory multiprocessors (1998) (5)
- The Impact of Cache Coherence Protocols on Systems using Fine-Grain Data Synchronization (1994) (5)
- Area And Performance Analysis Of Processor Configurations With Scaling Of Technology (1994) (5)
- Architecture Evaluator''s Work Bench and its Application to Microprocessor Floating Point Units (1995) (5)
- The history, status, and future of FPGAs (2020) (4)
- Optimal on-chip cache hierarchy synthesis with scaling of technology (1996) (4)
- A VLSI architecture for the FCHC isometric lattice gas model (1990) (4)
- Using simple tools to evaluate complex architectural trade-offs (2000) (4)
- Write grouping for update-based cache coherence protocols (1994) (4)
- Two Case Studies in Latency Tolerant Architectures (1994) (4)
- High-speed interconnect schemes for a pipelined FPGA (2001) (4)
- Precision of semi-exact redundant continued fraction arithmetic for VLSI (1999) (4)
- Head contacts in collegiate football measured with an instrumented mouthguard (2013) (4)
- The History, Status, and Future of FPGAs (2020) (4)
- Parametric time delay modeling for floating point units (2002) (3)
- Time and Area Optimization in Processor Architecture (1997) (3)
- An evaluation of video fidelity metrics (1997) (3)
- Achieving subword parallelism by software reuse of the floating-point data path (1997) (3)
- Rounding in redundant digit floating point system (2003) (3)
- Hot chips 15 - scaling the silicon mountain (2004) (3)
- A Bubble Propagation Model for Pipeline Performance (1994) (3)
- Hardware-assisted Algorithms for Checkpoints (1998) (3)
- Evaluation of Communication Mechanisms in Invalidate-Based Shared Memory Multiprocessors (1997) (3)
- The relative effects of optimization on instruction architecture performance (1989) (3)
- Automated run-time scheduling of unstructured scientific computation on scalable multiprocessors (1992) (3)
- Technology Trends and Adaptive Computing (2001) (3)
- The Future Is Parallel But It May Not Be Easy (2007) (3)
- Reducing Execution Parameters Through Correspondence in Computer Architecture (1987) (3)
- Chip Basics: Time, Area, Power, Reliability, and Configurability (2011) (3)
- Classes of emulators (1977) (3)
- Introduction to the Systems Approach (2011) (3)
- Paging Performance with Page Coloring. (1991) (3)
- Coarse-grained carry architecture for FPGA (poster abstract) (2000) (3)
- A Technology-Scalable Multithreaded Architecture (2001) (2)
- IBM System/360 Model 91 (2011) (2)
- A queuing analysis for disk array systems (1990) (2)
- Spectrum of choices: superpipelined, superscalar, or multiprocessor? (1991) (2)
- Architectural mechanisms to support three-dimensional lattice gas simulations (1991) (2)
- Novel checkpointing algorithm for fault tolerance on a tightly-coupled multiprocessor (2001) (2)
- Sub-nanosecond arithmetic (1990) (2)
- Efficient digit-serial rational function approximations and digital filtering applications (1999) (2)
- Subnanosecond arithmetic (Second Report) (1991) (2)
- Reciprocal approximation theory with table compensation (2000) (2)
- Packet Switching Photonic Network Switch Design and Routing Algorithm (1997) (2)
- Pipeline-Able Division Unit (2000) (2)
- Fault Tolerance: Methods of Rollback Recovery (1997) (2)
- Designing a Partitionable Multiplier (1998) (1)
- More than 50 years of parallel processing and still no easy path to speedup (2011) (1)
- Memory Design: System‐on‐Chip and Board‐Based Systems (2011) (1)
- Chapter Two - Advances in Dataflow Systems (2017) (1)
- Limits of Technology Scaling to Fully Exploit Shrinking Feature Sizes and Avoid Being Overwhelmed by Complexity, Microprocessor Designers Must Keep up with Technology Trends, Understand Specific Applications, and Use Advanced Cad Tools. Deep-submicron Microprocessor Design Issues (1999) (1)
- Smart photonic networks and computer security for image data (1998) (1)
- Design of testbed and emulation tools (1986) (1)
- The Stanford Packet Radio Network (1986) (1)
- The M-log-fraction transform (MFT) for computer arithmetic (2001) (1)
- Technology Scaling Eeects on Multipliers (1996) (1)
- Mapping between parallel processor structures and programs (1987) (1)
- Fetch Caches (1993) (1)
- Translation Hint Buffers To Reduce Access Time Of Physically-addressed Instruction Caches (1992) (1)
- FireLink: A Reconfigurable Firewire Testbed (1998) (1)
- The SNAP Project: Building Validated Floating Point (1997) (1)
- Design and Validation of Update-Based Cache Coherence Protocols (1994) (1)
- Delay Models for CMOS Circuits (1998) (1)
- A Performance/Area Workbench for Cache Memory Design (1994) (1)
- Yesterday and tomorrow: a view on progress in computer design (2005) (1)
- Delay Balancing of Wave Pipelined Multiplier Counter Trees Using Pass Transistor Multiplexers (1996) (0)
- Reconfigurable Multimode Multiband Information (1999) (0)
- Exploiting Parallelism and Data Locality of Systolic Array Applications using Multi-Ported FPGA (2000) (0)
- Rapid Redesign of Analog Standard Cells Using C on s t r a in e d 0 p t im iz a t i on Tee h n i que s1 (1992) (0)
- Reducing caches division latency with reciprocal (2006) (0)
- Comparing MultiCore , ManyCore , and DataFlow SuperComputers : Acceleration , Power , and Size (2013) (0)
- Device for fault-tolerant multimedia program distribution (1996) (0)
- Basic Issues in Microprocessor Architecture 1 the Role of Scaling in Microprocessor Architecture (1999) (0)
- Keynote Speech: Avoiding the Memory Bottleneck through Structured Arrays (2007) (0)
- What's Next: Challenges Ahead (2011) (0)
- Sparse adaptive memory and handwritten digit recognition (1994) (0)
- Deep Submicron VLSI Floorplanning Algorithm (2007) (0)
- Exp Diff + Swap + Swap Predict CLOSEFAR Rshift Lshift LOP PENC ComAdd ComAdd HalfAdd Exp Diff + Swap + Swap Predict CLOSEFAR Collision Logic + Tri-state Output Collision Logic + Tri-State Output Collision Logic + Tri-state Output (1998) (0)
- MPP Keynotes and Invited Speaker (2014) (0)
- Performance of Data-Intensive Algorithms on FPGAs in anObject-oriented Programming Environment (2000) (0)
- Scalable Cache Coherence for Shared Memory Multiprocessors (1991) (0)
- CAD Tools for System-Level Modeling and Implementation (2001) (0)
- Stanford emulation laboratory (1976) (0)
- Appendix: Tools for Processor Evaluation (2011) (0)
- Checkpointing apparatus and algorithms for fault-tolerant tightly-coupled multiprocessors (1999) (0)
- Banquet Talk: Area-Time-Power Tradeoffs in Computer Design: The Road Ahead (2004) (0)
- Programmed solutions: the step beyond programmed logic [computer architecture] (2002) (0)
- Effects of Layered Protocols on Performance of a Packet Radio Network (1987) (0)
- The SNAP Project : Building Validated Floating Point Units (1998) (0)
- Estimating interconnect wirelength for soft IP (2001) (0)
- Customization and Configurability (2011) (0)
- Improving Performance for MPEG Players. (1996) (0)
- Effectiveness of producer-initiated communication (1998) (0)
- Strategies to Improve 1/0 Cache Performance * (1993) (0)
- Maximum Performance Computing with Dataflow Technology (2015) (0)
- High-performance multiprocessor architecture for a 3-D lattice gas model (1991) (0)
- CURRENT ISSUE NEWS BLOGS OPINION RESEARCH PRACTICE CAREERS MAGAZINE ARCHIVE (2013) (0)
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