Bruce Jacob | Academic Influence

Bruce Jacob's AcademicInfluence.com Rankings

Bruce Jacob

Computer Science

#10376

World Rank

#10894

Historical Rank

#1811

USA Rank

Computer Architecture

#79

World Rank

#81

Historical Rank

#33

USA Rank

Computer Engineering

#166

World Rank

#168

Historical Rank

#16

USA Rank

Database

#8285

World Rank

#8652

Historical Rank

#1085

USA Rank

computer-science Degrees

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Computer Science

Bruce Jacob's Degrees

PhD Computer Science University of Maryland, College Park
Masters Computer Science University of Maryland, College Park

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Why Is Bruce Jacob Influential?

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According to Wikipedia, Bruce Robert Jacob is a former Assistant Attorney General for the State of Florida during the early 1960s. He represented Louie L. Wainwright, the Director of the Florida Division of Corrections, in the Supreme Court case of Gideon v. Wainwright, decided in March 1963, regarding the right to counsel of indigent defendants in non-capital felony cases in state courts. The attorney representing the Petitioner, Clarence Gideon, was Abe Fortas, a Washington, D.C. lawyer who later became a Justice of the Supreme Court. The previous 1942 Supreme Court case of Betts v. Brady required the appointment of counsel for an indigent defendant at state expense if there was a “special circumstance” present in the case which made it necessary for counsel to be provided for the defendant to receive a fair trial. For example, if the defendant was indigent and was extremely young, or lacked education or experience, was unfamiliar with court procedures, or if the charges against him were complex, the trial court was required under the Due Process Clause of the Fourteenth Amendment to appoint counsel. Jacob argued against any extension of the defendant's right to counsel. The Court in Gideon overruled Betts and required state courts to appoint attorneys for defendants in all felony prosecutions.

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Bruce Jacob's Published Works

Number of citations in a given year to any of this author's works

Total number of citations to an author for the works they published in a given year. This highlights publication of the most important work(s) by the author

Published Works

DRAMSim2: A Cycle Accurate Memory System Simulator (2011) (837)
Memory Systems: Cache, DRAM, Disk (2007) (659)
DRAMsim: a memory system simulator (2005) (339)
The structural simulation toolkit (2006) (293)
A performance comparison of contemporary DRAM architectures (1999) (229)
The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization (2009) (212)
An Analytical Model (1996) (210)
Technology comparison for large last-level caches (L3Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM (2013) (203)
BioBench: A Benchmark Suite of Bioinformatics Applications (2005) (182)
CMP $ im : A Pin-Based OnThe-Fly Multi-Core Cache Simulator (2008) (162)
Composing with Genetic Algorithms (1995) (150)
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads (2006) (137)
A look at several memory management units, TLB-refill mechanisms, and page table organizations (1998) (120)
Hardware support for real-time operating systems (2003) (116)
Virtual memory in contemporary microprocessors (1998) (111)
A control-theoretic approach to dynamic voltage scheduling (2003) (103)
An Analytical Model for Designing Memory Hierarchies (1996) (98)
DRAM Refresh Mechanisms, Penalties, and Trade-Offs (2016) (98)
Flexible auto-refresh: Enabling scalable and energy-efficient DRAM refresh reductions (2015) (96)
Concurrency, latency, or system overhead: Which has the largest impact on uniprocessor DRAM-system performance? (2001) (89)
Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling (2007) (86)
The Performance and Energy Consumption of Embedded Real-Time Operating Systems (2003) (84)
Algorithmic composition as a model of creativity (1996) (82)
Virtual Memory: Issues of Implementation (1998) (82)
Software-managed address translation (1997) (79)
Energy/Power Breakdown of Pipelined Nanometer Caches (90nm/65nm/45nm/32nm) (2006) (72)
The Memory System: You Can't Avoid It, You Can't Ignore It, You Can't Fake It (2009) (71)
High-Performance DRAMs in Workstation Environments (2001) (64)
DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator (2020) (59)
Modern dram memory systems: performance analysis and scheduling algorithm (2005) (57)
Fine-Grained Activation for Power Reduction in DRAM (2010) (55)
Buffer-on-board memory systems (2012) (55)
The performance and energy consumption of three embedded real-time operating systems (2001) (44)
Uniprocessor Virtual Memory without TLBs (2001) (43)
MEMS-based embedded sensor virtual components for system-on-a-chip (SoC) (2004) (38)
Instruction-level power dissipation in the Intel XScale embedded microprocessor (2005) (36)
Probabilistic methods for searching ocr-degraded arabic text (2003) (35)
Cache Design for Embedded Real-Time Systems (1999) (31)
DDR2 and Low Latency Variants (2000) (28)
CMP Memory Modeling : How Much Does Accuracy Matter ? (2009) (26)
Coordinated refresh: Energy efficient techniques for DRAM refresh scheduling (2013) (25)
A performance & power comparison of modern high-speed DRAM architectures (2018) (24)
In-line interrupt handling for software-managed TLBs (2001) (23)
A Case for Studying DRAM Issues at the System Level (2003) (22)
Accurate and fast system-level power modeling: An XScale-based case study (2008) (21)
AN INTEgRATED SIMulATIoN INfRASTRuCTuRE foR THE ENTIRE MEMoRy HIERARCHy: CACHE, DRAM, NoNVolATIlE MEMoRy, AND DISk (2013) (20)
CMP $ im : A Binary Instrumentation Approach to Modeling Memory Behavior of Workloads on CMPs (2006) (20)
Peering Over the Memory Wall : Design Space and Performance Analysis of the Hybrid Memory Cube (2015) (18)
Electromagnetic Interference and Digital Circuits: An Initial Study of Clock Networks (2006) (16)
The New DRAM Interfaces: SDRAM, RDRAM and Variants (2000) (15)
Extended split-issue: enabling flexibility in the hardware implementation of NUAL VLIW DSPs (2004) (14)
Let there be light!: the future of memory systems is photonics and 3D stacking (2011) (14)
Notes on Calculating Computer Performance (1995) (14)
Accurate and fast system-level power modeling: An XScale-based case study (2007) (14)
Using virtual load/store queues (VLSQs) to reduce the negative effects of reordered memory instructions (2005) (13)
The Memory System (2009) (13)
Organizational Design Trade-Offs at the DRAM, Memory Bus, and Memory Controller Level: Initial Results (1999) (12)
MEMS-based embedded sensor virtual components for SoC (2003) (12)
Radio frequency effects on the clock networks of digital circuits (2004) (11)
Buffer-On-Board Memory System (2012) (9)
VIRTUAL MEMORY SYSTEMS AND TLB STRUCTURES (2001) (9)
In-line interrupt handling and lock-up free translation lookaside buffers (TLBs) (2006) (8)
Design for ReRAM-based main-memory architectures (2019) (8)
Transparent data-memory organizations for digital signal processors (2001) (7)
IceClave: A Trusted Execution Environment for In-Storage Computing (2021) (7)
Memory-systems challenges in realizing monolithic computers (2018) (7)
Main memory latency simulation: the missing link (2018) (7)
Service Discovery: Access to Local Resources in a Nomadic Environment (1996) (6)
Real-Time Memory Management: Compile-Time Techniques and Run-Time Mechanisms that Enable the Use of Caches in Real-Time Systems (2000) (6)
Rethinking cycle accurate DRAM simulation (2019) (6)
The 2 PetaFLOP, 3 Petabyte, 9 TB/s, 90 kW Cabinet: A System Architecture for Exascale and Big Data (2016) (6)
Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study (2006) (6)
XMT-M: A Scalable Decentralized Processor (1999) (6)
Using run-time reverse-engineering to optimize DRAM refresh (2017) (5)
Exascale Interconnect Topology Characterization and Parameter Exploration (2018) (5)
Segmented Addressing Solves the Virtual Cache Synonym Problem (1997) (5)
Synchronous DRAM Architectures , Organizations , and Alternative Technologies Prof (2002) (5)
Hardware/Software Architectures for Real-Time Caching (1999) (5)
Impact of Cache Coherence Protocols on the Power Consumption of STT-RAM-Based LLC (2014) (5)
Statistical DRAM modeling (2019) (5)
Project : TERAFLUX-Exploiting dataflow parallelism in Teradevice Computing (2011) (5)
Performance characteristics of MAUI: an intelligent memory system architecture (2005) (5)
Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die (2019) (5)
Software-Managed Caches: Architectural Support for Real-Time Embedded Systems (1998) (4)
TERPS: the embedded reliable processing system (2005) (4)
PROFET: Modeling System Performance and Energy Without Simulating the CPU (2019) (4)
Tileable Monolithic ReRAM Memory Design (2020) (3)
Bringing Modern Hierarchical Memory Systems Into Focus: A study of architecture and workload factors on system performance (2015) (3)
A Comment on "An Analytical Model for Designing Memory Hierarchies" (1997) (3)
DRAM Device Organization: Basic Circuits and Architecture (2008) (3)
Improving the Precise Interrupt Mechanism of Software-Managed TLB Miss Handlers (2001) (3)
The Case for Associative DRAM Caches (2016) (3)
Hardware/Software Co-Design of I/O Interfacing Hardware and Real-Time Device Drivers for Embedded Systems (1999) (3)
Low Latency, High Bisection-Bandwidth Networks for Exascale Memory Systems (2016) (3)
The trading function in action (1996) (3)
The Case for VLIW-CMP as a Building Block for Exascale (2016) (3)
Refresh Matters: Energy and Performance Analysis of Large Last-Level Cache Built with Gain Cell Embedded DRAM (2012) (2)
Fast full system memory checkpointing with SSD-aware memory controller (2016) (2)
Introduction to the two special issues on memory (2002) (2)
Software-oriented memory-management design (1997) (2)
DRAM Memory System Organization (2008) (2)
IN-LINE INTERRUPT HANDLING AND LOCK-UP FREE TLBs (2002) (1)
Proceedings of the Second International Symposium on Memory Systems (2016) (1)
CHAPTER 3 – Management of Cache Contents (2008) (1)
Optimization of Mass Storage Hierarchies (2000) (1)
CHAPTER 7 – Overview of DRAMs (2008) (1)
The use of distributed objects and dynamic interfaces in a wide-area transaction environment (1995) (1)
Support for Nomadism in a Global Environment (1997) (1)
Computer Architecture and Design (2008) (1)
PROFET (2019) (1)
The Semantic Gap Between Software and the Memory System (2015) (1)
Introduction to the two special issues on memory (2003) (1)
Proceedings of the International Symposium on Memory Systems, MEMSYS 2017, Alexandria, VA, USA, October 02 - 05, 2017 (2017) (0)
Th e Embedded Reliable Processing System ( TERPS ) — A Robust Architecture that Achieves Forward Progress   in Near-Continuous Electromagnetic Interference (2015) (0)
Microhotplate-Based Sensor Platform for Submicron SoC Designs | NIST (2005) (0)
Thetrading functionin action (1996) (0)
CHAPTER 31 – Virtual Memory (2008) (0)
CHAPTER 21 – Operational Performance Improvement (2008) (0)
It ’ s Not About the Browser Microsoft ’ s Monopoly Derives from Microsoft ’ s Ability to Control the Windows Interface (2001) (0)
Design and Evaluation of Monolithic Computers Implemented Using Crossbar ReRAM (2019) (0)
CHAPTER 2 – Logical Organization (2008) (0)
FINE-GRAINEDACTIVATION FOR POWERREDUCTION INDRAM (2010) (0)
Microhotplate-Based Sensor Platform for Standard Submicron CMOS SoC Designs (2005) (0)
CHAPTER 15 – Memory System Design Analysis (2008) (0)
Fifth Annual Workshop on Computer Education (1999) (0)
CHAPTER 20 – Drive Interface (2008) (0)
CHAPTER 18 – The Data Layer (2008) (0)
CHAPTER 25 – Advanced Topics (2008) (0)
CHAPTER 27 – The Case for Holistic Design (2008) (0)
1 DDR 2 and Low Latency Variants (2007) (0)
Descriptive Title : “ Effects of High Power Microwaves and Chaos in 21 st Century Analog and Digital Electronics ” (2006) (0)
Proceedings of the International Symposium on Memory Systems (2017) (0)
The New D RAM Interfaces: SDRAM, D RDRAM a nd Variants (2000) (0)
Session details: System software and memory architecture (2011) (0)
Management of Cache Consistency (2008) (0)
OVERVIEW: On Memory Systems and Their Design (2008) (0)
Proceedings of the International Symposium on Memory Systems (2017) (0)
The Fully Buffered DIMM Memory System (2008) (0)
Memory Errors and Error Correction (2008) (0)
Virtual Issues of Implementation (1998) (0)
Tomorrow’s memory systems, 2017 edition (2017) (0)
Title of Thesis: Rtos-based Dynamic Voltage Scaling Rtos-based Dynamic Voltage Scaling (2003) (0)
An analytical model to estimate PCM failure probability due to process variations (2011) (0)
Producing Reliable Full-System Simulation Results: A Case Study of CMP with Very Large Caches (2012) (0)
Looking to Parallel Algorithms for ILP and Decentralization (1998) (0)
LOW ENERGY WAKE-UP LOGIC by Himabindu Kakaraparthi (0)
CHAPTER 24 – Storage Subsystems (2008) (0)
High-bandwidth, high-capacity, low-power memory systems (2014) (0)
CHAPTER 16 – Overview of Disks (2008) (0)
PROFET (2019) (0)
Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache (2021) (0)
CHAPTER 13 – DRAM Memory Controller (2008) (0)
Session details: Embedded systems architecture (2007) (0)
CHAPTER 17 – The Physical Layer (2008) (0)
PERFORMANCE STUDY OF VARIOUS MODERN DRAM ARCHITECTURES by Dhiraj Reddy Nallapa Yoge (2018) (0)
Synthesis Lectures on Computer Architecture (2009) (0)
CHAPTER 1 – An Overview of Cache Principles (2008) (0)
Energy-Efficient Cached DIMM Architecture (2012) (0)
Statistical DRAMModeling (2019) (0)
CHAPTER 9 – DRAM System Signaling and Timing (2008) (0)
Modeling MEMS Microhotplate Structures With SystemC | NIST (2006) (0)
Basic DRAM Memory-Access Protocol (2008) (0)
CHAPTER 6 – Cache Case Studies (2008) (0)
CHAPTER 19 – Performance Issues and Design Trade-Offs (2008) (0)
Building A Trusted Execution Environment for In-Storage Computing (2022) (0)
CHAPTER 5 – Implementation Issues (2008) (0)
Title: 3d Integration, Temperature Effects, and Modeling (0)
CHAPTER 29 – Power and Leakage (2008) (0)
Zoned FTL: Achieve Resource Isolation via Hardware Virtualization (2021) (0)
The Cache Layer (2008) (0)
Software-managed Address Translation 2 Memory System Requirements (0)
Memory Management Hardware, and its Support for Operating Systems (1997) (0)
Evolutionary Developments of DRAM Device Architecture (2008) (0)
Reward: How to Foster a Technology-Innovation Culture within a Large Organization (What You Can Learn from Startup Companies) (2009) (0)
Computer Engineering: Systems Architecture (Datacenters & Supercomputers); Memory Systems (DRAM & Non-Volatile Technologies—耀om Devices to Systems); and Technology Innovation (Entrepreneurship & Electric Guitars) (2016) (0)
CHAPTER 23 – Performance Testing (2008) (0)
CHAPTER 28 – Analysis of Cost and Performance (2008) (0)
XMT-M : A Scalable Decentralized (1999) (0)

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